1
2
3 package ssa
4
5 import (
6 "cmd/internal/obj"
7 "cmd/internal/obj/arm"
8 "cmd/internal/obj/arm64"
9 "cmd/internal/obj/loong64"
10 "cmd/internal/obj/mips"
11 "cmd/internal/obj/ppc64"
12 "cmd/internal/obj/riscv"
13 "cmd/internal/obj/s390x"
14 "cmd/internal/obj/wasm"
15 "cmd/internal/obj/x86"
16 )
17
18 const (
19 BlockInvalid BlockKind = iota
20
21 Block386EQ
22 Block386NE
23 Block386LT
24 Block386LE
25 Block386GT
26 Block386GE
27 Block386OS
28 Block386OC
29 Block386ULT
30 Block386ULE
31 Block386UGT
32 Block386UGE
33 Block386EQF
34 Block386NEF
35 Block386ORD
36 Block386NAN
37
38 BlockAMD64EQ
39 BlockAMD64NE
40 BlockAMD64LT
41 BlockAMD64LE
42 BlockAMD64GT
43 BlockAMD64GE
44 BlockAMD64OS
45 BlockAMD64OC
46 BlockAMD64ULT
47 BlockAMD64ULE
48 BlockAMD64UGT
49 BlockAMD64UGE
50 BlockAMD64EQF
51 BlockAMD64NEF
52 BlockAMD64ORD
53 BlockAMD64NAN
54 BlockAMD64JUMPTABLE
55
56 BlockARMEQ
57 BlockARMNE
58 BlockARMLT
59 BlockARMLE
60 BlockARMGT
61 BlockARMGE
62 BlockARMULT
63 BlockARMULE
64 BlockARMUGT
65 BlockARMUGE
66 BlockARMLTnoov
67 BlockARMLEnoov
68 BlockARMGTnoov
69 BlockARMGEnoov
70
71 BlockARM64EQ
72 BlockARM64NE
73 BlockARM64LT
74 BlockARM64LE
75 BlockARM64GT
76 BlockARM64GE
77 BlockARM64ULT
78 BlockARM64ULE
79 BlockARM64UGT
80 BlockARM64UGE
81 BlockARM64Z
82 BlockARM64NZ
83 BlockARM64ZW
84 BlockARM64NZW
85 BlockARM64TBZ
86 BlockARM64TBNZ
87 BlockARM64FLT
88 BlockARM64FLE
89 BlockARM64FGT
90 BlockARM64FGE
91 BlockARM64LTnoov
92 BlockARM64LEnoov
93 BlockARM64GTnoov
94 BlockARM64GEnoov
95 BlockARM64JUMPTABLE
96
97 BlockLOONG64EQ
98 BlockLOONG64NE
99 BlockLOONG64LTZ
100 BlockLOONG64LEZ
101 BlockLOONG64GTZ
102 BlockLOONG64GEZ
103 BlockLOONG64FPT
104 BlockLOONG64FPF
105 BlockLOONG64BEQ
106 BlockLOONG64BNE
107 BlockLOONG64BGE
108 BlockLOONG64BLT
109 BlockLOONG64BGEU
110 BlockLOONG64BLTU
111
112 BlockMIPSEQ
113 BlockMIPSNE
114 BlockMIPSLTZ
115 BlockMIPSLEZ
116 BlockMIPSGTZ
117 BlockMIPSGEZ
118 BlockMIPSFPT
119 BlockMIPSFPF
120
121 BlockMIPS64EQ
122 BlockMIPS64NE
123 BlockMIPS64LTZ
124 BlockMIPS64LEZ
125 BlockMIPS64GTZ
126 BlockMIPS64GEZ
127 BlockMIPS64FPT
128 BlockMIPS64FPF
129
130 BlockPPC64EQ
131 BlockPPC64NE
132 BlockPPC64LT
133 BlockPPC64LE
134 BlockPPC64GT
135 BlockPPC64GE
136 BlockPPC64FLT
137 BlockPPC64FLE
138 BlockPPC64FGT
139 BlockPPC64FGE
140
141 BlockRISCV64BEQ
142 BlockRISCV64BNE
143 BlockRISCV64BLT
144 BlockRISCV64BGE
145 BlockRISCV64BLTU
146 BlockRISCV64BGEU
147 BlockRISCV64BEQZ
148 BlockRISCV64BNEZ
149 BlockRISCV64BLEZ
150 BlockRISCV64BGEZ
151 BlockRISCV64BLTZ
152 BlockRISCV64BGTZ
153
154 BlockS390XBRC
155 BlockS390XCRJ
156 BlockS390XCGRJ
157 BlockS390XCLRJ
158 BlockS390XCLGRJ
159 BlockS390XCIJ
160 BlockS390XCGIJ
161 BlockS390XCLIJ
162 BlockS390XCLGIJ
163
164 BlockPlain
165 BlockIf
166 BlockDefer
167 BlockRet
168 BlockRetJmp
169 BlockExit
170 BlockJumpTable
171 BlockFirst
172 )
173
174 var blockString = [...]string{
175 BlockInvalid: "BlockInvalid",
176
177 Block386EQ: "EQ",
178 Block386NE: "NE",
179 Block386LT: "LT",
180 Block386LE: "LE",
181 Block386GT: "GT",
182 Block386GE: "GE",
183 Block386OS: "OS",
184 Block386OC: "OC",
185 Block386ULT: "ULT",
186 Block386ULE: "ULE",
187 Block386UGT: "UGT",
188 Block386UGE: "UGE",
189 Block386EQF: "EQF",
190 Block386NEF: "NEF",
191 Block386ORD: "ORD",
192 Block386NAN: "NAN",
193
194 BlockAMD64EQ: "EQ",
195 BlockAMD64NE: "NE",
196 BlockAMD64LT: "LT",
197 BlockAMD64LE: "LE",
198 BlockAMD64GT: "GT",
199 BlockAMD64GE: "GE",
200 BlockAMD64OS: "OS",
201 BlockAMD64OC: "OC",
202 BlockAMD64ULT: "ULT",
203 BlockAMD64ULE: "ULE",
204 BlockAMD64UGT: "UGT",
205 BlockAMD64UGE: "UGE",
206 BlockAMD64EQF: "EQF",
207 BlockAMD64NEF: "NEF",
208 BlockAMD64ORD: "ORD",
209 BlockAMD64NAN: "NAN",
210 BlockAMD64JUMPTABLE: "JUMPTABLE",
211
212 BlockARMEQ: "EQ",
213 BlockARMNE: "NE",
214 BlockARMLT: "LT",
215 BlockARMLE: "LE",
216 BlockARMGT: "GT",
217 BlockARMGE: "GE",
218 BlockARMULT: "ULT",
219 BlockARMULE: "ULE",
220 BlockARMUGT: "UGT",
221 BlockARMUGE: "UGE",
222 BlockARMLTnoov: "LTnoov",
223 BlockARMLEnoov: "LEnoov",
224 BlockARMGTnoov: "GTnoov",
225 BlockARMGEnoov: "GEnoov",
226
227 BlockARM64EQ: "EQ",
228 BlockARM64NE: "NE",
229 BlockARM64LT: "LT",
230 BlockARM64LE: "LE",
231 BlockARM64GT: "GT",
232 BlockARM64GE: "GE",
233 BlockARM64ULT: "ULT",
234 BlockARM64ULE: "ULE",
235 BlockARM64UGT: "UGT",
236 BlockARM64UGE: "UGE",
237 BlockARM64Z: "Z",
238 BlockARM64NZ: "NZ",
239 BlockARM64ZW: "ZW",
240 BlockARM64NZW: "NZW",
241 BlockARM64TBZ: "TBZ",
242 BlockARM64TBNZ: "TBNZ",
243 BlockARM64FLT: "FLT",
244 BlockARM64FLE: "FLE",
245 BlockARM64FGT: "FGT",
246 BlockARM64FGE: "FGE",
247 BlockARM64LTnoov: "LTnoov",
248 BlockARM64LEnoov: "LEnoov",
249 BlockARM64GTnoov: "GTnoov",
250 BlockARM64GEnoov: "GEnoov",
251 BlockARM64JUMPTABLE: "JUMPTABLE",
252
253 BlockLOONG64EQ: "EQ",
254 BlockLOONG64NE: "NE",
255 BlockLOONG64LTZ: "LTZ",
256 BlockLOONG64LEZ: "LEZ",
257 BlockLOONG64GTZ: "GTZ",
258 BlockLOONG64GEZ: "GEZ",
259 BlockLOONG64FPT: "FPT",
260 BlockLOONG64FPF: "FPF",
261 BlockLOONG64BEQ: "BEQ",
262 BlockLOONG64BNE: "BNE",
263 BlockLOONG64BGE: "BGE",
264 BlockLOONG64BLT: "BLT",
265 BlockLOONG64BGEU: "BGEU",
266 BlockLOONG64BLTU: "BLTU",
267
268 BlockMIPSEQ: "EQ",
269 BlockMIPSNE: "NE",
270 BlockMIPSLTZ: "LTZ",
271 BlockMIPSLEZ: "LEZ",
272 BlockMIPSGTZ: "GTZ",
273 BlockMIPSGEZ: "GEZ",
274 BlockMIPSFPT: "FPT",
275 BlockMIPSFPF: "FPF",
276
277 BlockMIPS64EQ: "EQ",
278 BlockMIPS64NE: "NE",
279 BlockMIPS64LTZ: "LTZ",
280 BlockMIPS64LEZ: "LEZ",
281 BlockMIPS64GTZ: "GTZ",
282 BlockMIPS64GEZ: "GEZ",
283 BlockMIPS64FPT: "FPT",
284 BlockMIPS64FPF: "FPF",
285
286 BlockPPC64EQ: "EQ",
287 BlockPPC64NE: "NE",
288 BlockPPC64LT: "LT",
289 BlockPPC64LE: "LE",
290 BlockPPC64GT: "GT",
291 BlockPPC64GE: "GE",
292 BlockPPC64FLT: "FLT",
293 BlockPPC64FLE: "FLE",
294 BlockPPC64FGT: "FGT",
295 BlockPPC64FGE: "FGE",
296
297 BlockRISCV64BEQ: "BEQ",
298 BlockRISCV64BNE: "BNE",
299 BlockRISCV64BLT: "BLT",
300 BlockRISCV64BGE: "BGE",
301 BlockRISCV64BLTU: "BLTU",
302 BlockRISCV64BGEU: "BGEU",
303 BlockRISCV64BEQZ: "BEQZ",
304 BlockRISCV64BNEZ: "BNEZ",
305 BlockRISCV64BLEZ: "BLEZ",
306 BlockRISCV64BGEZ: "BGEZ",
307 BlockRISCV64BLTZ: "BLTZ",
308 BlockRISCV64BGTZ: "BGTZ",
309
310 BlockS390XBRC: "BRC",
311 BlockS390XCRJ: "CRJ",
312 BlockS390XCGRJ: "CGRJ",
313 BlockS390XCLRJ: "CLRJ",
314 BlockS390XCLGRJ: "CLGRJ",
315 BlockS390XCIJ: "CIJ",
316 BlockS390XCGIJ: "CGIJ",
317 BlockS390XCLIJ: "CLIJ",
318 BlockS390XCLGIJ: "CLGIJ",
319
320 BlockPlain: "Plain",
321 BlockIf: "If",
322 BlockDefer: "Defer",
323 BlockRet: "Ret",
324 BlockRetJmp: "RetJmp",
325 BlockExit: "Exit",
326 BlockJumpTable: "JumpTable",
327 BlockFirst: "First",
328 }
329
330 func (k BlockKind) String() string { return blockString[k] }
331 func (k BlockKind) AuxIntType() string {
332 switch k {
333 case BlockARM64TBZ:
334 return "int64"
335 case BlockARM64TBNZ:
336 return "int64"
337 case BlockS390XCIJ:
338 return "int8"
339 case BlockS390XCGIJ:
340 return "int8"
341 case BlockS390XCLIJ:
342 return "uint8"
343 case BlockS390XCLGIJ:
344 return "uint8"
345 }
346 return ""
347 }
348
349 const (
350 OpInvalid Op = iota
351
352 Op386ADDSS
353 Op386ADDSD
354 Op386SUBSS
355 Op386SUBSD
356 Op386MULSS
357 Op386MULSD
358 Op386DIVSS
359 Op386DIVSD
360 Op386MOVSSload
361 Op386MOVSDload
362 Op386MOVSSconst
363 Op386MOVSDconst
364 Op386MOVSSloadidx1
365 Op386MOVSSloadidx4
366 Op386MOVSDloadidx1
367 Op386MOVSDloadidx8
368 Op386MOVSSstore
369 Op386MOVSDstore
370 Op386MOVSSstoreidx1
371 Op386MOVSSstoreidx4
372 Op386MOVSDstoreidx1
373 Op386MOVSDstoreidx8
374 Op386ADDSSload
375 Op386ADDSDload
376 Op386SUBSSload
377 Op386SUBSDload
378 Op386MULSSload
379 Op386MULSDload
380 Op386DIVSSload
381 Op386DIVSDload
382 Op386ADDL
383 Op386ADDLconst
384 Op386ADDLcarry
385 Op386ADDLconstcarry
386 Op386ADCL
387 Op386ADCLconst
388 Op386SUBL
389 Op386SUBLconst
390 Op386SUBLcarry
391 Op386SUBLconstcarry
392 Op386SBBL
393 Op386SBBLconst
394 Op386MULL
395 Op386MULLconst
396 Op386MULLU
397 Op386HMULL
398 Op386HMULLU
399 Op386MULLQU
400 Op386AVGLU
401 Op386DIVL
402 Op386DIVW
403 Op386DIVLU
404 Op386DIVWU
405 Op386MODL
406 Op386MODW
407 Op386MODLU
408 Op386MODWU
409 Op386ANDL
410 Op386ANDLconst
411 Op386ORL
412 Op386ORLconst
413 Op386XORL
414 Op386XORLconst
415 Op386CMPL
416 Op386CMPW
417 Op386CMPB
418 Op386CMPLconst
419 Op386CMPWconst
420 Op386CMPBconst
421 Op386CMPLload
422 Op386CMPWload
423 Op386CMPBload
424 Op386CMPLconstload
425 Op386CMPWconstload
426 Op386CMPBconstload
427 Op386UCOMISS
428 Op386UCOMISD
429 Op386TESTL
430 Op386TESTW
431 Op386TESTB
432 Op386TESTLconst
433 Op386TESTWconst
434 Op386TESTBconst
435 Op386SHLL
436 Op386SHLLconst
437 Op386SHRL
438 Op386SHRW
439 Op386SHRB
440 Op386SHRLconst
441 Op386SHRWconst
442 Op386SHRBconst
443 Op386SARL
444 Op386SARW
445 Op386SARB
446 Op386SARLconst
447 Op386SARWconst
448 Op386SARBconst
449 Op386ROLL
450 Op386ROLW
451 Op386ROLB
452 Op386ROLLconst
453 Op386ROLWconst
454 Op386ROLBconst
455 Op386ADDLload
456 Op386SUBLload
457 Op386MULLload
458 Op386ANDLload
459 Op386ORLload
460 Op386XORLload
461 Op386ADDLloadidx4
462 Op386SUBLloadidx4
463 Op386MULLloadidx4
464 Op386ANDLloadidx4
465 Op386ORLloadidx4
466 Op386XORLloadidx4
467 Op386NEGL
468 Op386NOTL
469 Op386BSFL
470 Op386BSFW
471 Op386LoweredCtz32
472 Op386LoweredCtz64
473 Op386BSRL
474 Op386BSRW
475 Op386BSWAPL
476 Op386SQRTSD
477 Op386SQRTSS
478 Op386SBBLcarrymask
479 Op386SETEQ
480 Op386SETNE
481 Op386SETL
482 Op386SETLE
483 Op386SETG
484 Op386SETGE
485 Op386SETB
486 Op386SETBE
487 Op386SETA
488 Op386SETAE
489 Op386SETO
490 Op386SETEQF
491 Op386SETNEF
492 Op386SETORD
493 Op386SETNAN
494 Op386SETGF
495 Op386SETGEF
496 Op386MOVBLSX
497 Op386MOVBLZX
498 Op386MOVWLSX
499 Op386MOVWLZX
500 Op386MOVLconst
501 Op386CVTTSD2SL
502 Op386CVTTSS2SL
503 Op386CVTSL2SS
504 Op386CVTSL2SD
505 Op386CVTSD2SS
506 Op386CVTSS2SD
507 Op386PXOR
508 Op386LEAL
509 Op386LEAL1
510 Op386LEAL2
511 Op386LEAL4
512 Op386LEAL8
513 Op386MOVBload
514 Op386MOVBLSXload
515 Op386MOVWload
516 Op386MOVWLSXload
517 Op386MOVLload
518 Op386MOVBstore
519 Op386MOVWstore
520 Op386MOVLstore
521 Op386ADDLmodify
522 Op386SUBLmodify
523 Op386ANDLmodify
524 Op386ORLmodify
525 Op386XORLmodify
526 Op386ADDLmodifyidx4
527 Op386SUBLmodifyidx4
528 Op386ANDLmodifyidx4
529 Op386ORLmodifyidx4
530 Op386XORLmodifyidx4
531 Op386ADDLconstmodify
532 Op386ANDLconstmodify
533 Op386ORLconstmodify
534 Op386XORLconstmodify
535 Op386ADDLconstmodifyidx4
536 Op386ANDLconstmodifyidx4
537 Op386ORLconstmodifyidx4
538 Op386XORLconstmodifyidx4
539 Op386MOVBloadidx1
540 Op386MOVWloadidx1
541 Op386MOVWloadidx2
542 Op386MOVLloadidx1
543 Op386MOVLloadidx4
544 Op386MOVBstoreidx1
545 Op386MOVWstoreidx1
546 Op386MOVWstoreidx2
547 Op386MOVLstoreidx1
548 Op386MOVLstoreidx4
549 Op386MOVBstoreconst
550 Op386MOVWstoreconst
551 Op386MOVLstoreconst
552 Op386MOVBstoreconstidx1
553 Op386MOVWstoreconstidx1
554 Op386MOVWstoreconstidx2
555 Op386MOVLstoreconstidx1
556 Op386MOVLstoreconstidx4
557 Op386DUFFZERO
558 Op386REPSTOSL
559 Op386CALLstatic
560 Op386CALLtail
561 Op386CALLclosure
562 Op386CALLinter
563 Op386DUFFCOPY
564 Op386REPMOVSL
565 Op386InvertFlags
566 Op386LoweredGetG
567 Op386LoweredGetClosurePtr
568 Op386LoweredGetCallerPC
569 Op386LoweredGetCallerSP
570 Op386LoweredNilCheck
571 Op386LoweredWB
572 Op386LoweredPanicBoundsA
573 Op386LoweredPanicBoundsB
574 Op386LoweredPanicBoundsC
575 Op386LoweredPanicExtendA
576 Op386LoweredPanicExtendB
577 Op386LoweredPanicExtendC
578 Op386FlagEQ
579 Op386FlagLT_ULT
580 Op386FlagLT_UGT
581 Op386FlagGT_UGT
582 Op386FlagGT_ULT
583 Op386MOVSSconst1
584 Op386MOVSDconst1
585 Op386MOVSSconst2
586 Op386MOVSDconst2
587
588 OpAMD64ADDSS
589 OpAMD64ADDSD
590 OpAMD64SUBSS
591 OpAMD64SUBSD
592 OpAMD64MULSS
593 OpAMD64MULSD
594 OpAMD64DIVSS
595 OpAMD64DIVSD
596 OpAMD64MOVSSload
597 OpAMD64MOVSDload
598 OpAMD64MOVSSconst
599 OpAMD64MOVSDconst
600 OpAMD64MOVSSloadidx1
601 OpAMD64MOVSSloadidx4
602 OpAMD64MOVSDloadidx1
603 OpAMD64MOVSDloadidx8
604 OpAMD64MOVSSstore
605 OpAMD64MOVSDstore
606 OpAMD64MOVSSstoreidx1
607 OpAMD64MOVSSstoreidx4
608 OpAMD64MOVSDstoreidx1
609 OpAMD64MOVSDstoreidx8
610 OpAMD64ADDSSload
611 OpAMD64ADDSDload
612 OpAMD64SUBSSload
613 OpAMD64SUBSDload
614 OpAMD64MULSSload
615 OpAMD64MULSDload
616 OpAMD64DIVSSload
617 OpAMD64DIVSDload
618 OpAMD64ADDSSloadidx1
619 OpAMD64ADDSSloadidx4
620 OpAMD64ADDSDloadidx1
621 OpAMD64ADDSDloadidx8
622 OpAMD64SUBSSloadidx1
623 OpAMD64SUBSSloadidx4
624 OpAMD64SUBSDloadidx1
625 OpAMD64SUBSDloadidx8
626 OpAMD64MULSSloadidx1
627 OpAMD64MULSSloadidx4
628 OpAMD64MULSDloadidx1
629 OpAMD64MULSDloadidx8
630 OpAMD64DIVSSloadidx1
631 OpAMD64DIVSSloadidx4
632 OpAMD64DIVSDloadidx1
633 OpAMD64DIVSDloadidx8
634 OpAMD64ADDQ
635 OpAMD64ADDL
636 OpAMD64ADDQconst
637 OpAMD64ADDLconst
638 OpAMD64ADDQconstmodify
639 OpAMD64ADDLconstmodify
640 OpAMD64SUBQ
641 OpAMD64SUBL
642 OpAMD64SUBQconst
643 OpAMD64SUBLconst
644 OpAMD64MULQ
645 OpAMD64MULL
646 OpAMD64MULQconst
647 OpAMD64MULLconst
648 OpAMD64MULLU
649 OpAMD64MULQU
650 OpAMD64HMULQ
651 OpAMD64HMULL
652 OpAMD64HMULQU
653 OpAMD64HMULLU
654 OpAMD64AVGQU
655 OpAMD64DIVQ
656 OpAMD64DIVL
657 OpAMD64DIVW
658 OpAMD64DIVQU
659 OpAMD64DIVLU
660 OpAMD64DIVWU
661 OpAMD64NEGLflags
662 OpAMD64ADDQconstflags
663 OpAMD64ADDLconstflags
664 OpAMD64ADDQcarry
665 OpAMD64ADCQ
666 OpAMD64ADDQconstcarry
667 OpAMD64ADCQconst
668 OpAMD64SUBQborrow
669 OpAMD64SBBQ
670 OpAMD64SUBQconstborrow
671 OpAMD64SBBQconst
672 OpAMD64MULQU2
673 OpAMD64DIVQU2
674 OpAMD64ANDQ
675 OpAMD64ANDL
676 OpAMD64ANDQconst
677 OpAMD64ANDLconst
678 OpAMD64ANDQconstmodify
679 OpAMD64ANDLconstmodify
680 OpAMD64ORQ
681 OpAMD64ORL
682 OpAMD64ORQconst
683 OpAMD64ORLconst
684 OpAMD64ORQconstmodify
685 OpAMD64ORLconstmodify
686 OpAMD64XORQ
687 OpAMD64XORL
688 OpAMD64XORQconst
689 OpAMD64XORLconst
690 OpAMD64XORQconstmodify
691 OpAMD64XORLconstmodify
692 OpAMD64CMPQ
693 OpAMD64CMPL
694 OpAMD64CMPW
695 OpAMD64CMPB
696 OpAMD64CMPQconst
697 OpAMD64CMPLconst
698 OpAMD64CMPWconst
699 OpAMD64CMPBconst
700 OpAMD64CMPQload
701 OpAMD64CMPLload
702 OpAMD64CMPWload
703 OpAMD64CMPBload
704 OpAMD64CMPQconstload
705 OpAMD64CMPLconstload
706 OpAMD64CMPWconstload
707 OpAMD64CMPBconstload
708 OpAMD64CMPQloadidx8
709 OpAMD64CMPQloadidx1
710 OpAMD64CMPLloadidx4
711 OpAMD64CMPLloadidx1
712 OpAMD64CMPWloadidx2
713 OpAMD64CMPWloadidx1
714 OpAMD64CMPBloadidx1
715 OpAMD64CMPQconstloadidx8
716 OpAMD64CMPQconstloadidx1
717 OpAMD64CMPLconstloadidx4
718 OpAMD64CMPLconstloadidx1
719 OpAMD64CMPWconstloadidx2
720 OpAMD64CMPWconstloadidx1
721 OpAMD64CMPBconstloadidx1
722 OpAMD64UCOMISS
723 OpAMD64UCOMISD
724 OpAMD64BTL
725 OpAMD64BTQ
726 OpAMD64BTCL
727 OpAMD64BTCQ
728 OpAMD64BTRL
729 OpAMD64BTRQ
730 OpAMD64BTSL
731 OpAMD64BTSQ
732 OpAMD64BTLconst
733 OpAMD64BTQconst
734 OpAMD64BTCQconst
735 OpAMD64BTRQconst
736 OpAMD64BTSQconst
737 OpAMD64BTSQconstmodify
738 OpAMD64BTRQconstmodify
739 OpAMD64BTCQconstmodify
740 OpAMD64TESTQ
741 OpAMD64TESTL
742 OpAMD64TESTW
743 OpAMD64TESTB
744 OpAMD64TESTQconst
745 OpAMD64TESTLconst
746 OpAMD64TESTWconst
747 OpAMD64TESTBconst
748 OpAMD64SHLQ
749 OpAMD64SHLL
750 OpAMD64SHLQconst
751 OpAMD64SHLLconst
752 OpAMD64SHRQ
753 OpAMD64SHRL
754 OpAMD64SHRW
755 OpAMD64SHRB
756 OpAMD64SHRQconst
757 OpAMD64SHRLconst
758 OpAMD64SHRWconst
759 OpAMD64SHRBconst
760 OpAMD64SARQ
761 OpAMD64SARL
762 OpAMD64SARW
763 OpAMD64SARB
764 OpAMD64SARQconst
765 OpAMD64SARLconst
766 OpAMD64SARWconst
767 OpAMD64SARBconst
768 OpAMD64SHRDQ
769 OpAMD64SHLDQ
770 OpAMD64ROLQ
771 OpAMD64ROLL
772 OpAMD64ROLW
773 OpAMD64ROLB
774 OpAMD64RORQ
775 OpAMD64RORL
776 OpAMD64RORW
777 OpAMD64RORB
778 OpAMD64ROLQconst
779 OpAMD64ROLLconst
780 OpAMD64ROLWconst
781 OpAMD64ROLBconst
782 OpAMD64ADDLload
783 OpAMD64ADDQload
784 OpAMD64SUBQload
785 OpAMD64SUBLload
786 OpAMD64ANDLload
787 OpAMD64ANDQload
788 OpAMD64ORQload
789 OpAMD64ORLload
790 OpAMD64XORQload
791 OpAMD64XORLload
792 OpAMD64ADDLloadidx1
793 OpAMD64ADDLloadidx4
794 OpAMD64ADDLloadidx8
795 OpAMD64ADDQloadidx1
796 OpAMD64ADDQloadidx8
797 OpAMD64SUBLloadidx1
798 OpAMD64SUBLloadidx4
799 OpAMD64SUBLloadidx8
800 OpAMD64SUBQloadidx1
801 OpAMD64SUBQloadidx8
802 OpAMD64ANDLloadidx1
803 OpAMD64ANDLloadidx4
804 OpAMD64ANDLloadidx8
805 OpAMD64ANDQloadidx1
806 OpAMD64ANDQloadidx8
807 OpAMD64ORLloadidx1
808 OpAMD64ORLloadidx4
809 OpAMD64ORLloadidx8
810 OpAMD64ORQloadidx1
811 OpAMD64ORQloadidx8
812 OpAMD64XORLloadidx1
813 OpAMD64XORLloadidx4
814 OpAMD64XORLloadidx8
815 OpAMD64XORQloadidx1
816 OpAMD64XORQloadidx8
817 OpAMD64ADDQmodify
818 OpAMD64SUBQmodify
819 OpAMD64ANDQmodify
820 OpAMD64ORQmodify
821 OpAMD64XORQmodify
822 OpAMD64ADDLmodify
823 OpAMD64SUBLmodify
824 OpAMD64ANDLmodify
825 OpAMD64ORLmodify
826 OpAMD64XORLmodify
827 OpAMD64ADDQmodifyidx1
828 OpAMD64ADDQmodifyidx8
829 OpAMD64SUBQmodifyidx1
830 OpAMD64SUBQmodifyidx8
831 OpAMD64ANDQmodifyidx1
832 OpAMD64ANDQmodifyidx8
833 OpAMD64ORQmodifyidx1
834 OpAMD64ORQmodifyidx8
835 OpAMD64XORQmodifyidx1
836 OpAMD64XORQmodifyidx8
837 OpAMD64ADDLmodifyidx1
838 OpAMD64ADDLmodifyidx4
839 OpAMD64ADDLmodifyidx8
840 OpAMD64SUBLmodifyidx1
841 OpAMD64SUBLmodifyidx4
842 OpAMD64SUBLmodifyidx8
843 OpAMD64ANDLmodifyidx1
844 OpAMD64ANDLmodifyidx4
845 OpAMD64ANDLmodifyidx8
846 OpAMD64ORLmodifyidx1
847 OpAMD64ORLmodifyidx4
848 OpAMD64ORLmodifyidx8
849 OpAMD64XORLmodifyidx1
850 OpAMD64XORLmodifyidx4
851 OpAMD64XORLmodifyidx8
852 OpAMD64ADDQconstmodifyidx1
853 OpAMD64ADDQconstmodifyidx8
854 OpAMD64ANDQconstmodifyidx1
855 OpAMD64ANDQconstmodifyidx8
856 OpAMD64ORQconstmodifyidx1
857 OpAMD64ORQconstmodifyidx8
858 OpAMD64XORQconstmodifyidx1
859 OpAMD64XORQconstmodifyidx8
860 OpAMD64ADDLconstmodifyidx1
861 OpAMD64ADDLconstmodifyidx4
862 OpAMD64ADDLconstmodifyidx8
863 OpAMD64ANDLconstmodifyidx1
864 OpAMD64ANDLconstmodifyidx4
865 OpAMD64ANDLconstmodifyidx8
866 OpAMD64ORLconstmodifyidx1
867 OpAMD64ORLconstmodifyidx4
868 OpAMD64ORLconstmodifyidx8
869 OpAMD64XORLconstmodifyidx1
870 OpAMD64XORLconstmodifyidx4
871 OpAMD64XORLconstmodifyidx8
872 OpAMD64NEGQ
873 OpAMD64NEGL
874 OpAMD64NOTQ
875 OpAMD64NOTL
876 OpAMD64BSFQ
877 OpAMD64BSFL
878 OpAMD64BSRQ
879 OpAMD64BSRL
880 OpAMD64CMOVQEQ
881 OpAMD64CMOVQNE
882 OpAMD64CMOVQLT
883 OpAMD64CMOVQGT
884 OpAMD64CMOVQLE
885 OpAMD64CMOVQGE
886 OpAMD64CMOVQLS
887 OpAMD64CMOVQHI
888 OpAMD64CMOVQCC
889 OpAMD64CMOVQCS
890 OpAMD64CMOVLEQ
891 OpAMD64CMOVLNE
892 OpAMD64CMOVLLT
893 OpAMD64CMOVLGT
894 OpAMD64CMOVLLE
895 OpAMD64CMOVLGE
896 OpAMD64CMOVLLS
897 OpAMD64CMOVLHI
898 OpAMD64CMOVLCC
899 OpAMD64CMOVLCS
900 OpAMD64CMOVWEQ
901 OpAMD64CMOVWNE
902 OpAMD64CMOVWLT
903 OpAMD64CMOVWGT
904 OpAMD64CMOVWLE
905 OpAMD64CMOVWGE
906 OpAMD64CMOVWLS
907 OpAMD64CMOVWHI
908 OpAMD64CMOVWCC
909 OpAMD64CMOVWCS
910 OpAMD64CMOVQEQF
911 OpAMD64CMOVQNEF
912 OpAMD64CMOVQGTF
913 OpAMD64CMOVQGEF
914 OpAMD64CMOVLEQF
915 OpAMD64CMOVLNEF
916 OpAMD64CMOVLGTF
917 OpAMD64CMOVLGEF
918 OpAMD64CMOVWEQF
919 OpAMD64CMOVWNEF
920 OpAMD64CMOVWGTF
921 OpAMD64CMOVWGEF
922 OpAMD64BSWAPQ
923 OpAMD64BSWAPL
924 OpAMD64POPCNTQ
925 OpAMD64POPCNTL
926 OpAMD64SQRTSD
927 OpAMD64SQRTSS
928 OpAMD64ROUNDSD
929 OpAMD64LoweredRound32F
930 OpAMD64LoweredRound64F
931 OpAMD64VFMADD231SS
932 OpAMD64VFMADD231SD
933 OpAMD64MINSD
934 OpAMD64MINSS
935 OpAMD64SBBQcarrymask
936 OpAMD64SBBLcarrymask
937 OpAMD64SETEQ
938 OpAMD64SETNE
939 OpAMD64SETL
940 OpAMD64SETLE
941 OpAMD64SETG
942 OpAMD64SETGE
943 OpAMD64SETB
944 OpAMD64SETBE
945 OpAMD64SETA
946 OpAMD64SETAE
947 OpAMD64SETO
948 OpAMD64SETEQstore
949 OpAMD64SETNEstore
950 OpAMD64SETLstore
951 OpAMD64SETLEstore
952 OpAMD64SETGstore
953 OpAMD64SETGEstore
954 OpAMD64SETBstore
955 OpAMD64SETBEstore
956 OpAMD64SETAstore
957 OpAMD64SETAEstore
958 OpAMD64SETEQstoreidx1
959 OpAMD64SETNEstoreidx1
960 OpAMD64SETLstoreidx1
961 OpAMD64SETLEstoreidx1
962 OpAMD64SETGstoreidx1
963 OpAMD64SETGEstoreidx1
964 OpAMD64SETBstoreidx1
965 OpAMD64SETBEstoreidx1
966 OpAMD64SETAstoreidx1
967 OpAMD64SETAEstoreidx1
968 OpAMD64SETEQF
969 OpAMD64SETNEF
970 OpAMD64SETORD
971 OpAMD64SETNAN
972 OpAMD64SETGF
973 OpAMD64SETGEF
974 OpAMD64MOVBQSX
975 OpAMD64MOVBQZX
976 OpAMD64MOVWQSX
977 OpAMD64MOVWQZX
978 OpAMD64MOVLQSX
979 OpAMD64MOVLQZX
980 OpAMD64MOVLconst
981 OpAMD64MOVQconst
982 OpAMD64CVTTSD2SL
983 OpAMD64CVTTSD2SQ
984 OpAMD64CVTTSS2SL
985 OpAMD64CVTTSS2SQ
986 OpAMD64CVTSL2SS
987 OpAMD64CVTSL2SD
988 OpAMD64CVTSQ2SS
989 OpAMD64CVTSQ2SD
990 OpAMD64CVTSD2SS
991 OpAMD64CVTSS2SD
992 OpAMD64MOVQi2f
993 OpAMD64MOVQf2i
994 OpAMD64MOVLi2f
995 OpAMD64MOVLf2i
996 OpAMD64PXOR
997 OpAMD64POR
998 OpAMD64LEAQ
999 OpAMD64LEAL
1000 OpAMD64LEAW
1001 OpAMD64LEAQ1
1002 OpAMD64LEAL1
1003 OpAMD64LEAW1
1004 OpAMD64LEAQ2
1005 OpAMD64LEAL2
1006 OpAMD64LEAW2
1007 OpAMD64LEAQ4
1008 OpAMD64LEAL4
1009 OpAMD64LEAW4
1010 OpAMD64LEAQ8
1011 OpAMD64LEAL8
1012 OpAMD64LEAW8
1013 OpAMD64MOVBload
1014 OpAMD64MOVBQSXload
1015 OpAMD64MOVWload
1016 OpAMD64MOVWQSXload
1017 OpAMD64MOVLload
1018 OpAMD64MOVLQSXload
1019 OpAMD64MOVQload
1020 OpAMD64MOVBstore
1021 OpAMD64MOVWstore
1022 OpAMD64MOVLstore
1023 OpAMD64MOVQstore
1024 OpAMD64MOVOload
1025 OpAMD64MOVOstore
1026 OpAMD64MOVBloadidx1
1027 OpAMD64MOVWloadidx1
1028 OpAMD64MOVWloadidx2
1029 OpAMD64MOVLloadidx1
1030 OpAMD64MOVLloadidx4
1031 OpAMD64MOVLloadidx8
1032 OpAMD64MOVQloadidx1
1033 OpAMD64MOVQloadidx8
1034 OpAMD64MOVBstoreidx1
1035 OpAMD64MOVWstoreidx1
1036 OpAMD64MOVWstoreidx2
1037 OpAMD64MOVLstoreidx1
1038 OpAMD64MOVLstoreidx4
1039 OpAMD64MOVLstoreidx8
1040 OpAMD64MOVQstoreidx1
1041 OpAMD64MOVQstoreidx8
1042 OpAMD64MOVBstoreconst
1043 OpAMD64MOVWstoreconst
1044 OpAMD64MOVLstoreconst
1045 OpAMD64MOVQstoreconst
1046 OpAMD64MOVOstoreconst
1047 OpAMD64MOVBstoreconstidx1
1048 OpAMD64MOVWstoreconstidx1
1049 OpAMD64MOVWstoreconstidx2
1050 OpAMD64MOVLstoreconstidx1
1051 OpAMD64MOVLstoreconstidx4
1052 OpAMD64MOVQstoreconstidx1
1053 OpAMD64MOVQstoreconstidx8
1054 OpAMD64DUFFZERO
1055 OpAMD64REPSTOSQ
1056 OpAMD64CALLstatic
1057 OpAMD64CALLtail
1058 OpAMD64CALLclosure
1059 OpAMD64CALLinter
1060 OpAMD64DUFFCOPY
1061 OpAMD64REPMOVSQ
1062 OpAMD64InvertFlags
1063 OpAMD64LoweredGetG
1064 OpAMD64LoweredGetClosurePtr
1065 OpAMD64LoweredGetCallerPC
1066 OpAMD64LoweredGetCallerSP
1067 OpAMD64LoweredNilCheck
1068 OpAMD64LoweredWB
1069 OpAMD64LoweredHasCPUFeature
1070 OpAMD64LoweredPanicBoundsA
1071 OpAMD64LoweredPanicBoundsB
1072 OpAMD64LoweredPanicBoundsC
1073 OpAMD64FlagEQ
1074 OpAMD64FlagLT_ULT
1075 OpAMD64FlagLT_UGT
1076 OpAMD64FlagGT_UGT
1077 OpAMD64FlagGT_ULT
1078 OpAMD64MOVBatomicload
1079 OpAMD64MOVLatomicload
1080 OpAMD64MOVQatomicload
1081 OpAMD64XCHGB
1082 OpAMD64XCHGL
1083 OpAMD64XCHGQ
1084 OpAMD64XADDLlock
1085 OpAMD64XADDQlock
1086 OpAMD64AddTupleFirst32
1087 OpAMD64AddTupleFirst64
1088 OpAMD64CMPXCHGLlock
1089 OpAMD64CMPXCHGQlock
1090 OpAMD64ANDBlock
1091 OpAMD64ANDLlock
1092 OpAMD64ANDQlock
1093 OpAMD64ORBlock
1094 OpAMD64ORLlock
1095 OpAMD64ORQlock
1096 OpAMD64LoweredAtomicAnd64
1097 OpAMD64LoweredAtomicAnd32
1098 OpAMD64LoweredAtomicOr64
1099 OpAMD64LoweredAtomicOr32
1100 OpAMD64PrefetchT0
1101 OpAMD64PrefetchNTA
1102 OpAMD64ANDNQ
1103 OpAMD64ANDNL
1104 OpAMD64BLSIQ
1105 OpAMD64BLSIL
1106 OpAMD64BLSMSKQ
1107 OpAMD64BLSMSKL
1108 OpAMD64BLSRQ
1109 OpAMD64BLSRL
1110 OpAMD64TZCNTQ
1111 OpAMD64TZCNTL
1112 OpAMD64LZCNTQ
1113 OpAMD64LZCNTL
1114 OpAMD64MOVBEWstore
1115 OpAMD64MOVBELload
1116 OpAMD64MOVBELstore
1117 OpAMD64MOVBEQload
1118 OpAMD64MOVBEQstore
1119 OpAMD64MOVBELloadidx1
1120 OpAMD64MOVBELloadidx4
1121 OpAMD64MOVBELloadidx8
1122 OpAMD64MOVBEQloadidx1
1123 OpAMD64MOVBEQloadidx8
1124 OpAMD64MOVBEWstoreidx1
1125 OpAMD64MOVBEWstoreidx2
1126 OpAMD64MOVBELstoreidx1
1127 OpAMD64MOVBELstoreidx4
1128 OpAMD64MOVBELstoreidx8
1129 OpAMD64MOVBEQstoreidx1
1130 OpAMD64MOVBEQstoreidx8
1131 OpAMD64SARXQ
1132 OpAMD64SARXL
1133 OpAMD64SHLXQ
1134 OpAMD64SHLXL
1135 OpAMD64SHRXQ
1136 OpAMD64SHRXL
1137 OpAMD64SARXLload
1138 OpAMD64SARXQload
1139 OpAMD64SHLXLload
1140 OpAMD64SHLXQload
1141 OpAMD64SHRXLload
1142 OpAMD64SHRXQload
1143 OpAMD64SARXLloadidx1
1144 OpAMD64SARXLloadidx4
1145 OpAMD64SARXLloadidx8
1146 OpAMD64SARXQloadidx1
1147 OpAMD64SARXQloadidx8
1148 OpAMD64SHLXLloadidx1
1149 OpAMD64SHLXLloadidx4
1150 OpAMD64SHLXLloadidx8
1151 OpAMD64SHLXQloadidx1
1152 OpAMD64SHLXQloadidx8
1153 OpAMD64SHRXLloadidx1
1154 OpAMD64SHRXLloadidx4
1155 OpAMD64SHRXLloadidx8
1156 OpAMD64SHRXQloadidx1
1157 OpAMD64SHRXQloadidx8
1158 OpAMD64PUNPCKLBW
1159 OpAMD64PSHUFLW
1160 OpAMD64PSHUFBbroadcast
1161 OpAMD64VPBROADCASTB
1162 OpAMD64PSIGNB
1163 OpAMD64PCMPEQB
1164 OpAMD64PMOVMSKB
1165
1166 OpARMADD
1167 OpARMADDconst
1168 OpARMSUB
1169 OpARMSUBconst
1170 OpARMRSB
1171 OpARMRSBconst
1172 OpARMMUL
1173 OpARMHMUL
1174 OpARMHMULU
1175 OpARMCALLudiv
1176 OpARMADDS
1177 OpARMADDSconst
1178 OpARMADC
1179 OpARMADCconst
1180 OpARMSUBS
1181 OpARMSUBSconst
1182 OpARMRSBSconst
1183 OpARMSBC
1184 OpARMSBCconst
1185 OpARMRSCconst
1186 OpARMMULLU
1187 OpARMMULA
1188 OpARMMULS
1189 OpARMADDF
1190 OpARMADDD
1191 OpARMSUBF
1192 OpARMSUBD
1193 OpARMMULF
1194 OpARMMULD
1195 OpARMNMULF
1196 OpARMNMULD
1197 OpARMDIVF
1198 OpARMDIVD
1199 OpARMMULAF
1200 OpARMMULAD
1201 OpARMMULSF
1202 OpARMMULSD
1203 OpARMFMULAD
1204 OpARMAND
1205 OpARMANDconst
1206 OpARMOR
1207 OpARMORconst
1208 OpARMXOR
1209 OpARMXORconst
1210 OpARMBIC
1211 OpARMBICconst
1212 OpARMBFX
1213 OpARMBFXU
1214 OpARMMVN
1215 OpARMNEGF
1216 OpARMNEGD
1217 OpARMSQRTD
1218 OpARMSQRTF
1219 OpARMABSD
1220 OpARMCLZ
1221 OpARMREV
1222 OpARMREV16
1223 OpARMRBIT
1224 OpARMSLL
1225 OpARMSLLconst
1226 OpARMSRL
1227 OpARMSRLconst
1228 OpARMSRA
1229 OpARMSRAconst
1230 OpARMSRR
1231 OpARMSRRconst
1232 OpARMADDshiftLL
1233 OpARMADDshiftRL
1234 OpARMADDshiftRA
1235 OpARMSUBshiftLL
1236 OpARMSUBshiftRL
1237 OpARMSUBshiftRA
1238 OpARMRSBshiftLL
1239 OpARMRSBshiftRL
1240 OpARMRSBshiftRA
1241 OpARMANDshiftLL
1242 OpARMANDshiftRL
1243 OpARMANDshiftRA
1244 OpARMORshiftLL
1245 OpARMORshiftRL
1246 OpARMORshiftRA
1247 OpARMXORshiftLL
1248 OpARMXORshiftRL
1249 OpARMXORshiftRA
1250 OpARMXORshiftRR
1251 OpARMBICshiftLL
1252 OpARMBICshiftRL
1253 OpARMBICshiftRA
1254 OpARMMVNshiftLL
1255 OpARMMVNshiftRL
1256 OpARMMVNshiftRA
1257 OpARMADCshiftLL
1258 OpARMADCshiftRL
1259 OpARMADCshiftRA
1260 OpARMSBCshiftLL
1261 OpARMSBCshiftRL
1262 OpARMSBCshiftRA
1263 OpARMRSCshiftLL
1264 OpARMRSCshiftRL
1265 OpARMRSCshiftRA
1266 OpARMADDSshiftLL
1267 OpARMADDSshiftRL
1268 OpARMADDSshiftRA
1269 OpARMSUBSshiftLL
1270 OpARMSUBSshiftRL
1271 OpARMSUBSshiftRA
1272 OpARMRSBSshiftLL
1273 OpARMRSBSshiftRL
1274 OpARMRSBSshiftRA
1275 OpARMADDshiftLLreg
1276 OpARMADDshiftRLreg
1277 OpARMADDshiftRAreg
1278 OpARMSUBshiftLLreg
1279 OpARMSUBshiftRLreg
1280 OpARMSUBshiftRAreg
1281 OpARMRSBshiftLLreg
1282 OpARMRSBshiftRLreg
1283 OpARMRSBshiftRAreg
1284 OpARMANDshiftLLreg
1285 OpARMANDshiftRLreg
1286 OpARMANDshiftRAreg
1287 OpARMORshiftLLreg
1288 OpARMORshiftRLreg
1289 OpARMORshiftRAreg
1290 OpARMXORshiftLLreg
1291 OpARMXORshiftRLreg
1292 OpARMXORshiftRAreg
1293 OpARMBICshiftLLreg
1294 OpARMBICshiftRLreg
1295 OpARMBICshiftRAreg
1296 OpARMMVNshiftLLreg
1297 OpARMMVNshiftRLreg
1298 OpARMMVNshiftRAreg
1299 OpARMADCshiftLLreg
1300 OpARMADCshiftRLreg
1301 OpARMADCshiftRAreg
1302 OpARMSBCshiftLLreg
1303 OpARMSBCshiftRLreg
1304 OpARMSBCshiftRAreg
1305 OpARMRSCshiftLLreg
1306 OpARMRSCshiftRLreg
1307 OpARMRSCshiftRAreg
1308 OpARMADDSshiftLLreg
1309 OpARMADDSshiftRLreg
1310 OpARMADDSshiftRAreg
1311 OpARMSUBSshiftLLreg
1312 OpARMSUBSshiftRLreg
1313 OpARMSUBSshiftRAreg
1314 OpARMRSBSshiftLLreg
1315 OpARMRSBSshiftRLreg
1316 OpARMRSBSshiftRAreg
1317 OpARMCMP
1318 OpARMCMPconst
1319 OpARMCMN
1320 OpARMCMNconst
1321 OpARMTST
1322 OpARMTSTconst
1323 OpARMTEQ
1324 OpARMTEQconst
1325 OpARMCMPF
1326 OpARMCMPD
1327 OpARMCMPshiftLL
1328 OpARMCMPshiftRL
1329 OpARMCMPshiftRA
1330 OpARMCMNshiftLL
1331 OpARMCMNshiftRL
1332 OpARMCMNshiftRA
1333 OpARMTSTshiftLL
1334 OpARMTSTshiftRL
1335 OpARMTSTshiftRA
1336 OpARMTEQshiftLL
1337 OpARMTEQshiftRL
1338 OpARMTEQshiftRA
1339 OpARMCMPshiftLLreg
1340 OpARMCMPshiftRLreg
1341 OpARMCMPshiftRAreg
1342 OpARMCMNshiftLLreg
1343 OpARMCMNshiftRLreg
1344 OpARMCMNshiftRAreg
1345 OpARMTSTshiftLLreg
1346 OpARMTSTshiftRLreg
1347 OpARMTSTshiftRAreg
1348 OpARMTEQshiftLLreg
1349 OpARMTEQshiftRLreg
1350 OpARMTEQshiftRAreg
1351 OpARMCMPF0
1352 OpARMCMPD0
1353 OpARMMOVWconst
1354 OpARMMOVFconst
1355 OpARMMOVDconst
1356 OpARMMOVWaddr
1357 OpARMMOVBload
1358 OpARMMOVBUload
1359 OpARMMOVHload
1360 OpARMMOVHUload
1361 OpARMMOVWload
1362 OpARMMOVFload
1363 OpARMMOVDload
1364 OpARMMOVBstore
1365 OpARMMOVHstore
1366 OpARMMOVWstore
1367 OpARMMOVFstore
1368 OpARMMOVDstore
1369 OpARMMOVWloadidx
1370 OpARMMOVWloadshiftLL
1371 OpARMMOVWloadshiftRL
1372 OpARMMOVWloadshiftRA
1373 OpARMMOVBUloadidx
1374 OpARMMOVBloadidx
1375 OpARMMOVHUloadidx
1376 OpARMMOVHloadidx
1377 OpARMMOVWstoreidx
1378 OpARMMOVWstoreshiftLL
1379 OpARMMOVWstoreshiftRL
1380 OpARMMOVWstoreshiftRA
1381 OpARMMOVBstoreidx
1382 OpARMMOVHstoreidx
1383 OpARMMOVBreg
1384 OpARMMOVBUreg
1385 OpARMMOVHreg
1386 OpARMMOVHUreg
1387 OpARMMOVWreg
1388 OpARMMOVWnop
1389 OpARMMOVWF
1390 OpARMMOVWD
1391 OpARMMOVWUF
1392 OpARMMOVWUD
1393 OpARMMOVFW
1394 OpARMMOVDW
1395 OpARMMOVFWU
1396 OpARMMOVDWU
1397 OpARMMOVFD
1398 OpARMMOVDF
1399 OpARMCMOVWHSconst
1400 OpARMCMOVWLSconst
1401 OpARMSRAcond
1402 OpARMCALLstatic
1403 OpARMCALLtail
1404 OpARMCALLclosure
1405 OpARMCALLinter
1406 OpARMLoweredNilCheck
1407 OpARMEqual
1408 OpARMNotEqual
1409 OpARMLessThan
1410 OpARMLessEqual
1411 OpARMGreaterThan
1412 OpARMGreaterEqual
1413 OpARMLessThanU
1414 OpARMLessEqualU
1415 OpARMGreaterThanU
1416 OpARMGreaterEqualU
1417 OpARMDUFFZERO
1418 OpARMDUFFCOPY
1419 OpARMLoweredZero
1420 OpARMLoweredMove
1421 OpARMLoweredGetClosurePtr
1422 OpARMLoweredGetCallerSP
1423 OpARMLoweredGetCallerPC
1424 OpARMLoweredPanicBoundsA
1425 OpARMLoweredPanicBoundsB
1426 OpARMLoweredPanicBoundsC
1427 OpARMLoweredPanicExtendA
1428 OpARMLoweredPanicExtendB
1429 OpARMLoweredPanicExtendC
1430 OpARMFlagConstant
1431 OpARMInvertFlags
1432 OpARMLoweredWB
1433
1434 OpARM64ADCSflags
1435 OpARM64ADCzerocarry
1436 OpARM64ADD
1437 OpARM64ADDconst
1438 OpARM64ADDSconstflags
1439 OpARM64ADDSflags
1440 OpARM64SUB
1441 OpARM64SUBconst
1442 OpARM64SBCSflags
1443 OpARM64SUBSflags
1444 OpARM64MUL
1445 OpARM64MULW
1446 OpARM64MNEG
1447 OpARM64MNEGW
1448 OpARM64MULH
1449 OpARM64UMULH
1450 OpARM64MULL
1451 OpARM64UMULL
1452 OpARM64DIV
1453 OpARM64UDIV
1454 OpARM64DIVW
1455 OpARM64UDIVW
1456 OpARM64MOD
1457 OpARM64UMOD
1458 OpARM64MODW
1459 OpARM64UMODW
1460 OpARM64FADDS
1461 OpARM64FADDD
1462 OpARM64FSUBS
1463 OpARM64FSUBD
1464 OpARM64FMULS
1465 OpARM64FMULD
1466 OpARM64FNMULS
1467 OpARM64FNMULD
1468 OpARM64FDIVS
1469 OpARM64FDIVD
1470 OpARM64AND
1471 OpARM64ANDconst
1472 OpARM64OR
1473 OpARM64ORconst
1474 OpARM64XOR
1475 OpARM64XORconst
1476 OpARM64BIC
1477 OpARM64EON
1478 OpARM64ORN
1479 OpARM64MVN
1480 OpARM64NEG
1481 OpARM64NEGSflags
1482 OpARM64NGCzerocarry
1483 OpARM64FABSD
1484 OpARM64FNEGS
1485 OpARM64FNEGD
1486 OpARM64FSQRTD
1487 OpARM64FSQRTS
1488 OpARM64FMIND
1489 OpARM64FMINS
1490 OpARM64FMAXD
1491 OpARM64FMAXS
1492 OpARM64REV
1493 OpARM64REVW
1494 OpARM64REV16
1495 OpARM64REV16W
1496 OpARM64RBIT
1497 OpARM64RBITW
1498 OpARM64CLZ
1499 OpARM64CLZW
1500 OpARM64VCNT
1501 OpARM64VUADDLV
1502 OpARM64LoweredRound32F
1503 OpARM64LoweredRound64F
1504 OpARM64FMADDS
1505 OpARM64FMADDD
1506 OpARM64FNMADDS
1507 OpARM64FNMADDD
1508 OpARM64FMSUBS
1509 OpARM64FMSUBD
1510 OpARM64FNMSUBS
1511 OpARM64FNMSUBD
1512 OpARM64MADD
1513 OpARM64MADDW
1514 OpARM64MSUB
1515 OpARM64MSUBW
1516 OpARM64SLL
1517 OpARM64SLLconst
1518 OpARM64SRL
1519 OpARM64SRLconst
1520 OpARM64SRA
1521 OpARM64SRAconst
1522 OpARM64ROR
1523 OpARM64RORW
1524 OpARM64RORconst
1525 OpARM64RORWconst
1526 OpARM64EXTRconst
1527 OpARM64EXTRWconst
1528 OpARM64CMP
1529 OpARM64CMPconst
1530 OpARM64CMPW
1531 OpARM64CMPWconst
1532 OpARM64CMN
1533 OpARM64CMNconst
1534 OpARM64CMNW
1535 OpARM64CMNWconst
1536 OpARM64TST
1537 OpARM64TSTconst
1538 OpARM64TSTW
1539 OpARM64TSTWconst
1540 OpARM64FCMPS
1541 OpARM64FCMPD
1542 OpARM64FCMPS0
1543 OpARM64FCMPD0
1544 OpARM64MVNshiftLL
1545 OpARM64MVNshiftRL
1546 OpARM64MVNshiftRA
1547 OpARM64MVNshiftRO
1548 OpARM64NEGshiftLL
1549 OpARM64NEGshiftRL
1550 OpARM64NEGshiftRA
1551 OpARM64ADDshiftLL
1552 OpARM64ADDshiftRL
1553 OpARM64ADDshiftRA
1554 OpARM64SUBshiftLL
1555 OpARM64SUBshiftRL
1556 OpARM64SUBshiftRA
1557 OpARM64ANDshiftLL
1558 OpARM64ANDshiftRL
1559 OpARM64ANDshiftRA
1560 OpARM64ANDshiftRO
1561 OpARM64ORshiftLL
1562 OpARM64ORshiftRL
1563 OpARM64ORshiftRA
1564 OpARM64ORshiftRO
1565 OpARM64XORshiftLL
1566 OpARM64XORshiftRL
1567 OpARM64XORshiftRA
1568 OpARM64XORshiftRO
1569 OpARM64BICshiftLL
1570 OpARM64BICshiftRL
1571 OpARM64BICshiftRA
1572 OpARM64BICshiftRO
1573 OpARM64EONshiftLL
1574 OpARM64EONshiftRL
1575 OpARM64EONshiftRA
1576 OpARM64EONshiftRO
1577 OpARM64ORNshiftLL
1578 OpARM64ORNshiftRL
1579 OpARM64ORNshiftRA
1580 OpARM64ORNshiftRO
1581 OpARM64CMPshiftLL
1582 OpARM64CMPshiftRL
1583 OpARM64CMPshiftRA
1584 OpARM64CMNshiftLL
1585 OpARM64CMNshiftRL
1586 OpARM64CMNshiftRA
1587 OpARM64TSTshiftLL
1588 OpARM64TSTshiftRL
1589 OpARM64TSTshiftRA
1590 OpARM64TSTshiftRO
1591 OpARM64BFI
1592 OpARM64BFXIL
1593 OpARM64SBFIZ
1594 OpARM64SBFX
1595 OpARM64UBFIZ
1596 OpARM64UBFX
1597 OpARM64MOVDconst
1598 OpARM64FMOVSconst
1599 OpARM64FMOVDconst
1600 OpARM64MOVDaddr
1601 OpARM64MOVBload
1602 OpARM64MOVBUload
1603 OpARM64MOVHload
1604 OpARM64MOVHUload
1605 OpARM64MOVWload
1606 OpARM64MOVWUload
1607 OpARM64MOVDload
1608 OpARM64FMOVSload
1609 OpARM64FMOVDload
1610 OpARM64LDP
1611 OpARM64LDPW
1612 OpARM64LDPSW
1613 OpARM64FLDPD
1614 OpARM64FLDPS
1615 OpARM64MOVDloadidx
1616 OpARM64MOVWloadidx
1617 OpARM64MOVWUloadidx
1618 OpARM64MOVHloadidx
1619 OpARM64MOVHUloadidx
1620 OpARM64MOVBloadidx
1621 OpARM64MOVBUloadidx
1622 OpARM64FMOVSloadidx
1623 OpARM64FMOVDloadidx
1624 OpARM64MOVHloadidx2
1625 OpARM64MOVHUloadidx2
1626 OpARM64MOVWloadidx4
1627 OpARM64MOVWUloadidx4
1628 OpARM64MOVDloadidx8
1629 OpARM64FMOVSloadidx4
1630 OpARM64FMOVDloadidx8
1631 OpARM64MOVBstore
1632 OpARM64MOVHstore
1633 OpARM64MOVWstore
1634 OpARM64MOVDstore
1635 OpARM64FMOVSstore
1636 OpARM64FMOVDstore
1637 OpARM64STP
1638 OpARM64STPW
1639 OpARM64FSTPD
1640 OpARM64FSTPS
1641 OpARM64MOVBstoreidx
1642 OpARM64MOVHstoreidx
1643 OpARM64MOVWstoreidx
1644 OpARM64MOVDstoreidx
1645 OpARM64FMOVSstoreidx
1646 OpARM64FMOVDstoreidx
1647 OpARM64MOVHstoreidx2
1648 OpARM64MOVWstoreidx4
1649 OpARM64MOVDstoreidx8
1650 OpARM64FMOVSstoreidx4
1651 OpARM64FMOVDstoreidx8
1652 OpARM64FMOVDgpfp
1653 OpARM64FMOVDfpgp
1654 OpARM64FMOVSgpfp
1655 OpARM64FMOVSfpgp
1656 OpARM64MOVBreg
1657 OpARM64MOVBUreg
1658 OpARM64MOVHreg
1659 OpARM64MOVHUreg
1660 OpARM64MOVWreg
1661 OpARM64MOVWUreg
1662 OpARM64MOVDreg
1663 OpARM64MOVDnop
1664 OpARM64SCVTFWS
1665 OpARM64SCVTFWD
1666 OpARM64UCVTFWS
1667 OpARM64UCVTFWD
1668 OpARM64SCVTFS
1669 OpARM64SCVTFD
1670 OpARM64UCVTFS
1671 OpARM64UCVTFD
1672 OpARM64FCVTZSSW
1673 OpARM64FCVTZSDW
1674 OpARM64FCVTZUSW
1675 OpARM64FCVTZUDW
1676 OpARM64FCVTZSS
1677 OpARM64FCVTZSD
1678 OpARM64FCVTZUS
1679 OpARM64FCVTZUD
1680 OpARM64FCVTSD
1681 OpARM64FCVTDS
1682 OpARM64FRINTAD
1683 OpARM64FRINTMD
1684 OpARM64FRINTND
1685 OpARM64FRINTPD
1686 OpARM64FRINTZD
1687 OpARM64CSEL
1688 OpARM64CSEL0
1689 OpARM64CSINC
1690 OpARM64CSINV
1691 OpARM64CSNEG
1692 OpARM64CSETM
1693 OpARM64CALLstatic
1694 OpARM64CALLtail
1695 OpARM64CALLclosure
1696 OpARM64CALLinter
1697 OpARM64LoweredNilCheck
1698 OpARM64Equal
1699 OpARM64NotEqual
1700 OpARM64LessThan
1701 OpARM64LessEqual
1702 OpARM64GreaterThan
1703 OpARM64GreaterEqual
1704 OpARM64LessThanU
1705 OpARM64LessEqualU
1706 OpARM64GreaterThanU
1707 OpARM64GreaterEqualU
1708 OpARM64LessThanF
1709 OpARM64LessEqualF
1710 OpARM64GreaterThanF
1711 OpARM64GreaterEqualF
1712 OpARM64NotLessThanF
1713 OpARM64NotLessEqualF
1714 OpARM64NotGreaterThanF
1715 OpARM64NotGreaterEqualF
1716 OpARM64LessThanNoov
1717 OpARM64GreaterEqualNoov
1718 OpARM64DUFFZERO
1719 OpARM64LoweredZero
1720 OpARM64DUFFCOPY
1721 OpARM64LoweredMove
1722 OpARM64LoweredGetClosurePtr
1723 OpARM64LoweredGetCallerSP
1724 OpARM64LoweredGetCallerPC
1725 OpARM64FlagConstant
1726 OpARM64InvertFlags
1727 OpARM64LDAR
1728 OpARM64LDARB
1729 OpARM64LDARW
1730 OpARM64STLRB
1731 OpARM64STLR
1732 OpARM64STLRW
1733 OpARM64LoweredAtomicExchange64
1734 OpARM64LoweredAtomicExchange32
1735 OpARM64LoweredAtomicExchange8
1736 OpARM64LoweredAtomicExchange64Variant
1737 OpARM64LoweredAtomicExchange32Variant
1738 OpARM64LoweredAtomicExchange8Variant
1739 OpARM64LoweredAtomicAdd64
1740 OpARM64LoweredAtomicAdd32
1741 OpARM64LoweredAtomicAdd64Variant
1742 OpARM64LoweredAtomicAdd32Variant
1743 OpARM64LoweredAtomicCas64
1744 OpARM64LoweredAtomicCas32
1745 OpARM64LoweredAtomicCas64Variant
1746 OpARM64LoweredAtomicCas32Variant
1747 OpARM64LoweredAtomicAnd8
1748 OpARM64LoweredAtomicOr8
1749 OpARM64LoweredAtomicAnd64
1750 OpARM64LoweredAtomicOr64
1751 OpARM64LoweredAtomicAnd32
1752 OpARM64LoweredAtomicOr32
1753 OpARM64LoweredAtomicAnd8Variant
1754 OpARM64LoweredAtomicOr8Variant
1755 OpARM64LoweredAtomicAnd64Variant
1756 OpARM64LoweredAtomicOr64Variant
1757 OpARM64LoweredAtomicAnd32Variant
1758 OpARM64LoweredAtomicOr32Variant
1759 OpARM64LoweredWB
1760 OpARM64LoweredPanicBoundsA
1761 OpARM64LoweredPanicBoundsB
1762 OpARM64LoweredPanicBoundsC
1763 OpARM64PRFM
1764 OpARM64DMB
1765 OpARM64ZERO
1766
1767 OpLOONG64NEGV
1768 OpLOONG64NEGF
1769 OpLOONG64NEGD
1770 OpLOONG64SQRTD
1771 OpLOONG64SQRTF
1772 OpLOONG64ABSD
1773 OpLOONG64CLZW
1774 OpLOONG64CLZV
1775 OpLOONG64CTZW
1776 OpLOONG64CTZV
1777 OpLOONG64REVB2H
1778 OpLOONG64REVB2W
1779 OpLOONG64REVBV
1780 OpLOONG64BITREV4B
1781 OpLOONG64BITREVW
1782 OpLOONG64BITREVV
1783 OpLOONG64VPCNT64
1784 OpLOONG64VPCNT32
1785 OpLOONG64VPCNT16
1786 OpLOONG64ADDV
1787 OpLOONG64ADDVconst
1788 OpLOONG64SUBV
1789 OpLOONG64SUBVconst
1790 OpLOONG64MULV
1791 OpLOONG64MULHV
1792 OpLOONG64MULHVU
1793 OpLOONG64DIVV
1794 OpLOONG64DIVVU
1795 OpLOONG64REMV
1796 OpLOONG64REMVU
1797 OpLOONG64ADDF
1798 OpLOONG64ADDD
1799 OpLOONG64SUBF
1800 OpLOONG64SUBD
1801 OpLOONG64MULF
1802 OpLOONG64MULD
1803 OpLOONG64DIVF
1804 OpLOONG64DIVD
1805 OpLOONG64AND
1806 OpLOONG64ANDconst
1807 OpLOONG64OR
1808 OpLOONG64ORconst
1809 OpLOONG64XOR
1810 OpLOONG64XORconst
1811 OpLOONG64NOR
1812 OpLOONG64NORconst
1813 OpLOONG64FMADDF
1814 OpLOONG64FMADDD
1815 OpLOONG64FMSUBF
1816 OpLOONG64FMSUBD
1817 OpLOONG64FNMADDF
1818 OpLOONG64FNMADDD
1819 OpLOONG64FNMSUBF
1820 OpLOONG64FNMSUBD
1821 OpLOONG64FMINF
1822 OpLOONG64FMIND
1823 OpLOONG64FMAXF
1824 OpLOONG64FMAXD
1825 OpLOONG64MASKEQZ
1826 OpLOONG64MASKNEZ
1827 OpLOONG64FCOPYSGD
1828 OpLOONG64SLL
1829 OpLOONG64SLLV
1830 OpLOONG64SLLconst
1831 OpLOONG64SLLVconst
1832 OpLOONG64SRL
1833 OpLOONG64SRLV
1834 OpLOONG64SRLconst
1835 OpLOONG64SRLVconst
1836 OpLOONG64SRA
1837 OpLOONG64SRAV
1838 OpLOONG64SRAconst
1839 OpLOONG64SRAVconst
1840 OpLOONG64ROTR
1841 OpLOONG64ROTRV
1842 OpLOONG64ROTRconst
1843 OpLOONG64ROTRVconst
1844 OpLOONG64SGT
1845 OpLOONG64SGTconst
1846 OpLOONG64SGTU
1847 OpLOONG64SGTUconst
1848 OpLOONG64CMPEQF
1849 OpLOONG64CMPEQD
1850 OpLOONG64CMPGEF
1851 OpLOONG64CMPGED
1852 OpLOONG64CMPGTF
1853 OpLOONG64CMPGTD
1854 OpLOONG64BSTRPICKW
1855 OpLOONG64BSTRPICKV
1856 OpLOONG64MOVVconst
1857 OpLOONG64MOVFconst
1858 OpLOONG64MOVDconst
1859 OpLOONG64MOVVaddr
1860 OpLOONG64MOVBload
1861 OpLOONG64MOVBUload
1862 OpLOONG64MOVHload
1863 OpLOONG64MOVHUload
1864 OpLOONG64MOVWload
1865 OpLOONG64MOVWUload
1866 OpLOONG64MOVVload
1867 OpLOONG64MOVFload
1868 OpLOONG64MOVDload
1869 OpLOONG64MOVVloadidx
1870 OpLOONG64MOVWloadidx
1871 OpLOONG64MOVWUloadidx
1872 OpLOONG64MOVHloadidx
1873 OpLOONG64MOVHUloadidx
1874 OpLOONG64MOVBloadidx
1875 OpLOONG64MOVBUloadidx
1876 OpLOONG64MOVFloadidx
1877 OpLOONG64MOVDloadidx
1878 OpLOONG64MOVBstore
1879 OpLOONG64MOVHstore
1880 OpLOONG64MOVWstore
1881 OpLOONG64MOVVstore
1882 OpLOONG64MOVFstore
1883 OpLOONG64MOVDstore
1884 OpLOONG64MOVBstoreidx
1885 OpLOONG64MOVHstoreidx
1886 OpLOONG64MOVWstoreidx
1887 OpLOONG64MOVVstoreidx
1888 OpLOONG64MOVFstoreidx
1889 OpLOONG64MOVDstoreidx
1890 OpLOONG64MOVBstorezero
1891 OpLOONG64MOVHstorezero
1892 OpLOONG64MOVWstorezero
1893 OpLOONG64MOVVstorezero
1894 OpLOONG64MOVBstorezeroidx
1895 OpLOONG64MOVHstorezeroidx
1896 OpLOONG64MOVWstorezeroidx
1897 OpLOONG64MOVVstorezeroidx
1898 OpLOONG64MOVWfpgp
1899 OpLOONG64MOVWgpfp
1900 OpLOONG64MOVVfpgp
1901 OpLOONG64MOVVgpfp
1902 OpLOONG64MOVBreg
1903 OpLOONG64MOVBUreg
1904 OpLOONG64MOVHreg
1905 OpLOONG64MOVHUreg
1906 OpLOONG64MOVWreg
1907 OpLOONG64MOVWUreg
1908 OpLOONG64MOVVreg
1909 OpLOONG64MOVVnop
1910 OpLOONG64MOVWF
1911 OpLOONG64MOVWD
1912 OpLOONG64MOVVF
1913 OpLOONG64MOVVD
1914 OpLOONG64TRUNCFW
1915 OpLOONG64TRUNCDW
1916 OpLOONG64TRUNCFV
1917 OpLOONG64TRUNCDV
1918 OpLOONG64MOVFD
1919 OpLOONG64MOVDF
1920 OpLOONG64LoweredRound32F
1921 OpLOONG64LoweredRound64F
1922 OpLOONG64CALLstatic
1923 OpLOONG64CALLtail
1924 OpLOONG64CALLclosure
1925 OpLOONG64CALLinter
1926 OpLOONG64DUFFZERO
1927 OpLOONG64DUFFCOPY
1928 OpLOONG64LoweredZero
1929 OpLOONG64LoweredMove
1930 OpLOONG64LoweredAtomicLoad8
1931 OpLOONG64LoweredAtomicLoad32
1932 OpLOONG64LoweredAtomicLoad64
1933 OpLOONG64LoweredAtomicStore8
1934 OpLOONG64LoweredAtomicStore32
1935 OpLOONG64LoweredAtomicStore64
1936 OpLOONG64LoweredAtomicStore8Variant
1937 OpLOONG64LoweredAtomicStore32Variant
1938 OpLOONG64LoweredAtomicStore64Variant
1939 OpLOONG64LoweredAtomicExchange32
1940 OpLOONG64LoweredAtomicExchange64
1941 OpLOONG64LoweredAtomicExchange8Variant
1942 OpLOONG64LoweredAtomicAdd32
1943 OpLOONG64LoweredAtomicAdd64
1944 OpLOONG64LoweredAtomicCas32
1945 OpLOONG64LoweredAtomicCas64
1946 OpLOONG64LoweredAtomicCas64Variant
1947 OpLOONG64LoweredAtomicCas32Variant
1948 OpLOONG64LoweredAtomicAnd32
1949 OpLOONG64LoweredAtomicOr32
1950 OpLOONG64LoweredAtomicAnd32value
1951 OpLOONG64LoweredAtomicAnd64value
1952 OpLOONG64LoweredAtomicOr32value
1953 OpLOONG64LoweredAtomicOr64value
1954 OpLOONG64LoweredNilCheck
1955 OpLOONG64FPFlagTrue
1956 OpLOONG64FPFlagFalse
1957 OpLOONG64LoweredGetClosurePtr
1958 OpLOONG64LoweredGetCallerSP
1959 OpLOONG64LoweredGetCallerPC
1960 OpLOONG64LoweredWB
1961 OpLOONG64LoweredPubBarrier
1962 OpLOONG64LoweredPanicBoundsA
1963 OpLOONG64LoweredPanicBoundsB
1964 OpLOONG64LoweredPanicBoundsC
1965
1966 OpMIPSADD
1967 OpMIPSADDconst
1968 OpMIPSSUB
1969 OpMIPSSUBconst
1970 OpMIPSMUL
1971 OpMIPSMULT
1972 OpMIPSMULTU
1973 OpMIPSDIV
1974 OpMIPSDIVU
1975 OpMIPSADDF
1976 OpMIPSADDD
1977 OpMIPSSUBF
1978 OpMIPSSUBD
1979 OpMIPSMULF
1980 OpMIPSMULD
1981 OpMIPSDIVF
1982 OpMIPSDIVD
1983 OpMIPSAND
1984 OpMIPSANDconst
1985 OpMIPSOR
1986 OpMIPSORconst
1987 OpMIPSXOR
1988 OpMIPSXORconst
1989 OpMIPSNOR
1990 OpMIPSNORconst
1991 OpMIPSNEG
1992 OpMIPSNEGF
1993 OpMIPSNEGD
1994 OpMIPSABSD
1995 OpMIPSSQRTD
1996 OpMIPSSQRTF
1997 OpMIPSSLL
1998 OpMIPSSLLconst
1999 OpMIPSSRL
2000 OpMIPSSRLconst
2001 OpMIPSSRA
2002 OpMIPSSRAconst
2003 OpMIPSCLZ
2004 OpMIPSSGT
2005 OpMIPSSGTconst
2006 OpMIPSSGTzero
2007 OpMIPSSGTU
2008 OpMIPSSGTUconst
2009 OpMIPSSGTUzero
2010 OpMIPSCMPEQF
2011 OpMIPSCMPEQD
2012 OpMIPSCMPGEF
2013 OpMIPSCMPGED
2014 OpMIPSCMPGTF
2015 OpMIPSCMPGTD
2016 OpMIPSMOVWconst
2017 OpMIPSMOVFconst
2018 OpMIPSMOVDconst
2019 OpMIPSMOVWaddr
2020 OpMIPSMOVBload
2021 OpMIPSMOVBUload
2022 OpMIPSMOVHload
2023 OpMIPSMOVHUload
2024 OpMIPSMOVWload
2025 OpMIPSMOVFload
2026 OpMIPSMOVDload
2027 OpMIPSMOVBstore
2028 OpMIPSMOVHstore
2029 OpMIPSMOVWstore
2030 OpMIPSMOVFstore
2031 OpMIPSMOVDstore
2032 OpMIPSMOVBstorezero
2033 OpMIPSMOVHstorezero
2034 OpMIPSMOVWstorezero
2035 OpMIPSMOVWfpgp
2036 OpMIPSMOVWgpfp
2037 OpMIPSMOVBreg
2038 OpMIPSMOVBUreg
2039 OpMIPSMOVHreg
2040 OpMIPSMOVHUreg
2041 OpMIPSMOVWreg
2042 OpMIPSMOVWnop
2043 OpMIPSCMOVZ
2044 OpMIPSCMOVZzero
2045 OpMIPSMOVWF
2046 OpMIPSMOVWD
2047 OpMIPSTRUNCFW
2048 OpMIPSTRUNCDW
2049 OpMIPSMOVFD
2050 OpMIPSMOVDF
2051 OpMIPSCALLstatic
2052 OpMIPSCALLtail
2053 OpMIPSCALLclosure
2054 OpMIPSCALLinter
2055 OpMIPSLoweredAtomicLoad8
2056 OpMIPSLoweredAtomicLoad32
2057 OpMIPSLoweredAtomicStore8
2058 OpMIPSLoweredAtomicStore32
2059 OpMIPSLoweredAtomicStorezero
2060 OpMIPSLoweredAtomicExchange
2061 OpMIPSLoweredAtomicAdd
2062 OpMIPSLoweredAtomicAddconst
2063 OpMIPSLoweredAtomicCas
2064 OpMIPSLoweredAtomicAnd
2065 OpMIPSLoweredAtomicOr
2066 OpMIPSLoweredZero
2067 OpMIPSLoweredMove
2068 OpMIPSLoweredNilCheck
2069 OpMIPSFPFlagTrue
2070 OpMIPSFPFlagFalse
2071 OpMIPSLoweredGetClosurePtr
2072 OpMIPSLoweredGetCallerSP
2073 OpMIPSLoweredGetCallerPC
2074 OpMIPSLoweredWB
2075 OpMIPSLoweredPanicBoundsA
2076 OpMIPSLoweredPanicBoundsB
2077 OpMIPSLoweredPanicBoundsC
2078 OpMIPSLoweredPanicExtendA
2079 OpMIPSLoweredPanicExtendB
2080 OpMIPSLoweredPanicExtendC
2081
2082 OpMIPS64ADDV
2083 OpMIPS64ADDVconst
2084 OpMIPS64SUBV
2085 OpMIPS64SUBVconst
2086 OpMIPS64MULV
2087 OpMIPS64MULVU
2088 OpMIPS64DIVV
2089 OpMIPS64DIVVU
2090 OpMIPS64ADDF
2091 OpMIPS64ADDD
2092 OpMIPS64SUBF
2093 OpMIPS64SUBD
2094 OpMIPS64MULF
2095 OpMIPS64MULD
2096 OpMIPS64DIVF
2097 OpMIPS64DIVD
2098 OpMIPS64AND
2099 OpMIPS64ANDconst
2100 OpMIPS64OR
2101 OpMIPS64ORconst
2102 OpMIPS64XOR
2103 OpMIPS64XORconst
2104 OpMIPS64NOR
2105 OpMIPS64NORconst
2106 OpMIPS64NEGV
2107 OpMIPS64NEGF
2108 OpMIPS64NEGD
2109 OpMIPS64ABSD
2110 OpMIPS64SQRTD
2111 OpMIPS64SQRTF
2112 OpMIPS64SLLV
2113 OpMIPS64SLLVconst
2114 OpMIPS64SRLV
2115 OpMIPS64SRLVconst
2116 OpMIPS64SRAV
2117 OpMIPS64SRAVconst
2118 OpMIPS64SGT
2119 OpMIPS64SGTconst
2120 OpMIPS64SGTU
2121 OpMIPS64SGTUconst
2122 OpMIPS64CMPEQF
2123 OpMIPS64CMPEQD
2124 OpMIPS64CMPGEF
2125 OpMIPS64CMPGED
2126 OpMIPS64CMPGTF
2127 OpMIPS64CMPGTD
2128 OpMIPS64MOVVconst
2129 OpMIPS64MOVFconst
2130 OpMIPS64MOVDconst
2131 OpMIPS64MOVVaddr
2132 OpMIPS64MOVBload
2133 OpMIPS64MOVBUload
2134 OpMIPS64MOVHload
2135 OpMIPS64MOVHUload
2136 OpMIPS64MOVWload
2137 OpMIPS64MOVWUload
2138 OpMIPS64MOVVload
2139 OpMIPS64MOVFload
2140 OpMIPS64MOVDload
2141 OpMIPS64MOVBstore
2142 OpMIPS64MOVHstore
2143 OpMIPS64MOVWstore
2144 OpMIPS64MOVVstore
2145 OpMIPS64MOVFstore
2146 OpMIPS64MOVDstore
2147 OpMIPS64MOVBstorezero
2148 OpMIPS64MOVHstorezero
2149 OpMIPS64MOVWstorezero
2150 OpMIPS64MOVVstorezero
2151 OpMIPS64MOVWfpgp
2152 OpMIPS64MOVWgpfp
2153 OpMIPS64MOVVfpgp
2154 OpMIPS64MOVVgpfp
2155 OpMIPS64MOVBreg
2156 OpMIPS64MOVBUreg
2157 OpMIPS64MOVHreg
2158 OpMIPS64MOVHUreg
2159 OpMIPS64MOVWreg
2160 OpMIPS64MOVWUreg
2161 OpMIPS64MOVVreg
2162 OpMIPS64MOVVnop
2163 OpMIPS64MOVWF
2164 OpMIPS64MOVWD
2165 OpMIPS64MOVVF
2166 OpMIPS64MOVVD
2167 OpMIPS64TRUNCFW
2168 OpMIPS64TRUNCDW
2169 OpMIPS64TRUNCFV
2170 OpMIPS64TRUNCDV
2171 OpMIPS64MOVFD
2172 OpMIPS64MOVDF
2173 OpMIPS64CALLstatic
2174 OpMIPS64CALLtail
2175 OpMIPS64CALLclosure
2176 OpMIPS64CALLinter
2177 OpMIPS64DUFFZERO
2178 OpMIPS64DUFFCOPY
2179 OpMIPS64LoweredZero
2180 OpMIPS64LoweredMove
2181 OpMIPS64LoweredAtomicAnd32
2182 OpMIPS64LoweredAtomicOr32
2183 OpMIPS64LoweredAtomicLoad8
2184 OpMIPS64LoweredAtomicLoad32
2185 OpMIPS64LoweredAtomicLoad64
2186 OpMIPS64LoweredAtomicStore8
2187 OpMIPS64LoweredAtomicStore32
2188 OpMIPS64LoweredAtomicStore64
2189 OpMIPS64LoweredAtomicStorezero32
2190 OpMIPS64LoweredAtomicStorezero64
2191 OpMIPS64LoweredAtomicExchange32
2192 OpMIPS64LoweredAtomicExchange64
2193 OpMIPS64LoweredAtomicAdd32
2194 OpMIPS64LoweredAtomicAdd64
2195 OpMIPS64LoweredAtomicAddconst32
2196 OpMIPS64LoweredAtomicAddconst64
2197 OpMIPS64LoweredAtomicCas32
2198 OpMIPS64LoweredAtomicCas64
2199 OpMIPS64LoweredNilCheck
2200 OpMIPS64FPFlagTrue
2201 OpMIPS64FPFlagFalse
2202 OpMIPS64LoweredGetClosurePtr
2203 OpMIPS64LoweredGetCallerSP
2204 OpMIPS64LoweredGetCallerPC
2205 OpMIPS64LoweredWB
2206 OpMIPS64LoweredPanicBoundsA
2207 OpMIPS64LoweredPanicBoundsB
2208 OpMIPS64LoweredPanicBoundsC
2209
2210 OpPPC64ADD
2211 OpPPC64ADDCC
2212 OpPPC64ADDconst
2213 OpPPC64ADDCCconst
2214 OpPPC64FADD
2215 OpPPC64FADDS
2216 OpPPC64SUB
2217 OpPPC64SUBCC
2218 OpPPC64SUBFCconst
2219 OpPPC64FSUB
2220 OpPPC64FSUBS
2221 OpPPC64XSMINJDP
2222 OpPPC64XSMAXJDP
2223 OpPPC64MULLD
2224 OpPPC64MULLW
2225 OpPPC64MULLDconst
2226 OpPPC64MULLWconst
2227 OpPPC64MADDLD
2228 OpPPC64MULHD
2229 OpPPC64MULHW
2230 OpPPC64MULHDU
2231 OpPPC64MULHDUCC
2232 OpPPC64MULHWU
2233 OpPPC64FMUL
2234 OpPPC64FMULS
2235 OpPPC64FMADD
2236 OpPPC64FMADDS
2237 OpPPC64FMSUB
2238 OpPPC64FMSUBS
2239 OpPPC64SRAD
2240 OpPPC64SRAW
2241 OpPPC64SRD
2242 OpPPC64SRW
2243 OpPPC64SLD
2244 OpPPC64SLW
2245 OpPPC64ROTL
2246 OpPPC64ROTLW
2247 OpPPC64CLRLSLWI
2248 OpPPC64CLRLSLDI
2249 OpPPC64ADDC
2250 OpPPC64SUBC
2251 OpPPC64ADDCconst
2252 OpPPC64SUBCconst
2253 OpPPC64ADDE
2254 OpPPC64ADDZE
2255 OpPPC64SUBE
2256 OpPPC64ADDZEzero
2257 OpPPC64SUBZEzero
2258 OpPPC64SRADconst
2259 OpPPC64SRAWconst
2260 OpPPC64SRDconst
2261 OpPPC64SRWconst
2262 OpPPC64SLDconst
2263 OpPPC64SLWconst
2264 OpPPC64ROTLconst
2265 OpPPC64ROTLWconst
2266 OpPPC64EXTSWSLconst
2267 OpPPC64RLWINM
2268 OpPPC64RLWNM
2269 OpPPC64RLWMI
2270 OpPPC64RLDICL
2271 OpPPC64RLDICLCC
2272 OpPPC64RLDICR
2273 OpPPC64CNTLZD
2274 OpPPC64CNTLZDCC
2275 OpPPC64CNTLZW
2276 OpPPC64CNTTZD
2277 OpPPC64CNTTZW
2278 OpPPC64POPCNTD
2279 OpPPC64POPCNTW
2280 OpPPC64POPCNTB
2281 OpPPC64FDIV
2282 OpPPC64FDIVS
2283 OpPPC64DIVD
2284 OpPPC64DIVW
2285 OpPPC64DIVDU
2286 OpPPC64DIVWU
2287 OpPPC64MODUD
2288 OpPPC64MODSD
2289 OpPPC64MODUW
2290 OpPPC64MODSW
2291 OpPPC64FCTIDZ
2292 OpPPC64FCTIWZ
2293 OpPPC64FCFID
2294 OpPPC64FCFIDS
2295 OpPPC64FRSP
2296 OpPPC64MFVSRD
2297 OpPPC64MTVSRD
2298 OpPPC64AND
2299 OpPPC64ANDN
2300 OpPPC64ANDNCC
2301 OpPPC64ANDCC
2302 OpPPC64OR
2303 OpPPC64ORN
2304 OpPPC64ORCC
2305 OpPPC64NOR
2306 OpPPC64NORCC
2307 OpPPC64XOR
2308 OpPPC64XORCC
2309 OpPPC64EQV
2310 OpPPC64NEG
2311 OpPPC64NEGCC
2312 OpPPC64BRD
2313 OpPPC64BRW
2314 OpPPC64BRH
2315 OpPPC64FNEG
2316 OpPPC64FSQRT
2317 OpPPC64FSQRTS
2318 OpPPC64FFLOOR
2319 OpPPC64FCEIL
2320 OpPPC64FTRUNC
2321 OpPPC64FROUND
2322 OpPPC64FABS
2323 OpPPC64FNABS
2324 OpPPC64FCPSGN
2325 OpPPC64ORconst
2326 OpPPC64XORconst
2327 OpPPC64ANDCCconst
2328 OpPPC64ANDconst
2329 OpPPC64MOVBreg
2330 OpPPC64MOVBZreg
2331 OpPPC64MOVHreg
2332 OpPPC64MOVHZreg
2333 OpPPC64MOVWreg
2334 OpPPC64MOVWZreg
2335 OpPPC64MOVBZload
2336 OpPPC64MOVHload
2337 OpPPC64MOVHZload
2338 OpPPC64MOVWload
2339 OpPPC64MOVWZload
2340 OpPPC64MOVDload
2341 OpPPC64MOVDBRload
2342 OpPPC64MOVWBRload
2343 OpPPC64MOVHBRload
2344 OpPPC64MOVBZloadidx
2345 OpPPC64MOVHloadidx
2346 OpPPC64MOVHZloadidx
2347 OpPPC64MOVWloadidx
2348 OpPPC64MOVWZloadidx
2349 OpPPC64MOVDloadidx
2350 OpPPC64MOVHBRloadidx
2351 OpPPC64MOVWBRloadidx
2352 OpPPC64MOVDBRloadidx
2353 OpPPC64FMOVDloadidx
2354 OpPPC64FMOVSloadidx
2355 OpPPC64DCBT
2356 OpPPC64MOVDBRstore
2357 OpPPC64MOVWBRstore
2358 OpPPC64MOVHBRstore
2359 OpPPC64FMOVDload
2360 OpPPC64FMOVSload
2361 OpPPC64MOVBstore
2362 OpPPC64MOVHstore
2363 OpPPC64MOVWstore
2364 OpPPC64MOVDstore
2365 OpPPC64FMOVDstore
2366 OpPPC64FMOVSstore
2367 OpPPC64MOVBstoreidx
2368 OpPPC64MOVHstoreidx
2369 OpPPC64MOVWstoreidx
2370 OpPPC64MOVDstoreidx
2371 OpPPC64FMOVDstoreidx
2372 OpPPC64FMOVSstoreidx
2373 OpPPC64MOVHBRstoreidx
2374 OpPPC64MOVWBRstoreidx
2375 OpPPC64MOVDBRstoreidx
2376 OpPPC64MOVBstorezero
2377 OpPPC64MOVHstorezero
2378 OpPPC64MOVWstorezero
2379 OpPPC64MOVDstorezero
2380 OpPPC64MOVDaddr
2381 OpPPC64MOVDconst
2382 OpPPC64FMOVDconst
2383 OpPPC64FMOVSconst
2384 OpPPC64FCMPU
2385 OpPPC64CMP
2386 OpPPC64CMPU
2387 OpPPC64CMPW
2388 OpPPC64CMPWU
2389 OpPPC64CMPconst
2390 OpPPC64CMPUconst
2391 OpPPC64CMPWconst
2392 OpPPC64CMPWUconst
2393 OpPPC64ISEL
2394 OpPPC64ISELZ
2395 OpPPC64SETBC
2396 OpPPC64SETBCR
2397 OpPPC64Equal
2398 OpPPC64NotEqual
2399 OpPPC64LessThan
2400 OpPPC64FLessThan
2401 OpPPC64LessEqual
2402 OpPPC64FLessEqual
2403 OpPPC64GreaterThan
2404 OpPPC64FGreaterThan
2405 OpPPC64GreaterEqual
2406 OpPPC64FGreaterEqual
2407 OpPPC64LoweredGetClosurePtr
2408 OpPPC64LoweredGetCallerSP
2409 OpPPC64LoweredGetCallerPC
2410 OpPPC64LoweredNilCheck
2411 OpPPC64LoweredRound32F
2412 OpPPC64LoweredRound64F
2413 OpPPC64CALLstatic
2414 OpPPC64CALLtail
2415 OpPPC64CALLclosure
2416 OpPPC64CALLinter
2417 OpPPC64LoweredZero
2418 OpPPC64LoweredZeroShort
2419 OpPPC64LoweredQuadZeroShort
2420 OpPPC64LoweredQuadZero
2421 OpPPC64LoweredMove
2422 OpPPC64LoweredMoveShort
2423 OpPPC64LoweredQuadMove
2424 OpPPC64LoweredQuadMoveShort
2425 OpPPC64LoweredAtomicStore8
2426 OpPPC64LoweredAtomicStore32
2427 OpPPC64LoweredAtomicStore64
2428 OpPPC64LoweredAtomicLoad8
2429 OpPPC64LoweredAtomicLoad32
2430 OpPPC64LoweredAtomicLoad64
2431 OpPPC64LoweredAtomicLoadPtr
2432 OpPPC64LoweredAtomicAdd32
2433 OpPPC64LoweredAtomicAdd64
2434 OpPPC64LoweredAtomicExchange8
2435 OpPPC64LoweredAtomicExchange32
2436 OpPPC64LoweredAtomicExchange64
2437 OpPPC64LoweredAtomicCas64
2438 OpPPC64LoweredAtomicCas32
2439 OpPPC64LoweredAtomicAnd8
2440 OpPPC64LoweredAtomicAnd32
2441 OpPPC64LoweredAtomicOr8
2442 OpPPC64LoweredAtomicOr32
2443 OpPPC64LoweredWB
2444 OpPPC64LoweredPubBarrier
2445 OpPPC64LoweredPanicBoundsA
2446 OpPPC64LoweredPanicBoundsB
2447 OpPPC64LoweredPanicBoundsC
2448 OpPPC64InvertFlags
2449 OpPPC64FlagEQ
2450 OpPPC64FlagLT
2451 OpPPC64FlagGT
2452
2453 OpRISCV64ADD
2454 OpRISCV64ADDI
2455 OpRISCV64ADDIW
2456 OpRISCV64NEG
2457 OpRISCV64NEGW
2458 OpRISCV64SUB
2459 OpRISCV64SUBW
2460 OpRISCV64MUL
2461 OpRISCV64MULW
2462 OpRISCV64MULH
2463 OpRISCV64MULHU
2464 OpRISCV64LoweredMuluhilo
2465 OpRISCV64LoweredMuluover
2466 OpRISCV64DIV
2467 OpRISCV64DIVU
2468 OpRISCV64DIVW
2469 OpRISCV64DIVUW
2470 OpRISCV64REM
2471 OpRISCV64REMU
2472 OpRISCV64REMW
2473 OpRISCV64REMUW
2474 OpRISCV64MOVaddr
2475 OpRISCV64MOVDconst
2476 OpRISCV64MOVBload
2477 OpRISCV64MOVHload
2478 OpRISCV64MOVWload
2479 OpRISCV64MOVDload
2480 OpRISCV64MOVBUload
2481 OpRISCV64MOVHUload
2482 OpRISCV64MOVWUload
2483 OpRISCV64MOVBstore
2484 OpRISCV64MOVHstore
2485 OpRISCV64MOVWstore
2486 OpRISCV64MOVDstore
2487 OpRISCV64MOVBstorezero
2488 OpRISCV64MOVHstorezero
2489 OpRISCV64MOVWstorezero
2490 OpRISCV64MOVDstorezero
2491 OpRISCV64MOVBreg
2492 OpRISCV64MOVHreg
2493 OpRISCV64MOVWreg
2494 OpRISCV64MOVDreg
2495 OpRISCV64MOVBUreg
2496 OpRISCV64MOVHUreg
2497 OpRISCV64MOVWUreg
2498 OpRISCV64MOVDnop
2499 OpRISCV64SLL
2500 OpRISCV64SLLW
2501 OpRISCV64SRA
2502 OpRISCV64SRAW
2503 OpRISCV64SRL
2504 OpRISCV64SRLW
2505 OpRISCV64SLLI
2506 OpRISCV64SLLIW
2507 OpRISCV64SRAI
2508 OpRISCV64SRAIW
2509 OpRISCV64SRLI
2510 OpRISCV64SRLIW
2511 OpRISCV64SH1ADD
2512 OpRISCV64SH2ADD
2513 OpRISCV64SH3ADD
2514 OpRISCV64AND
2515 OpRISCV64ANDN
2516 OpRISCV64ANDI
2517 OpRISCV64CLZ
2518 OpRISCV64CLZW
2519 OpRISCV64CPOP
2520 OpRISCV64CPOPW
2521 OpRISCV64CTZ
2522 OpRISCV64CTZW
2523 OpRISCV64NOT
2524 OpRISCV64OR
2525 OpRISCV64ORN
2526 OpRISCV64ORI
2527 OpRISCV64REV8
2528 OpRISCV64ROL
2529 OpRISCV64ROLW
2530 OpRISCV64ROR
2531 OpRISCV64RORI
2532 OpRISCV64RORIW
2533 OpRISCV64RORW
2534 OpRISCV64XNOR
2535 OpRISCV64XOR
2536 OpRISCV64XORI
2537 OpRISCV64MIN
2538 OpRISCV64MAX
2539 OpRISCV64MINU
2540 OpRISCV64MAXU
2541 OpRISCV64SEQZ
2542 OpRISCV64SNEZ
2543 OpRISCV64SLT
2544 OpRISCV64SLTI
2545 OpRISCV64SLTU
2546 OpRISCV64SLTIU
2547 OpRISCV64LoweredRound32F
2548 OpRISCV64LoweredRound64F
2549 OpRISCV64CALLstatic
2550 OpRISCV64CALLtail
2551 OpRISCV64CALLclosure
2552 OpRISCV64CALLinter
2553 OpRISCV64DUFFZERO
2554 OpRISCV64DUFFCOPY
2555 OpRISCV64LoweredZero
2556 OpRISCV64LoweredMove
2557 OpRISCV64LoweredAtomicLoad8
2558 OpRISCV64LoweredAtomicLoad32
2559 OpRISCV64LoweredAtomicLoad64
2560 OpRISCV64LoweredAtomicStore8
2561 OpRISCV64LoweredAtomicStore32
2562 OpRISCV64LoweredAtomicStore64
2563 OpRISCV64LoweredAtomicExchange32
2564 OpRISCV64LoweredAtomicExchange64
2565 OpRISCV64LoweredAtomicAdd32
2566 OpRISCV64LoweredAtomicAdd64
2567 OpRISCV64LoweredAtomicCas32
2568 OpRISCV64LoweredAtomicCas64
2569 OpRISCV64LoweredAtomicAnd32
2570 OpRISCV64LoweredAtomicOr32
2571 OpRISCV64LoweredNilCheck
2572 OpRISCV64LoweredGetClosurePtr
2573 OpRISCV64LoweredGetCallerSP
2574 OpRISCV64LoweredGetCallerPC
2575 OpRISCV64LoweredWB
2576 OpRISCV64LoweredPubBarrier
2577 OpRISCV64LoweredPanicBoundsA
2578 OpRISCV64LoweredPanicBoundsB
2579 OpRISCV64LoweredPanicBoundsC
2580 OpRISCV64FADDS
2581 OpRISCV64FSUBS
2582 OpRISCV64FMULS
2583 OpRISCV64FDIVS
2584 OpRISCV64FMADDS
2585 OpRISCV64FMSUBS
2586 OpRISCV64FNMADDS
2587 OpRISCV64FNMSUBS
2588 OpRISCV64FSQRTS
2589 OpRISCV64FNEGS
2590 OpRISCV64FMVSX
2591 OpRISCV64FCVTSW
2592 OpRISCV64FCVTSL
2593 OpRISCV64FCVTWS
2594 OpRISCV64FCVTLS
2595 OpRISCV64FMOVWload
2596 OpRISCV64FMOVWstore
2597 OpRISCV64FEQS
2598 OpRISCV64FNES
2599 OpRISCV64FLTS
2600 OpRISCV64FLES
2601 OpRISCV64LoweredFMAXS
2602 OpRISCV64LoweredFMINS
2603 OpRISCV64FADDD
2604 OpRISCV64FSUBD
2605 OpRISCV64FMULD
2606 OpRISCV64FDIVD
2607 OpRISCV64FMADDD
2608 OpRISCV64FMSUBD
2609 OpRISCV64FNMADDD
2610 OpRISCV64FNMSUBD
2611 OpRISCV64FSQRTD
2612 OpRISCV64FNEGD
2613 OpRISCV64FABSD
2614 OpRISCV64FSGNJD
2615 OpRISCV64FMVDX
2616 OpRISCV64FCVTDW
2617 OpRISCV64FCVTDL
2618 OpRISCV64FCVTWD
2619 OpRISCV64FCVTLD
2620 OpRISCV64FCVTDS
2621 OpRISCV64FCVTSD
2622 OpRISCV64FMOVDload
2623 OpRISCV64FMOVDstore
2624 OpRISCV64FEQD
2625 OpRISCV64FNED
2626 OpRISCV64FLTD
2627 OpRISCV64FLED
2628 OpRISCV64LoweredFMIND
2629 OpRISCV64LoweredFMAXD
2630
2631 OpS390XFADDS
2632 OpS390XFADD
2633 OpS390XFSUBS
2634 OpS390XFSUB
2635 OpS390XFMULS
2636 OpS390XFMUL
2637 OpS390XFDIVS
2638 OpS390XFDIV
2639 OpS390XFNEGS
2640 OpS390XFNEG
2641 OpS390XFMADDS
2642 OpS390XFMADD
2643 OpS390XFMSUBS
2644 OpS390XFMSUB
2645 OpS390XLPDFR
2646 OpS390XLNDFR
2647 OpS390XCPSDR
2648 OpS390XFIDBR
2649 OpS390XFMOVSload
2650 OpS390XFMOVDload
2651 OpS390XFMOVSconst
2652 OpS390XFMOVDconst
2653 OpS390XFMOVSloadidx
2654 OpS390XFMOVDloadidx
2655 OpS390XFMOVSstore
2656 OpS390XFMOVDstore
2657 OpS390XFMOVSstoreidx
2658 OpS390XFMOVDstoreidx
2659 OpS390XADD
2660 OpS390XADDW
2661 OpS390XADDconst
2662 OpS390XADDWconst
2663 OpS390XADDload
2664 OpS390XADDWload
2665 OpS390XSUB
2666 OpS390XSUBW
2667 OpS390XSUBconst
2668 OpS390XSUBWconst
2669 OpS390XSUBload
2670 OpS390XSUBWload
2671 OpS390XMULLD
2672 OpS390XMULLW
2673 OpS390XMULLDconst
2674 OpS390XMULLWconst
2675 OpS390XMULLDload
2676 OpS390XMULLWload
2677 OpS390XMULHD
2678 OpS390XMULHDU
2679 OpS390XDIVD
2680 OpS390XDIVW
2681 OpS390XDIVDU
2682 OpS390XDIVWU
2683 OpS390XMODD
2684 OpS390XMODW
2685 OpS390XMODDU
2686 OpS390XMODWU
2687 OpS390XAND
2688 OpS390XANDW
2689 OpS390XANDconst
2690 OpS390XANDWconst
2691 OpS390XANDload
2692 OpS390XANDWload
2693 OpS390XOR
2694 OpS390XORW
2695 OpS390XORconst
2696 OpS390XORWconst
2697 OpS390XORload
2698 OpS390XORWload
2699 OpS390XXOR
2700 OpS390XXORW
2701 OpS390XXORconst
2702 OpS390XXORWconst
2703 OpS390XXORload
2704 OpS390XXORWload
2705 OpS390XADDC
2706 OpS390XADDCconst
2707 OpS390XADDE
2708 OpS390XSUBC
2709 OpS390XSUBE
2710 OpS390XCMP
2711 OpS390XCMPW
2712 OpS390XCMPU
2713 OpS390XCMPWU
2714 OpS390XCMPconst
2715 OpS390XCMPWconst
2716 OpS390XCMPUconst
2717 OpS390XCMPWUconst
2718 OpS390XFCMPS
2719 OpS390XFCMP
2720 OpS390XLTDBR
2721 OpS390XLTEBR
2722 OpS390XSLD
2723 OpS390XSLW
2724 OpS390XSLDconst
2725 OpS390XSLWconst
2726 OpS390XSRD
2727 OpS390XSRW
2728 OpS390XSRDconst
2729 OpS390XSRWconst
2730 OpS390XSRAD
2731 OpS390XSRAW
2732 OpS390XSRADconst
2733 OpS390XSRAWconst
2734 OpS390XRLLG
2735 OpS390XRLL
2736 OpS390XRLLconst
2737 OpS390XRXSBG
2738 OpS390XRISBGZ
2739 OpS390XNEG
2740 OpS390XNEGW
2741 OpS390XNOT
2742 OpS390XNOTW
2743 OpS390XFSQRT
2744 OpS390XFSQRTS
2745 OpS390XLOCGR
2746 OpS390XMOVBreg
2747 OpS390XMOVBZreg
2748 OpS390XMOVHreg
2749 OpS390XMOVHZreg
2750 OpS390XMOVWreg
2751 OpS390XMOVWZreg
2752 OpS390XMOVDconst
2753 OpS390XLDGR
2754 OpS390XLGDR
2755 OpS390XCFDBRA
2756 OpS390XCGDBRA
2757 OpS390XCFEBRA
2758 OpS390XCGEBRA
2759 OpS390XCEFBRA
2760 OpS390XCDFBRA
2761 OpS390XCEGBRA
2762 OpS390XCDGBRA
2763 OpS390XCLFEBR
2764 OpS390XCLFDBR
2765 OpS390XCLGEBR
2766 OpS390XCLGDBR
2767 OpS390XCELFBR
2768 OpS390XCDLFBR
2769 OpS390XCELGBR
2770 OpS390XCDLGBR
2771 OpS390XLEDBR
2772 OpS390XLDEBR
2773 OpS390XMOVDaddr
2774 OpS390XMOVDaddridx
2775 OpS390XMOVBZload
2776 OpS390XMOVBload
2777 OpS390XMOVHZload
2778 OpS390XMOVHload
2779 OpS390XMOVWZload
2780 OpS390XMOVWload
2781 OpS390XMOVDload
2782 OpS390XMOVWBR
2783 OpS390XMOVDBR
2784 OpS390XMOVHBRload
2785 OpS390XMOVWBRload
2786 OpS390XMOVDBRload
2787 OpS390XMOVBstore
2788 OpS390XMOVHstore
2789 OpS390XMOVWstore
2790 OpS390XMOVDstore
2791 OpS390XMOVHBRstore
2792 OpS390XMOVWBRstore
2793 OpS390XMOVDBRstore
2794 OpS390XMVC
2795 OpS390XMOVBZloadidx
2796 OpS390XMOVBloadidx
2797 OpS390XMOVHZloadidx
2798 OpS390XMOVHloadidx
2799 OpS390XMOVWZloadidx
2800 OpS390XMOVWloadidx
2801 OpS390XMOVDloadidx
2802 OpS390XMOVHBRloadidx
2803 OpS390XMOVWBRloadidx
2804 OpS390XMOVDBRloadidx
2805 OpS390XMOVBstoreidx
2806 OpS390XMOVHstoreidx
2807 OpS390XMOVWstoreidx
2808 OpS390XMOVDstoreidx
2809 OpS390XMOVHBRstoreidx
2810 OpS390XMOVWBRstoreidx
2811 OpS390XMOVDBRstoreidx
2812 OpS390XMOVBstoreconst
2813 OpS390XMOVHstoreconst
2814 OpS390XMOVWstoreconst
2815 OpS390XMOVDstoreconst
2816 OpS390XCLEAR
2817 OpS390XCALLstatic
2818 OpS390XCALLtail
2819 OpS390XCALLclosure
2820 OpS390XCALLinter
2821 OpS390XInvertFlags
2822 OpS390XLoweredGetG
2823 OpS390XLoweredGetClosurePtr
2824 OpS390XLoweredGetCallerSP
2825 OpS390XLoweredGetCallerPC
2826 OpS390XLoweredNilCheck
2827 OpS390XLoweredRound32F
2828 OpS390XLoweredRound64F
2829 OpS390XLoweredWB
2830 OpS390XLoweredPanicBoundsA
2831 OpS390XLoweredPanicBoundsB
2832 OpS390XLoweredPanicBoundsC
2833 OpS390XFlagEQ
2834 OpS390XFlagLT
2835 OpS390XFlagGT
2836 OpS390XFlagOV
2837 OpS390XSYNC
2838 OpS390XMOVBZatomicload
2839 OpS390XMOVWZatomicload
2840 OpS390XMOVDatomicload
2841 OpS390XMOVBatomicstore
2842 OpS390XMOVWatomicstore
2843 OpS390XMOVDatomicstore
2844 OpS390XLAA
2845 OpS390XLAAG
2846 OpS390XAddTupleFirst32
2847 OpS390XAddTupleFirst64
2848 OpS390XLAN
2849 OpS390XLANfloor
2850 OpS390XLAO
2851 OpS390XLAOfloor
2852 OpS390XLoweredAtomicCas32
2853 OpS390XLoweredAtomicCas64
2854 OpS390XLoweredAtomicExchange32
2855 OpS390XLoweredAtomicExchange64
2856 OpS390XFLOGR
2857 OpS390XPOPCNT
2858 OpS390XMLGR
2859 OpS390XSumBytes2
2860 OpS390XSumBytes4
2861 OpS390XSumBytes8
2862 OpS390XSTMG2
2863 OpS390XSTMG3
2864 OpS390XSTMG4
2865 OpS390XSTM2
2866 OpS390XSTM3
2867 OpS390XSTM4
2868 OpS390XLoweredMove
2869 OpS390XLoweredZero
2870
2871 OpWasmLoweredStaticCall
2872 OpWasmLoweredTailCall
2873 OpWasmLoweredClosureCall
2874 OpWasmLoweredInterCall
2875 OpWasmLoweredAddr
2876 OpWasmLoweredMove
2877 OpWasmLoweredZero
2878 OpWasmLoweredGetClosurePtr
2879 OpWasmLoweredGetCallerPC
2880 OpWasmLoweredGetCallerSP
2881 OpWasmLoweredNilCheck
2882 OpWasmLoweredWB
2883 OpWasmLoweredConvert
2884 OpWasmSelect
2885 OpWasmI64Load8U
2886 OpWasmI64Load8S
2887 OpWasmI64Load16U
2888 OpWasmI64Load16S
2889 OpWasmI64Load32U
2890 OpWasmI64Load32S
2891 OpWasmI64Load
2892 OpWasmI64Store8
2893 OpWasmI64Store16
2894 OpWasmI64Store32
2895 OpWasmI64Store
2896 OpWasmF32Load
2897 OpWasmF64Load
2898 OpWasmF32Store
2899 OpWasmF64Store
2900 OpWasmI64Const
2901 OpWasmF32Const
2902 OpWasmF64Const
2903 OpWasmI64Eqz
2904 OpWasmI64Eq
2905 OpWasmI64Ne
2906 OpWasmI64LtS
2907 OpWasmI64LtU
2908 OpWasmI64GtS
2909 OpWasmI64GtU
2910 OpWasmI64LeS
2911 OpWasmI64LeU
2912 OpWasmI64GeS
2913 OpWasmI64GeU
2914 OpWasmF32Eq
2915 OpWasmF32Ne
2916 OpWasmF32Lt
2917 OpWasmF32Gt
2918 OpWasmF32Le
2919 OpWasmF32Ge
2920 OpWasmF64Eq
2921 OpWasmF64Ne
2922 OpWasmF64Lt
2923 OpWasmF64Gt
2924 OpWasmF64Le
2925 OpWasmF64Ge
2926 OpWasmI64Add
2927 OpWasmI64AddConst
2928 OpWasmI64Sub
2929 OpWasmI64Mul
2930 OpWasmI64DivS
2931 OpWasmI64DivU
2932 OpWasmI64RemS
2933 OpWasmI64RemU
2934 OpWasmI64And
2935 OpWasmI64Or
2936 OpWasmI64Xor
2937 OpWasmI64Shl
2938 OpWasmI64ShrS
2939 OpWasmI64ShrU
2940 OpWasmF32Neg
2941 OpWasmF32Add
2942 OpWasmF32Sub
2943 OpWasmF32Mul
2944 OpWasmF32Div
2945 OpWasmF64Neg
2946 OpWasmF64Add
2947 OpWasmF64Sub
2948 OpWasmF64Mul
2949 OpWasmF64Div
2950 OpWasmI64TruncSatF64S
2951 OpWasmI64TruncSatF64U
2952 OpWasmI64TruncSatF32S
2953 OpWasmI64TruncSatF32U
2954 OpWasmF32ConvertI64S
2955 OpWasmF32ConvertI64U
2956 OpWasmF64ConvertI64S
2957 OpWasmF64ConvertI64U
2958 OpWasmF32DemoteF64
2959 OpWasmF64PromoteF32
2960 OpWasmI64Extend8S
2961 OpWasmI64Extend16S
2962 OpWasmI64Extend32S
2963 OpWasmF32Sqrt
2964 OpWasmF32Trunc
2965 OpWasmF32Ceil
2966 OpWasmF32Floor
2967 OpWasmF32Nearest
2968 OpWasmF32Abs
2969 OpWasmF32Copysign
2970 OpWasmF64Sqrt
2971 OpWasmF64Trunc
2972 OpWasmF64Ceil
2973 OpWasmF64Floor
2974 OpWasmF64Nearest
2975 OpWasmF64Abs
2976 OpWasmF64Copysign
2977 OpWasmI64Ctz
2978 OpWasmI64Clz
2979 OpWasmI32Rotl
2980 OpWasmI64Rotl
2981 OpWasmI64Popcnt
2982
2983 OpAdd8
2984 OpAdd16
2985 OpAdd32
2986 OpAdd64
2987 OpAddPtr
2988 OpAdd32F
2989 OpAdd64F
2990 OpSub8
2991 OpSub16
2992 OpSub32
2993 OpSub64
2994 OpSubPtr
2995 OpSub32F
2996 OpSub64F
2997 OpMul8
2998 OpMul16
2999 OpMul32
3000 OpMul64
3001 OpMul32F
3002 OpMul64F
3003 OpDiv32F
3004 OpDiv64F
3005 OpHmul32
3006 OpHmul32u
3007 OpHmul64
3008 OpHmul64u
3009 OpMul32uhilo
3010 OpMul64uhilo
3011 OpMul32uover
3012 OpMul64uover
3013 OpAvg32u
3014 OpAvg64u
3015 OpDiv8
3016 OpDiv8u
3017 OpDiv16
3018 OpDiv16u
3019 OpDiv32
3020 OpDiv32u
3021 OpDiv64
3022 OpDiv64u
3023 OpDiv128u
3024 OpMod8
3025 OpMod8u
3026 OpMod16
3027 OpMod16u
3028 OpMod32
3029 OpMod32u
3030 OpMod64
3031 OpMod64u
3032 OpAnd8
3033 OpAnd16
3034 OpAnd32
3035 OpAnd64
3036 OpOr8
3037 OpOr16
3038 OpOr32
3039 OpOr64
3040 OpXor8
3041 OpXor16
3042 OpXor32
3043 OpXor64
3044 OpLsh8x8
3045 OpLsh8x16
3046 OpLsh8x32
3047 OpLsh8x64
3048 OpLsh16x8
3049 OpLsh16x16
3050 OpLsh16x32
3051 OpLsh16x64
3052 OpLsh32x8
3053 OpLsh32x16
3054 OpLsh32x32
3055 OpLsh32x64
3056 OpLsh64x8
3057 OpLsh64x16
3058 OpLsh64x32
3059 OpLsh64x64
3060 OpRsh8x8
3061 OpRsh8x16
3062 OpRsh8x32
3063 OpRsh8x64
3064 OpRsh16x8
3065 OpRsh16x16
3066 OpRsh16x32
3067 OpRsh16x64
3068 OpRsh32x8
3069 OpRsh32x16
3070 OpRsh32x32
3071 OpRsh32x64
3072 OpRsh64x8
3073 OpRsh64x16
3074 OpRsh64x32
3075 OpRsh64x64
3076 OpRsh8Ux8
3077 OpRsh8Ux16
3078 OpRsh8Ux32
3079 OpRsh8Ux64
3080 OpRsh16Ux8
3081 OpRsh16Ux16
3082 OpRsh16Ux32
3083 OpRsh16Ux64
3084 OpRsh32Ux8
3085 OpRsh32Ux16
3086 OpRsh32Ux32
3087 OpRsh32Ux64
3088 OpRsh64Ux8
3089 OpRsh64Ux16
3090 OpRsh64Ux32
3091 OpRsh64Ux64
3092 OpEq8
3093 OpEq16
3094 OpEq32
3095 OpEq64
3096 OpEqPtr
3097 OpEqInter
3098 OpEqSlice
3099 OpEq32F
3100 OpEq64F
3101 OpNeq8
3102 OpNeq16
3103 OpNeq32
3104 OpNeq64
3105 OpNeqPtr
3106 OpNeqInter
3107 OpNeqSlice
3108 OpNeq32F
3109 OpNeq64F
3110 OpLess8
3111 OpLess8U
3112 OpLess16
3113 OpLess16U
3114 OpLess32
3115 OpLess32U
3116 OpLess64
3117 OpLess64U
3118 OpLess32F
3119 OpLess64F
3120 OpLeq8
3121 OpLeq8U
3122 OpLeq16
3123 OpLeq16U
3124 OpLeq32
3125 OpLeq32U
3126 OpLeq64
3127 OpLeq64U
3128 OpLeq32F
3129 OpLeq64F
3130 OpCondSelect
3131 OpAndB
3132 OpOrB
3133 OpEqB
3134 OpNeqB
3135 OpNot
3136 OpNeg8
3137 OpNeg16
3138 OpNeg32
3139 OpNeg64
3140 OpNeg32F
3141 OpNeg64F
3142 OpCom8
3143 OpCom16
3144 OpCom32
3145 OpCom64
3146 OpCtz8
3147 OpCtz16
3148 OpCtz32
3149 OpCtz64
3150 OpCtz64On32
3151 OpCtz8NonZero
3152 OpCtz16NonZero
3153 OpCtz32NonZero
3154 OpCtz64NonZero
3155 OpBitLen8
3156 OpBitLen16
3157 OpBitLen32
3158 OpBitLen64
3159 OpBswap16
3160 OpBswap32
3161 OpBswap64
3162 OpBitRev8
3163 OpBitRev16
3164 OpBitRev32
3165 OpBitRev64
3166 OpPopCount8
3167 OpPopCount16
3168 OpPopCount32
3169 OpPopCount64
3170 OpRotateLeft64
3171 OpRotateLeft32
3172 OpRotateLeft16
3173 OpRotateLeft8
3174 OpSqrt
3175 OpSqrt32
3176 OpFloor
3177 OpCeil
3178 OpTrunc
3179 OpRound
3180 OpRoundToEven
3181 OpAbs
3182 OpCopysign
3183 OpMin64
3184 OpMax64
3185 OpMin64u
3186 OpMax64u
3187 OpMin64F
3188 OpMin32F
3189 OpMax64F
3190 OpMax32F
3191 OpFMA
3192 OpPhi
3193 OpCopy
3194 OpConvert
3195 OpConstBool
3196 OpConstString
3197 OpConstNil
3198 OpConst8
3199 OpConst16
3200 OpConst32
3201 OpConst64
3202 OpConst32F
3203 OpConst64F
3204 OpConstInterface
3205 OpConstSlice
3206 OpInitMem
3207 OpArg
3208 OpArgIntReg
3209 OpArgFloatReg
3210 OpAddr
3211 OpLocalAddr
3212 OpSP
3213 OpSB
3214 OpSPanchored
3215 OpLoad
3216 OpDereference
3217 OpStore
3218 OpMove
3219 OpZero
3220 OpStoreWB
3221 OpMoveWB
3222 OpZeroWB
3223 OpWBend
3224 OpWB
3225 OpHasCPUFeature
3226 OpPanicBounds
3227 OpPanicExtend
3228 OpClosureCall
3229 OpStaticCall
3230 OpInterCall
3231 OpTailCall
3232 OpClosureLECall
3233 OpStaticLECall
3234 OpInterLECall
3235 OpTailLECall
3236 OpSignExt8to16
3237 OpSignExt8to32
3238 OpSignExt8to64
3239 OpSignExt16to32
3240 OpSignExt16to64
3241 OpSignExt32to64
3242 OpZeroExt8to16
3243 OpZeroExt8to32
3244 OpZeroExt8to64
3245 OpZeroExt16to32
3246 OpZeroExt16to64
3247 OpZeroExt32to64
3248 OpTrunc16to8
3249 OpTrunc32to8
3250 OpTrunc32to16
3251 OpTrunc64to8
3252 OpTrunc64to16
3253 OpTrunc64to32
3254 OpCvt32to32F
3255 OpCvt32to64F
3256 OpCvt64to32F
3257 OpCvt64to64F
3258 OpCvt32Fto32
3259 OpCvt32Fto64
3260 OpCvt64Fto32
3261 OpCvt64Fto64
3262 OpCvt32Fto64F
3263 OpCvt64Fto32F
3264 OpCvtBoolToUint8
3265 OpRound32F
3266 OpRound64F
3267 OpIsNonNil
3268 OpIsInBounds
3269 OpIsSliceInBounds
3270 OpNilCheck
3271 OpGetG
3272 OpGetClosurePtr
3273 OpGetCallerPC
3274 OpGetCallerSP
3275 OpPtrIndex
3276 OpOffPtr
3277 OpSliceMake
3278 OpSlicePtr
3279 OpSliceLen
3280 OpSliceCap
3281 OpSlicePtrUnchecked
3282 OpComplexMake
3283 OpComplexReal
3284 OpComplexImag
3285 OpStringMake
3286 OpStringPtr
3287 OpStringLen
3288 OpIMake
3289 OpITab
3290 OpIData
3291 OpStructMake
3292 OpStructSelect
3293 OpArrayMake0
3294 OpArrayMake1
3295 OpArraySelect
3296 OpStoreReg
3297 OpLoadReg
3298 OpFwdRef
3299 OpUnknown
3300 OpVarDef
3301 OpVarLive
3302 OpKeepAlive
3303 OpInlMark
3304 OpInt64Make
3305 OpInt64Hi
3306 OpInt64Lo
3307 OpAdd32carry
3308 OpAdd32withcarry
3309 OpSub32carry
3310 OpSub32withcarry
3311 OpAdd64carry
3312 OpSub64borrow
3313 OpSignmask
3314 OpZeromask
3315 OpSlicemask
3316 OpSpectreIndex
3317 OpSpectreSliceIndex
3318 OpCvt32Uto32F
3319 OpCvt32Uto64F
3320 OpCvt32Fto32U
3321 OpCvt64Fto32U
3322 OpCvt64Uto32F
3323 OpCvt64Uto64F
3324 OpCvt32Fto64U
3325 OpCvt64Fto64U
3326 OpSelect0
3327 OpSelect1
3328 OpMakeTuple
3329 OpSelectN
3330 OpSelectNAddr
3331 OpMakeResult
3332 OpAtomicLoad8
3333 OpAtomicLoad32
3334 OpAtomicLoad64
3335 OpAtomicLoadPtr
3336 OpAtomicLoadAcq32
3337 OpAtomicLoadAcq64
3338 OpAtomicStore8
3339 OpAtomicStore32
3340 OpAtomicStore64
3341 OpAtomicStorePtrNoWB
3342 OpAtomicStoreRel32
3343 OpAtomicStoreRel64
3344 OpAtomicExchange8
3345 OpAtomicExchange32
3346 OpAtomicExchange64
3347 OpAtomicAdd32
3348 OpAtomicAdd64
3349 OpAtomicCompareAndSwap32
3350 OpAtomicCompareAndSwap64
3351 OpAtomicCompareAndSwapRel32
3352 OpAtomicAnd8
3353 OpAtomicOr8
3354 OpAtomicAnd32
3355 OpAtomicOr32
3356 OpAtomicAnd64value
3357 OpAtomicAnd32value
3358 OpAtomicAnd8value
3359 OpAtomicOr64value
3360 OpAtomicOr32value
3361 OpAtomicOr8value
3362 OpAtomicStore8Variant
3363 OpAtomicStore32Variant
3364 OpAtomicStore64Variant
3365 OpAtomicAdd32Variant
3366 OpAtomicAdd64Variant
3367 OpAtomicExchange8Variant
3368 OpAtomicExchange32Variant
3369 OpAtomicExchange64Variant
3370 OpAtomicCompareAndSwap32Variant
3371 OpAtomicCompareAndSwap64Variant
3372 OpAtomicAnd64valueVariant
3373 OpAtomicOr64valueVariant
3374 OpAtomicAnd32valueVariant
3375 OpAtomicOr32valueVariant
3376 OpAtomicAnd8valueVariant
3377 OpAtomicOr8valueVariant
3378 OpPubBarrier
3379 OpClobber
3380 OpClobberReg
3381 OpPrefetchCache
3382 OpPrefetchCacheStreamed
3383 )
3384
3385 var opcodeTable = [...]opInfo{
3386 {name: "OpInvalid"},
3387
3388 {
3389 name: "ADDSS",
3390 argLen: 2,
3391 commutative: true,
3392 resultInArg0: true,
3393 asm: x86.AADDSS,
3394 reg: regInfo{
3395 inputs: []inputInfo{
3396 {0, 65280},
3397 {1, 65280},
3398 },
3399 outputs: []outputInfo{
3400 {0, 65280},
3401 },
3402 },
3403 },
3404 {
3405 name: "ADDSD",
3406 argLen: 2,
3407 commutative: true,
3408 resultInArg0: true,
3409 asm: x86.AADDSD,
3410 reg: regInfo{
3411 inputs: []inputInfo{
3412 {0, 65280},
3413 {1, 65280},
3414 },
3415 outputs: []outputInfo{
3416 {0, 65280},
3417 },
3418 },
3419 },
3420 {
3421 name: "SUBSS",
3422 argLen: 2,
3423 resultInArg0: true,
3424 asm: x86.ASUBSS,
3425 reg: regInfo{
3426 inputs: []inputInfo{
3427 {0, 65280},
3428 {1, 65280},
3429 },
3430 outputs: []outputInfo{
3431 {0, 65280},
3432 },
3433 },
3434 },
3435 {
3436 name: "SUBSD",
3437 argLen: 2,
3438 resultInArg0: true,
3439 asm: x86.ASUBSD,
3440 reg: regInfo{
3441 inputs: []inputInfo{
3442 {0, 65280},
3443 {1, 65280},
3444 },
3445 outputs: []outputInfo{
3446 {0, 65280},
3447 },
3448 },
3449 },
3450 {
3451 name: "MULSS",
3452 argLen: 2,
3453 commutative: true,
3454 resultInArg0: true,
3455 asm: x86.AMULSS,
3456 reg: regInfo{
3457 inputs: []inputInfo{
3458 {0, 65280},
3459 {1, 65280},
3460 },
3461 outputs: []outputInfo{
3462 {0, 65280},
3463 },
3464 },
3465 },
3466 {
3467 name: "MULSD",
3468 argLen: 2,
3469 commutative: true,
3470 resultInArg0: true,
3471 asm: x86.AMULSD,
3472 reg: regInfo{
3473 inputs: []inputInfo{
3474 {0, 65280},
3475 {1, 65280},
3476 },
3477 outputs: []outputInfo{
3478 {0, 65280},
3479 },
3480 },
3481 },
3482 {
3483 name: "DIVSS",
3484 argLen: 2,
3485 resultInArg0: true,
3486 asm: x86.ADIVSS,
3487 reg: regInfo{
3488 inputs: []inputInfo{
3489 {0, 65280},
3490 {1, 65280},
3491 },
3492 outputs: []outputInfo{
3493 {0, 65280},
3494 },
3495 },
3496 },
3497 {
3498 name: "DIVSD",
3499 argLen: 2,
3500 resultInArg0: true,
3501 asm: x86.ADIVSD,
3502 reg: regInfo{
3503 inputs: []inputInfo{
3504 {0, 65280},
3505 {1, 65280},
3506 },
3507 outputs: []outputInfo{
3508 {0, 65280},
3509 },
3510 },
3511 },
3512 {
3513 name: "MOVSSload",
3514 auxType: auxSymOff,
3515 argLen: 2,
3516 faultOnNilArg0: true,
3517 symEffect: SymRead,
3518 asm: x86.AMOVSS,
3519 reg: regInfo{
3520 inputs: []inputInfo{
3521 {0, 65791},
3522 },
3523 outputs: []outputInfo{
3524 {0, 65280},
3525 },
3526 },
3527 },
3528 {
3529 name: "MOVSDload",
3530 auxType: auxSymOff,
3531 argLen: 2,
3532 faultOnNilArg0: true,
3533 symEffect: SymRead,
3534 asm: x86.AMOVSD,
3535 reg: regInfo{
3536 inputs: []inputInfo{
3537 {0, 65791},
3538 },
3539 outputs: []outputInfo{
3540 {0, 65280},
3541 },
3542 },
3543 },
3544 {
3545 name: "MOVSSconst",
3546 auxType: auxFloat32,
3547 argLen: 0,
3548 rematerializeable: true,
3549 asm: x86.AMOVSS,
3550 reg: regInfo{
3551 outputs: []outputInfo{
3552 {0, 65280},
3553 },
3554 },
3555 },
3556 {
3557 name: "MOVSDconst",
3558 auxType: auxFloat64,
3559 argLen: 0,
3560 rematerializeable: true,
3561 asm: x86.AMOVSD,
3562 reg: regInfo{
3563 outputs: []outputInfo{
3564 {0, 65280},
3565 },
3566 },
3567 },
3568 {
3569 name: "MOVSSloadidx1",
3570 auxType: auxSymOff,
3571 argLen: 3,
3572 symEffect: SymRead,
3573 asm: x86.AMOVSS,
3574 reg: regInfo{
3575 inputs: []inputInfo{
3576 {1, 255},
3577 {0, 65791},
3578 },
3579 outputs: []outputInfo{
3580 {0, 65280},
3581 },
3582 },
3583 },
3584 {
3585 name: "MOVSSloadidx4",
3586 auxType: auxSymOff,
3587 argLen: 3,
3588 symEffect: SymRead,
3589 asm: x86.AMOVSS,
3590 reg: regInfo{
3591 inputs: []inputInfo{
3592 {1, 255},
3593 {0, 65791},
3594 },
3595 outputs: []outputInfo{
3596 {0, 65280},
3597 },
3598 },
3599 },
3600 {
3601 name: "MOVSDloadidx1",
3602 auxType: auxSymOff,
3603 argLen: 3,
3604 symEffect: SymRead,
3605 asm: x86.AMOVSD,
3606 reg: regInfo{
3607 inputs: []inputInfo{
3608 {1, 255},
3609 {0, 65791},
3610 },
3611 outputs: []outputInfo{
3612 {0, 65280},
3613 },
3614 },
3615 },
3616 {
3617 name: "MOVSDloadidx8",
3618 auxType: auxSymOff,
3619 argLen: 3,
3620 symEffect: SymRead,
3621 asm: x86.AMOVSD,
3622 reg: regInfo{
3623 inputs: []inputInfo{
3624 {1, 255},
3625 {0, 65791},
3626 },
3627 outputs: []outputInfo{
3628 {0, 65280},
3629 },
3630 },
3631 },
3632 {
3633 name: "MOVSSstore",
3634 auxType: auxSymOff,
3635 argLen: 3,
3636 faultOnNilArg0: true,
3637 symEffect: SymWrite,
3638 asm: x86.AMOVSS,
3639 reg: regInfo{
3640 inputs: []inputInfo{
3641 {1, 65280},
3642 {0, 65791},
3643 },
3644 },
3645 },
3646 {
3647 name: "MOVSDstore",
3648 auxType: auxSymOff,
3649 argLen: 3,
3650 faultOnNilArg0: true,
3651 symEffect: SymWrite,
3652 asm: x86.AMOVSD,
3653 reg: regInfo{
3654 inputs: []inputInfo{
3655 {1, 65280},
3656 {0, 65791},
3657 },
3658 },
3659 },
3660 {
3661 name: "MOVSSstoreidx1",
3662 auxType: auxSymOff,
3663 argLen: 4,
3664 symEffect: SymWrite,
3665 asm: x86.AMOVSS,
3666 reg: regInfo{
3667 inputs: []inputInfo{
3668 {1, 255},
3669 {2, 65280},
3670 {0, 65791},
3671 },
3672 },
3673 },
3674 {
3675 name: "MOVSSstoreidx4",
3676 auxType: auxSymOff,
3677 argLen: 4,
3678 symEffect: SymWrite,
3679 asm: x86.AMOVSS,
3680 reg: regInfo{
3681 inputs: []inputInfo{
3682 {1, 255},
3683 {2, 65280},
3684 {0, 65791},
3685 },
3686 },
3687 },
3688 {
3689 name: "MOVSDstoreidx1",
3690 auxType: auxSymOff,
3691 argLen: 4,
3692 symEffect: SymWrite,
3693 asm: x86.AMOVSD,
3694 reg: regInfo{
3695 inputs: []inputInfo{
3696 {1, 255},
3697 {2, 65280},
3698 {0, 65791},
3699 },
3700 },
3701 },
3702 {
3703 name: "MOVSDstoreidx8",
3704 auxType: auxSymOff,
3705 argLen: 4,
3706 symEffect: SymWrite,
3707 asm: x86.AMOVSD,
3708 reg: regInfo{
3709 inputs: []inputInfo{
3710 {1, 255},
3711 {2, 65280},
3712 {0, 65791},
3713 },
3714 },
3715 },
3716 {
3717 name: "ADDSSload",
3718 auxType: auxSymOff,
3719 argLen: 3,
3720 resultInArg0: true,
3721 faultOnNilArg1: true,
3722 symEffect: SymRead,
3723 asm: x86.AADDSS,
3724 reg: regInfo{
3725 inputs: []inputInfo{
3726 {0, 65280},
3727 {1, 65791},
3728 },
3729 outputs: []outputInfo{
3730 {0, 65280},
3731 },
3732 },
3733 },
3734 {
3735 name: "ADDSDload",
3736 auxType: auxSymOff,
3737 argLen: 3,
3738 resultInArg0: true,
3739 faultOnNilArg1: true,
3740 symEffect: SymRead,
3741 asm: x86.AADDSD,
3742 reg: regInfo{
3743 inputs: []inputInfo{
3744 {0, 65280},
3745 {1, 65791},
3746 },
3747 outputs: []outputInfo{
3748 {0, 65280},
3749 },
3750 },
3751 },
3752 {
3753 name: "SUBSSload",
3754 auxType: auxSymOff,
3755 argLen: 3,
3756 resultInArg0: true,
3757 faultOnNilArg1: true,
3758 symEffect: SymRead,
3759 asm: x86.ASUBSS,
3760 reg: regInfo{
3761 inputs: []inputInfo{
3762 {0, 65280},
3763 {1, 65791},
3764 },
3765 outputs: []outputInfo{
3766 {0, 65280},
3767 },
3768 },
3769 },
3770 {
3771 name: "SUBSDload",
3772 auxType: auxSymOff,
3773 argLen: 3,
3774 resultInArg0: true,
3775 faultOnNilArg1: true,
3776 symEffect: SymRead,
3777 asm: x86.ASUBSD,
3778 reg: regInfo{
3779 inputs: []inputInfo{
3780 {0, 65280},
3781 {1, 65791},
3782 },
3783 outputs: []outputInfo{
3784 {0, 65280},
3785 },
3786 },
3787 },
3788 {
3789 name: "MULSSload",
3790 auxType: auxSymOff,
3791 argLen: 3,
3792 resultInArg0: true,
3793 faultOnNilArg1: true,
3794 symEffect: SymRead,
3795 asm: x86.AMULSS,
3796 reg: regInfo{
3797 inputs: []inputInfo{
3798 {0, 65280},
3799 {1, 65791},
3800 },
3801 outputs: []outputInfo{
3802 {0, 65280},
3803 },
3804 },
3805 },
3806 {
3807 name: "MULSDload",
3808 auxType: auxSymOff,
3809 argLen: 3,
3810 resultInArg0: true,
3811 faultOnNilArg1: true,
3812 symEffect: SymRead,
3813 asm: x86.AMULSD,
3814 reg: regInfo{
3815 inputs: []inputInfo{
3816 {0, 65280},
3817 {1, 65791},
3818 },
3819 outputs: []outputInfo{
3820 {0, 65280},
3821 },
3822 },
3823 },
3824 {
3825 name: "DIVSSload",
3826 auxType: auxSymOff,
3827 argLen: 3,
3828 resultInArg0: true,
3829 faultOnNilArg1: true,
3830 symEffect: SymRead,
3831 asm: x86.ADIVSS,
3832 reg: regInfo{
3833 inputs: []inputInfo{
3834 {0, 65280},
3835 {1, 65791},
3836 },
3837 outputs: []outputInfo{
3838 {0, 65280},
3839 },
3840 },
3841 },
3842 {
3843 name: "DIVSDload",
3844 auxType: auxSymOff,
3845 argLen: 3,
3846 resultInArg0: true,
3847 faultOnNilArg1: true,
3848 symEffect: SymRead,
3849 asm: x86.ADIVSD,
3850 reg: regInfo{
3851 inputs: []inputInfo{
3852 {0, 65280},
3853 {1, 65791},
3854 },
3855 outputs: []outputInfo{
3856 {0, 65280},
3857 },
3858 },
3859 },
3860 {
3861 name: "ADDL",
3862 argLen: 2,
3863 commutative: true,
3864 clobberFlags: true,
3865 asm: x86.AADDL,
3866 reg: regInfo{
3867 inputs: []inputInfo{
3868 {1, 239},
3869 {0, 255},
3870 },
3871 outputs: []outputInfo{
3872 {0, 239},
3873 },
3874 },
3875 },
3876 {
3877 name: "ADDLconst",
3878 auxType: auxInt32,
3879 argLen: 1,
3880 clobberFlags: true,
3881 asm: x86.AADDL,
3882 reg: regInfo{
3883 inputs: []inputInfo{
3884 {0, 255},
3885 },
3886 outputs: []outputInfo{
3887 {0, 239},
3888 },
3889 },
3890 },
3891 {
3892 name: "ADDLcarry",
3893 argLen: 2,
3894 commutative: true,
3895 resultInArg0: true,
3896 asm: x86.AADDL,
3897 reg: regInfo{
3898 inputs: []inputInfo{
3899 {0, 239},
3900 {1, 239},
3901 },
3902 outputs: []outputInfo{
3903 {1, 0},
3904 {0, 239},
3905 },
3906 },
3907 },
3908 {
3909 name: "ADDLconstcarry",
3910 auxType: auxInt32,
3911 argLen: 1,
3912 resultInArg0: true,
3913 asm: x86.AADDL,
3914 reg: regInfo{
3915 inputs: []inputInfo{
3916 {0, 239},
3917 },
3918 outputs: []outputInfo{
3919 {1, 0},
3920 {0, 239},
3921 },
3922 },
3923 },
3924 {
3925 name: "ADCL",
3926 argLen: 3,
3927 commutative: true,
3928 resultInArg0: true,
3929 clobberFlags: true,
3930 asm: x86.AADCL,
3931 reg: regInfo{
3932 inputs: []inputInfo{
3933 {0, 239},
3934 {1, 239},
3935 },
3936 outputs: []outputInfo{
3937 {0, 239},
3938 },
3939 },
3940 },
3941 {
3942 name: "ADCLconst",
3943 auxType: auxInt32,
3944 argLen: 2,
3945 resultInArg0: true,
3946 clobberFlags: true,
3947 asm: x86.AADCL,
3948 reg: regInfo{
3949 inputs: []inputInfo{
3950 {0, 239},
3951 },
3952 outputs: []outputInfo{
3953 {0, 239},
3954 },
3955 },
3956 },
3957 {
3958 name: "SUBL",
3959 argLen: 2,
3960 resultInArg0: true,
3961 clobberFlags: true,
3962 asm: x86.ASUBL,
3963 reg: regInfo{
3964 inputs: []inputInfo{
3965 {0, 239},
3966 {1, 239},
3967 },
3968 outputs: []outputInfo{
3969 {0, 239},
3970 },
3971 },
3972 },
3973 {
3974 name: "SUBLconst",
3975 auxType: auxInt32,
3976 argLen: 1,
3977 resultInArg0: true,
3978 clobberFlags: true,
3979 asm: x86.ASUBL,
3980 reg: regInfo{
3981 inputs: []inputInfo{
3982 {0, 239},
3983 },
3984 outputs: []outputInfo{
3985 {0, 239},
3986 },
3987 },
3988 },
3989 {
3990 name: "SUBLcarry",
3991 argLen: 2,
3992 resultInArg0: true,
3993 asm: x86.ASUBL,
3994 reg: regInfo{
3995 inputs: []inputInfo{
3996 {0, 239},
3997 {1, 239},
3998 },
3999 outputs: []outputInfo{
4000 {1, 0},
4001 {0, 239},
4002 },
4003 },
4004 },
4005 {
4006 name: "SUBLconstcarry",
4007 auxType: auxInt32,
4008 argLen: 1,
4009 resultInArg0: true,
4010 asm: x86.ASUBL,
4011 reg: regInfo{
4012 inputs: []inputInfo{
4013 {0, 239},
4014 },
4015 outputs: []outputInfo{
4016 {1, 0},
4017 {0, 239},
4018 },
4019 },
4020 },
4021 {
4022 name: "SBBL",
4023 argLen: 3,
4024 resultInArg0: true,
4025 clobberFlags: true,
4026 asm: x86.ASBBL,
4027 reg: regInfo{
4028 inputs: []inputInfo{
4029 {0, 239},
4030 {1, 239},
4031 },
4032 outputs: []outputInfo{
4033 {0, 239},
4034 },
4035 },
4036 },
4037 {
4038 name: "SBBLconst",
4039 auxType: auxInt32,
4040 argLen: 2,
4041 resultInArg0: true,
4042 clobberFlags: true,
4043 asm: x86.ASBBL,
4044 reg: regInfo{
4045 inputs: []inputInfo{
4046 {0, 239},
4047 },
4048 outputs: []outputInfo{
4049 {0, 239},
4050 },
4051 },
4052 },
4053 {
4054 name: "MULL",
4055 argLen: 2,
4056 commutative: true,
4057 resultInArg0: true,
4058 clobberFlags: true,
4059 asm: x86.AIMULL,
4060 reg: regInfo{
4061 inputs: []inputInfo{
4062 {0, 239},
4063 {1, 239},
4064 },
4065 outputs: []outputInfo{
4066 {0, 239},
4067 },
4068 },
4069 },
4070 {
4071 name: "MULLconst",
4072 auxType: auxInt32,
4073 argLen: 1,
4074 clobberFlags: true,
4075 asm: x86.AIMUL3L,
4076 reg: regInfo{
4077 inputs: []inputInfo{
4078 {0, 239},
4079 },
4080 outputs: []outputInfo{
4081 {0, 239},
4082 },
4083 },
4084 },
4085 {
4086 name: "MULLU",
4087 argLen: 2,
4088 commutative: true,
4089 clobberFlags: true,
4090 asm: x86.AMULL,
4091 reg: regInfo{
4092 inputs: []inputInfo{
4093 {0, 1},
4094 {1, 255},
4095 },
4096 clobbers: 4,
4097 outputs: []outputInfo{
4098 {1, 0},
4099 {0, 1},
4100 },
4101 },
4102 },
4103 {
4104 name: "HMULL",
4105 argLen: 2,
4106 commutative: true,
4107 clobberFlags: true,
4108 asm: x86.AIMULL,
4109 reg: regInfo{
4110 inputs: []inputInfo{
4111 {0, 1},
4112 {1, 255},
4113 },
4114 clobbers: 1,
4115 outputs: []outputInfo{
4116 {0, 4},
4117 },
4118 },
4119 },
4120 {
4121 name: "HMULLU",
4122 argLen: 2,
4123 commutative: true,
4124 clobberFlags: true,
4125 asm: x86.AMULL,
4126 reg: regInfo{
4127 inputs: []inputInfo{
4128 {0, 1},
4129 {1, 255},
4130 },
4131 clobbers: 1,
4132 outputs: []outputInfo{
4133 {0, 4},
4134 },
4135 },
4136 },
4137 {
4138 name: "MULLQU",
4139 argLen: 2,
4140 commutative: true,
4141 clobberFlags: true,
4142 asm: x86.AMULL,
4143 reg: regInfo{
4144 inputs: []inputInfo{
4145 {0, 1},
4146 {1, 255},
4147 },
4148 outputs: []outputInfo{
4149 {0, 4},
4150 {1, 1},
4151 },
4152 },
4153 },
4154 {
4155 name: "AVGLU",
4156 argLen: 2,
4157 commutative: true,
4158 resultInArg0: true,
4159 clobberFlags: true,
4160 reg: regInfo{
4161 inputs: []inputInfo{
4162 {0, 239},
4163 {1, 239},
4164 },
4165 outputs: []outputInfo{
4166 {0, 239},
4167 },
4168 },
4169 },
4170 {
4171 name: "DIVL",
4172 auxType: auxBool,
4173 argLen: 2,
4174 clobberFlags: true,
4175 asm: x86.AIDIVL,
4176 reg: regInfo{
4177 inputs: []inputInfo{
4178 {0, 1},
4179 {1, 251},
4180 },
4181 clobbers: 4,
4182 outputs: []outputInfo{
4183 {0, 1},
4184 },
4185 },
4186 },
4187 {
4188 name: "DIVW",
4189 auxType: auxBool,
4190 argLen: 2,
4191 clobberFlags: true,
4192 asm: x86.AIDIVW,
4193 reg: regInfo{
4194 inputs: []inputInfo{
4195 {0, 1},
4196 {1, 251},
4197 },
4198 clobbers: 4,
4199 outputs: []outputInfo{
4200 {0, 1},
4201 },
4202 },
4203 },
4204 {
4205 name: "DIVLU",
4206 argLen: 2,
4207 clobberFlags: true,
4208 asm: x86.ADIVL,
4209 reg: regInfo{
4210 inputs: []inputInfo{
4211 {0, 1},
4212 {1, 251},
4213 },
4214 clobbers: 4,
4215 outputs: []outputInfo{
4216 {0, 1},
4217 },
4218 },
4219 },
4220 {
4221 name: "DIVWU",
4222 argLen: 2,
4223 clobberFlags: true,
4224 asm: x86.ADIVW,
4225 reg: regInfo{
4226 inputs: []inputInfo{
4227 {0, 1},
4228 {1, 251},
4229 },
4230 clobbers: 4,
4231 outputs: []outputInfo{
4232 {0, 1},
4233 },
4234 },
4235 },
4236 {
4237 name: "MODL",
4238 auxType: auxBool,
4239 argLen: 2,
4240 clobberFlags: true,
4241 asm: x86.AIDIVL,
4242 reg: regInfo{
4243 inputs: []inputInfo{
4244 {0, 1},
4245 {1, 251},
4246 },
4247 clobbers: 1,
4248 outputs: []outputInfo{
4249 {0, 4},
4250 },
4251 },
4252 },
4253 {
4254 name: "MODW",
4255 auxType: auxBool,
4256 argLen: 2,
4257 clobberFlags: true,
4258 asm: x86.AIDIVW,
4259 reg: regInfo{
4260 inputs: []inputInfo{
4261 {0, 1},
4262 {1, 251},
4263 },
4264 clobbers: 1,
4265 outputs: []outputInfo{
4266 {0, 4},
4267 },
4268 },
4269 },
4270 {
4271 name: "MODLU",
4272 argLen: 2,
4273 clobberFlags: true,
4274 asm: x86.ADIVL,
4275 reg: regInfo{
4276 inputs: []inputInfo{
4277 {0, 1},
4278 {1, 251},
4279 },
4280 clobbers: 1,
4281 outputs: []outputInfo{
4282 {0, 4},
4283 },
4284 },
4285 },
4286 {
4287 name: "MODWU",
4288 argLen: 2,
4289 clobberFlags: true,
4290 asm: x86.ADIVW,
4291 reg: regInfo{
4292 inputs: []inputInfo{
4293 {0, 1},
4294 {1, 251},
4295 },
4296 clobbers: 1,
4297 outputs: []outputInfo{
4298 {0, 4},
4299 },
4300 },
4301 },
4302 {
4303 name: "ANDL",
4304 argLen: 2,
4305 commutative: true,
4306 resultInArg0: true,
4307 clobberFlags: true,
4308 asm: x86.AANDL,
4309 reg: regInfo{
4310 inputs: []inputInfo{
4311 {0, 239},
4312 {1, 239},
4313 },
4314 outputs: []outputInfo{
4315 {0, 239},
4316 },
4317 },
4318 },
4319 {
4320 name: "ANDLconst",
4321 auxType: auxInt32,
4322 argLen: 1,
4323 resultInArg0: true,
4324 clobberFlags: true,
4325 asm: x86.AANDL,
4326 reg: regInfo{
4327 inputs: []inputInfo{
4328 {0, 239},
4329 },
4330 outputs: []outputInfo{
4331 {0, 239},
4332 },
4333 },
4334 },
4335 {
4336 name: "ORL",
4337 argLen: 2,
4338 commutative: true,
4339 resultInArg0: true,
4340 clobberFlags: true,
4341 asm: x86.AORL,
4342 reg: regInfo{
4343 inputs: []inputInfo{
4344 {0, 239},
4345 {1, 239},
4346 },
4347 outputs: []outputInfo{
4348 {0, 239},
4349 },
4350 },
4351 },
4352 {
4353 name: "ORLconst",
4354 auxType: auxInt32,
4355 argLen: 1,
4356 resultInArg0: true,
4357 clobberFlags: true,
4358 asm: x86.AORL,
4359 reg: regInfo{
4360 inputs: []inputInfo{
4361 {0, 239},
4362 },
4363 outputs: []outputInfo{
4364 {0, 239},
4365 },
4366 },
4367 },
4368 {
4369 name: "XORL",
4370 argLen: 2,
4371 commutative: true,
4372 resultInArg0: true,
4373 clobberFlags: true,
4374 asm: x86.AXORL,
4375 reg: regInfo{
4376 inputs: []inputInfo{
4377 {0, 239},
4378 {1, 239},
4379 },
4380 outputs: []outputInfo{
4381 {0, 239},
4382 },
4383 },
4384 },
4385 {
4386 name: "XORLconst",
4387 auxType: auxInt32,
4388 argLen: 1,
4389 resultInArg0: true,
4390 clobberFlags: true,
4391 asm: x86.AXORL,
4392 reg: regInfo{
4393 inputs: []inputInfo{
4394 {0, 239},
4395 },
4396 outputs: []outputInfo{
4397 {0, 239},
4398 },
4399 },
4400 },
4401 {
4402 name: "CMPL",
4403 argLen: 2,
4404 asm: x86.ACMPL,
4405 reg: regInfo{
4406 inputs: []inputInfo{
4407 {0, 255},
4408 {1, 255},
4409 },
4410 },
4411 },
4412 {
4413 name: "CMPW",
4414 argLen: 2,
4415 asm: x86.ACMPW,
4416 reg: regInfo{
4417 inputs: []inputInfo{
4418 {0, 255},
4419 {1, 255},
4420 },
4421 },
4422 },
4423 {
4424 name: "CMPB",
4425 argLen: 2,
4426 asm: x86.ACMPB,
4427 reg: regInfo{
4428 inputs: []inputInfo{
4429 {0, 255},
4430 {1, 255},
4431 },
4432 },
4433 },
4434 {
4435 name: "CMPLconst",
4436 auxType: auxInt32,
4437 argLen: 1,
4438 asm: x86.ACMPL,
4439 reg: regInfo{
4440 inputs: []inputInfo{
4441 {0, 255},
4442 },
4443 },
4444 },
4445 {
4446 name: "CMPWconst",
4447 auxType: auxInt16,
4448 argLen: 1,
4449 asm: x86.ACMPW,
4450 reg: regInfo{
4451 inputs: []inputInfo{
4452 {0, 255},
4453 },
4454 },
4455 },
4456 {
4457 name: "CMPBconst",
4458 auxType: auxInt8,
4459 argLen: 1,
4460 asm: x86.ACMPB,
4461 reg: regInfo{
4462 inputs: []inputInfo{
4463 {0, 255},
4464 },
4465 },
4466 },
4467 {
4468 name: "CMPLload",
4469 auxType: auxSymOff,
4470 argLen: 3,
4471 faultOnNilArg0: true,
4472 symEffect: SymRead,
4473 asm: x86.ACMPL,
4474 reg: regInfo{
4475 inputs: []inputInfo{
4476 {1, 255},
4477 {0, 65791},
4478 },
4479 },
4480 },
4481 {
4482 name: "CMPWload",
4483 auxType: auxSymOff,
4484 argLen: 3,
4485 faultOnNilArg0: true,
4486 symEffect: SymRead,
4487 asm: x86.ACMPW,
4488 reg: regInfo{
4489 inputs: []inputInfo{
4490 {1, 255},
4491 {0, 65791},
4492 },
4493 },
4494 },
4495 {
4496 name: "CMPBload",
4497 auxType: auxSymOff,
4498 argLen: 3,
4499 faultOnNilArg0: true,
4500 symEffect: SymRead,
4501 asm: x86.ACMPB,
4502 reg: regInfo{
4503 inputs: []inputInfo{
4504 {1, 255},
4505 {0, 65791},
4506 },
4507 },
4508 },
4509 {
4510 name: "CMPLconstload",
4511 auxType: auxSymValAndOff,
4512 argLen: 2,
4513 faultOnNilArg0: true,
4514 symEffect: SymRead,
4515 asm: x86.ACMPL,
4516 reg: regInfo{
4517 inputs: []inputInfo{
4518 {0, 65791},
4519 },
4520 },
4521 },
4522 {
4523 name: "CMPWconstload",
4524 auxType: auxSymValAndOff,
4525 argLen: 2,
4526 faultOnNilArg0: true,
4527 symEffect: SymRead,
4528 asm: x86.ACMPW,
4529 reg: regInfo{
4530 inputs: []inputInfo{
4531 {0, 65791},
4532 },
4533 },
4534 },
4535 {
4536 name: "CMPBconstload",
4537 auxType: auxSymValAndOff,
4538 argLen: 2,
4539 faultOnNilArg0: true,
4540 symEffect: SymRead,
4541 asm: x86.ACMPB,
4542 reg: regInfo{
4543 inputs: []inputInfo{
4544 {0, 65791},
4545 },
4546 },
4547 },
4548 {
4549 name: "UCOMISS",
4550 argLen: 2,
4551 asm: x86.AUCOMISS,
4552 reg: regInfo{
4553 inputs: []inputInfo{
4554 {0, 65280},
4555 {1, 65280},
4556 },
4557 },
4558 },
4559 {
4560 name: "UCOMISD",
4561 argLen: 2,
4562 asm: x86.AUCOMISD,
4563 reg: regInfo{
4564 inputs: []inputInfo{
4565 {0, 65280},
4566 {1, 65280},
4567 },
4568 },
4569 },
4570 {
4571 name: "TESTL",
4572 argLen: 2,
4573 commutative: true,
4574 asm: x86.ATESTL,
4575 reg: regInfo{
4576 inputs: []inputInfo{
4577 {0, 255},
4578 {1, 255},
4579 },
4580 },
4581 },
4582 {
4583 name: "TESTW",
4584 argLen: 2,
4585 commutative: true,
4586 asm: x86.ATESTW,
4587 reg: regInfo{
4588 inputs: []inputInfo{
4589 {0, 255},
4590 {1, 255},
4591 },
4592 },
4593 },
4594 {
4595 name: "TESTB",
4596 argLen: 2,
4597 commutative: true,
4598 asm: x86.ATESTB,
4599 reg: regInfo{
4600 inputs: []inputInfo{
4601 {0, 255},
4602 {1, 255},
4603 },
4604 },
4605 },
4606 {
4607 name: "TESTLconst",
4608 auxType: auxInt32,
4609 argLen: 1,
4610 asm: x86.ATESTL,
4611 reg: regInfo{
4612 inputs: []inputInfo{
4613 {0, 255},
4614 },
4615 },
4616 },
4617 {
4618 name: "TESTWconst",
4619 auxType: auxInt16,
4620 argLen: 1,
4621 asm: x86.ATESTW,
4622 reg: regInfo{
4623 inputs: []inputInfo{
4624 {0, 255},
4625 },
4626 },
4627 },
4628 {
4629 name: "TESTBconst",
4630 auxType: auxInt8,
4631 argLen: 1,
4632 asm: x86.ATESTB,
4633 reg: regInfo{
4634 inputs: []inputInfo{
4635 {0, 255},
4636 },
4637 },
4638 },
4639 {
4640 name: "SHLL",
4641 argLen: 2,
4642 resultInArg0: true,
4643 clobberFlags: true,
4644 asm: x86.ASHLL,
4645 reg: regInfo{
4646 inputs: []inputInfo{
4647 {1, 2},
4648 {0, 239},
4649 },
4650 outputs: []outputInfo{
4651 {0, 239},
4652 },
4653 },
4654 },
4655 {
4656 name: "SHLLconst",
4657 auxType: auxInt32,
4658 argLen: 1,
4659 resultInArg0: true,
4660 clobberFlags: true,
4661 asm: x86.ASHLL,
4662 reg: regInfo{
4663 inputs: []inputInfo{
4664 {0, 239},
4665 },
4666 outputs: []outputInfo{
4667 {0, 239},
4668 },
4669 },
4670 },
4671 {
4672 name: "SHRL",
4673 argLen: 2,
4674 resultInArg0: true,
4675 clobberFlags: true,
4676 asm: x86.ASHRL,
4677 reg: regInfo{
4678 inputs: []inputInfo{
4679 {1, 2},
4680 {0, 239},
4681 },
4682 outputs: []outputInfo{
4683 {0, 239},
4684 },
4685 },
4686 },
4687 {
4688 name: "SHRW",
4689 argLen: 2,
4690 resultInArg0: true,
4691 clobberFlags: true,
4692 asm: x86.ASHRW,
4693 reg: regInfo{
4694 inputs: []inputInfo{
4695 {1, 2},
4696 {0, 239},
4697 },
4698 outputs: []outputInfo{
4699 {0, 239},
4700 },
4701 },
4702 },
4703 {
4704 name: "SHRB",
4705 argLen: 2,
4706 resultInArg0: true,
4707 clobberFlags: true,
4708 asm: x86.ASHRB,
4709 reg: regInfo{
4710 inputs: []inputInfo{
4711 {1, 2},
4712 {0, 239},
4713 },
4714 outputs: []outputInfo{
4715 {0, 239},
4716 },
4717 },
4718 },
4719 {
4720 name: "SHRLconst",
4721 auxType: auxInt32,
4722 argLen: 1,
4723 resultInArg0: true,
4724 clobberFlags: true,
4725 asm: x86.ASHRL,
4726 reg: regInfo{
4727 inputs: []inputInfo{
4728 {0, 239},
4729 },
4730 outputs: []outputInfo{
4731 {0, 239},
4732 },
4733 },
4734 },
4735 {
4736 name: "SHRWconst",
4737 auxType: auxInt16,
4738 argLen: 1,
4739 resultInArg0: true,
4740 clobberFlags: true,
4741 asm: x86.ASHRW,
4742 reg: regInfo{
4743 inputs: []inputInfo{
4744 {0, 239},
4745 },
4746 outputs: []outputInfo{
4747 {0, 239},
4748 },
4749 },
4750 },
4751 {
4752 name: "SHRBconst",
4753 auxType: auxInt8,
4754 argLen: 1,
4755 resultInArg0: true,
4756 clobberFlags: true,
4757 asm: x86.ASHRB,
4758 reg: regInfo{
4759 inputs: []inputInfo{
4760 {0, 239},
4761 },
4762 outputs: []outputInfo{
4763 {0, 239},
4764 },
4765 },
4766 },
4767 {
4768 name: "SARL",
4769 argLen: 2,
4770 resultInArg0: true,
4771 clobberFlags: true,
4772 asm: x86.ASARL,
4773 reg: regInfo{
4774 inputs: []inputInfo{
4775 {1, 2},
4776 {0, 239},
4777 },
4778 outputs: []outputInfo{
4779 {0, 239},
4780 },
4781 },
4782 },
4783 {
4784 name: "SARW",
4785 argLen: 2,
4786 resultInArg0: true,
4787 clobberFlags: true,
4788 asm: x86.ASARW,
4789 reg: regInfo{
4790 inputs: []inputInfo{
4791 {1, 2},
4792 {0, 239},
4793 },
4794 outputs: []outputInfo{
4795 {0, 239},
4796 },
4797 },
4798 },
4799 {
4800 name: "SARB",
4801 argLen: 2,
4802 resultInArg0: true,
4803 clobberFlags: true,
4804 asm: x86.ASARB,
4805 reg: regInfo{
4806 inputs: []inputInfo{
4807 {1, 2},
4808 {0, 239},
4809 },
4810 outputs: []outputInfo{
4811 {0, 239},
4812 },
4813 },
4814 },
4815 {
4816 name: "SARLconst",
4817 auxType: auxInt32,
4818 argLen: 1,
4819 resultInArg0: true,
4820 clobberFlags: true,
4821 asm: x86.ASARL,
4822 reg: regInfo{
4823 inputs: []inputInfo{
4824 {0, 239},
4825 },
4826 outputs: []outputInfo{
4827 {0, 239},
4828 },
4829 },
4830 },
4831 {
4832 name: "SARWconst",
4833 auxType: auxInt16,
4834 argLen: 1,
4835 resultInArg0: true,
4836 clobberFlags: true,
4837 asm: x86.ASARW,
4838 reg: regInfo{
4839 inputs: []inputInfo{
4840 {0, 239},
4841 },
4842 outputs: []outputInfo{
4843 {0, 239},
4844 },
4845 },
4846 },
4847 {
4848 name: "SARBconst",
4849 auxType: auxInt8,
4850 argLen: 1,
4851 resultInArg0: true,
4852 clobberFlags: true,
4853 asm: x86.ASARB,
4854 reg: regInfo{
4855 inputs: []inputInfo{
4856 {0, 239},
4857 },
4858 outputs: []outputInfo{
4859 {0, 239},
4860 },
4861 },
4862 },
4863 {
4864 name: "ROLL",
4865 argLen: 2,
4866 resultInArg0: true,
4867 clobberFlags: true,
4868 asm: x86.AROLL,
4869 reg: regInfo{
4870 inputs: []inputInfo{
4871 {1, 2},
4872 {0, 239},
4873 },
4874 outputs: []outputInfo{
4875 {0, 239},
4876 },
4877 },
4878 },
4879 {
4880 name: "ROLW",
4881 argLen: 2,
4882 resultInArg0: true,
4883 clobberFlags: true,
4884 asm: x86.AROLW,
4885 reg: regInfo{
4886 inputs: []inputInfo{
4887 {1, 2},
4888 {0, 239},
4889 },
4890 outputs: []outputInfo{
4891 {0, 239},
4892 },
4893 },
4894 },
4895 {
4896 name: "ROLB",
4897 argLen: 2,
4898 resultInArg0: true,
4899 clobberFlags: true,
4900 asm: x86.AROLB,
4901 reg: regInfo{
4902 inputs: []inputInfo{
4903 {1, 2},
4904 {0, 239},
4905 },
4906 outputs: []outputInfo{
4907 {0, 239},
4908 },
4909 },
4910 },
4911 {
4912 name: "ROLLconst",
4913 auxType: auxInt32,
4914 argLen: 1,
4915 resultInArg0: true,
4916 clobberFlags: true,
4917 asm: x86.AROLL,
4918 reg: regInfo{
4919 inputs: []inputInfo{
4920 {0, 239},
4921 },
4922 outputs: []outputInfo{
4923 {0, 239},
4924 },
4925 },
4926 },
4927 {
4928 name: "ROLWconst",
4929 auxType: auxInt16,
4930 argLen: 1,
4931 resultInArg0: true,
4932 clobberFlags: true,
4933 asm: x86.AROLW,
4934 reg: regInfo{
4935 inputs: []inputInfo{
4936 {0, 239},
4937 },
4938 outputs: []outputInfo{
4939 {0, 239},
4940 },
4941 },
4942 },
4943 {
4944 name: "ROLBconst",
4945 auxType: auxInt8,
4946 argLen: 1,
4947 resultInArg0: true,
4948 clobberFlags: true,
4949 asm: x86.AROLB,
4950 reg: regInfo{
4951 inputs: []inputInfo{
4952 {0, 239},
4953 },
4954 outputs: []outputInfo{
4955 {0, 239},
4956 },
4957 },
4958 },
4959 {
4960 name: "ADDLload",
4961 auxType: auxSymOff,
4962 argLen: 3,
4963 resultInArg0: true,
4964 clobberFlags: true,
4965 faultOnNilArg1: true,
4966 symEffect: SymRead,
4967 asm: x86.AADDL,
4968 reg: regInfo{
4969 inputs: []inputInfo{
4970 {0, 239},
4971 {1, 65791},
4972 },
4973 outputs: []outputInfo{
4974 {0, 239},
4975 },
4976 },
4977 },
4978 {
4979 name: "SUBLload",
4980 auxType: auxSymOff,
4981 argLen: 3,
4982 resultInArg0: true,
4983 clobberFlags: true,
4984 faultOnNilArg1: true,
4985 symEffect: SymRead,
4986 asm: x86.ASUBL,
4987 reg: regInfo{
4988 inputs: []inputInfo{
4989 {0, 239},
4990 {1, 65791},
4991 },
4992 outputs: []outputInfo{
4993 {0, 239},
4994 },
4995 },
4996 },
4997 {
4998 name: "MULLload",
4999 auxType: auxSymOff,
5000 argLen: 3,
5001 resultInArg0: true,
5002 clobberFlags: true,
5003 faultOnNilArg1: true,
5004 symEffect: SymRead,
5005 asm: x86.AIMULL,
5006 reg: regInfo{
5007 inputs: []inputInfo{
5008 {0, 239},
5009 {1, 65791},
5010 },
5011 outputs: []outputInfo{
5012 {0, 239},
5013 },
5014 },
5015 },
5016 {
5017 name: "ANDLload",
5018 auxType: auxSymOff,
5019 argLen: 3,
5020 resultInArg0: true,
5021 clobberFlags: true,
5022 faultOnNilArg1: true,
5023 symEffect: SymRead,
5024 asm: x86.AANDL,
5025 reg: regInfo{
5026 inputs: []inputInfo{
5027 {0, 239},
5028 {1, 65791},
5029 },
5030 outputs: []outputInfo{
5031 {0, 239},
5032 },
5033 },
5034 },
5035 {
5036 name: "ORLload",
5037 auxType: auxSymOff,
5038 argLen: 3,
5039 resultInArg0: true,
5040 clobberFlags: true,
5041 faultOnNilArg1: true,
5042 symEffect: SymRead,
5043 asm: x86.AORL,
5044 reg: regInfo{
5045 inputs: []inputInfo{
5046 {0, 239},
5047 {1, 65791},
5048 },
5049 outputs: []outputInfo{
5050 {0, 239},
5051 },
5052 },
5053 },
5054 {
5055 name: "XORLload",
5056 auxType: auxSymOff,
5057 argLen: 3,
5058 resultInArg0: true,
5059 clobberFlags: true,
5060 faultOnNilArg1: true,
5061 symEffect: SymRead,
5062 asm: x86.AXORL,
5063 reg: regInfo{
5064 inputs: []inputInfo{
5065 {0, 239},
5066 {1, 65791},
5067 },
5068 outputs: []outputInfo{
5069 {0, 239},
5070 },
5071 },
5072 },
5073 {
5074 name: "ADDLloadidx4",
5075 auxType: auxSymOff,
5076 argLen: 4,
5077 resultInArg0: true,
5078 clobberFlags: true,
5079 symEffect: SymRead,
5080 asm: x86.AADDL,
5081 reg: regInfo{
5082 inputs: []inputInfo{
5083 {0, 239},
5084 {2, 255},
5085 {1, 65791},
5086 },
5087 outputs: []outputInfo{
5088 {0, 239},
5089 },
5090 },
5091 },
5092 {
5093 name: "SUBLloadidx4",
5094 auxType: auxSymOff,
5095 argLen: 4,
5096 resultInArg0: true,
5097 clobberFlags: true,
5098 symEffect: SymRead,
5099 asm: x86.ASUBL,
5100 reg: regInfo{
5101 inputs: []inputInfo{
5102 {0, 239},
5103 {2, 255},
5104 {1, 65791},
5105 },
5106 outputs: []outputInfo{
5107 {0, 239},
5108 },
5109 },
5110 },
5111 {
5112 name: "MULLloadidx4",
5113 auxType: auxSymOff,
5114 argLen: 4,
5115 resultInArg0: true,
5116 clobberFlags: true,
5117 symEffect: SymRead,
5118 asm: x86.AIMULL,
5119 reg: regInfo{
5120 inputs: []inputInfo{
5121 {0, 239},
5122 {2, 255},
5123 {1, 65791},
5124 },
5125 outputs: []outputInfo{
5126 {0, 239},
5127 },
5128 },
5129 },
5130 {
5131 name: "ANDLloadidx4",
5132 auxType: auxSymOff,
5133 argLen: 4,
5134 resultInArg0: true,
5135 clobberFlags: true,
5136 symEffect: SymRead,
5137 asm: x86.AANDL,
5138 reg: regInfo{
5139 inputs: []inputInfo{
5140 {0, 239},
5141 {2, 255},
5142 {1, 65791},
5143 },
5144 outputs: []outputInfo{
5145 {0, 239},
5146 },
5147 },
5148 },
5149 {
5150 name: "ORLloadidx4",
5151 auxType: auxSymOff,
5152 argLen: 4,
5153 resultInArg0: true,
5154 clobberFlags: true,
5155 symEffect: SymRead,
5156 asm: x86.AORL,
5157 reg: regInfo{
5158 inputs: []inputInfo{
5159 {0, 239},
5160 {2, 255},
5161 {1, 65791},
5162 },
5163 outputs: []outputInfo{
5164 {0, 239},
5165 },
5166 },
5167 },
5168 {
5169 name: "XORLloadidx4",
5170 auxType: auxSymOff,
5171 argLen: 4,
5172 resultInArg0: true,
5173 clobberFlags: true,
5174 symEffect: SymRead,
5175 asm: x86.AXORL,
5176 reg: regInfo{
5177 inputs: []inputInfo{
5178 {0, 239},
5179 {2, 255},
5180 {1, 65791},
5181 },
5182 outputs: []outputInfo{
5183 {0, 239},
5184 },
5185 },
5186 },
5187 {
5188 name: "NEGL",
5189 argLen: 1,
5190 resultInArg0: true,
5191 clobberFlags: true,
5192 asm: x86.ANEGL,
5193 reg: regInfo{
5194 inputs: []inputInfo{
5195 {0, 239},
5196 },
5197 outputs: []outputInfo{
5198 {0, 239},
5199 },
5200 },
5201 },
5202 {
5203 name: "NOTL",
5204 argLen: 1,
5205 resultInArg0: true,
5206 asm: x86.ANOTL,
5207 reg: regInfo{
5208 inputs: []inputInfo{
5209 {0, 239},
5210 },
5211 outputs: []outputInfo{
5212 {0, 239},
5213 },
5214 },
5215 },
5216 {
5217 name: "BSFL",
5218 argLen: 1,
5219 clobberFlags: true,
5220 asm: x86.ABSFL,
5221 reg: regInfo{
5222 inputs: []inputInfo{
5223 {0, 239},
5224 },
5225 outputs: []outputInfo{
5226 {0, 239},
5227 },
5228 },
5229 },
5230 {
5231 name: "BSFW",
5232 argLen: 1,
5233 clobberFlags: true,
5234 asm: x86.ABSFW,
5235 reg: regInfo{
5236 inputs: []inputInfo{
5237 {0, 239},
5238 },
5239 outputs: []outputInfo{
5240 {0, 239},
5241 },
5242 },
5243 },
5244 {
5245 name: "LoweredCtz32",
5246 argLen: 1,
5247 clobberFlags: true,
5248 reg: regInfo{
5249 inputs: []inputInfo{
5250 {0, 239},
5251 },
5252 outputs: []outputInfo{
5253 {0, 239},
5254 },
5255 },
5256 },
5257 {
5258 name: "LoweredCtz64",
5259 argLen: 2,
5260 resultNotInArgs: true,
5261 clobberFlags: true,
5262 reg: regInfo{
5263 inputs: []inputInfo{
5264 {0, 239},
5265 {1, 239},
5266 },
5267 outputs: []outputInfo{
5268 {0, 239},
5269 },
5270 },
5271 },
5272 {
5273 name: "BSRL",
5274 argLen: 1,
5275 clobberFlags: true,
5276 asm: x86.ABSRL,
5277 reg: regInfo{
5278 inputs: []inputInfo{
5279 {0, 239},
5280 },
5281 outputs: []outputInfo{
5282 {0, 239},
5283 },
5284 },
5285 },
5286 {
5287 name: "BSRW",
5288 argLen: 1,
5289 clobberFlags: true,
5290 asm: x86.ABSRW,
5291 reg: regInfo{
5292 inputs: []inputInfo{
5293 {0, 239},
5294 },
5295 outputs: []outputInfo{
5296 {0, 239},
5297 },
5298 },
5299 },
5300 {
5301 name: "BSWAPL",
5302 argLen: 1,
5303 resultInArg0: true,
5304 asm: x86.ABSWAPL,
5305 reg: regInfo{
5306 inputs: []inputInfo{
5307 {0, 239},
5308 },
5309 outputs: []outputInfo{
5310 {0, 239},
5311 },
5312 },
5313 },
5314 {
5315 name: "SQRTSD",
5316 argLen: 1,
5317 asm: x86.ASQRTSD,
5318 reg: regInfo{
5319 inputs: []inputInfo{
5320 {0, 65280},
5321 },
5322 outputs: []outputInfo{
5323 {0, 65280},
5324 },
5325 },
5326 },
5327 {
5328 name: "SQRTSS",
5329 argLen: 1,
5330 asm: x86.ASQRTSS,
5331 reg: regInfo{
5332 inputs: []inputInfo{
5333 {0, 65280},
5334 },
5335 outputs: []outputInfo{
5336 {0, 65280},
5337 },
5338 },
5339 },
5340 {
5341 name: "SBBLcarrymask",
5342 argLen: 1,
5343 asm: x86.ASBBL,
5344 reg: regInfo{
5345 outputs: []outputInfo{
5346 {0, 239},
5347 },
5348 },
5349 },
5350 {
5351 name: "SETEQ",
5352 argLen: 1,
5353 asm: x86.ASETEQ,
5354 reg: regInfo{
5355 outputs: []outputInfo{
5356 {0, 239},
5357 },
5358 },
5359 },
5360 {
5361 name: "SETNE",
5362 argLen: 1,
5363 asm: x86.ASETNE,
5364 reg: regInfo{
5365 outputs: []outputInfo{
5366 {0, 239},
5367 },
5368 },
5369 },
5370 {
5371 name: "SETL",
5372 argLen: 1,
5373 asm: x86.ASETLT,
5374 reg: regInfo{
5375 outputs: []outputInfo{
5376 {0, 239},
5377 },
5378 },
5379 },
5380 {
5381 name: "SETLE",
5382 argLen: 1,
5383 asm: x86.ASETLE,
5384 reg: regInfo{
5385 outputs: []outputInfo{
5386 {0, 239},
5387 },
5388 },
5389 },
5390 {
5391 name: "SETG",
5392 argLen: 1,
5393 asm: x86.ASETGT,
5394 reg: regInfo{
5395 outputs: []outputInfo{
5396 {0, 239},
5397 },
5398 },
5399 },
5400 {
5401 name: "SETGE",
5402 argLen: 1,
5403 asm: x86.ASETGE,
5404 reg: regInfo{
5405 outputs: []outputInfo{
5406 {0, 239},
5407 },
5408 },
5409 },
5410 {
5411 name: "SETB",
5412 argLen: 1,
5413 asm: x86.ASETCS,
5414 reg: regInfo{
5415 outputs: []outputInfo{
5416 {0, 239},
5417 },
5418 },
5419 },
5420 {
5421 name: "SETBE",
5422 argLen: 1,
5423 asm: x86.ASETLS,
5424 reg: regInfo{
5425 outputs: []outputInfo{
5426 {0, 239},
5427 },
5428 },
5429 },
5430 {
5431 name: "SETA",
5432 argLen: 1,
5433 asm: x86.ASETHI,
5434 reg: regInfo{
5435 outputs: []outputInfo{
5436 {0, 239},
5437 },
5438 },
5439 },
5440 {
5441 name: "SETAE",
5442 argLen: 1,
5443 asm: x86.ASETCC,
5444 reg: regInfo{
5445 outputs: []outputInfo{
5446 {0, 239},
5447 },
5448 },
5449 },
5450 {
5451 name: "SETO",
5452 argLen: 1,
5453 asm: x86.ASETOS,
5454 reg: regInfo{
5455 outputs: []outputInfo{
5456 {0, 239},
5457 },
5458 },
5459 },
5460 {
5461 name: "SETEQF",
5462 argLen: 1,
5463 clobberFlags: true,
5464 asm: x86.ASETEQ,
5465 reg: regInfo{
5466 clobbers: 1,
5467 outputs: []outputInfo{
5468 {0, 238},
5469 },
5470 },
5471 },
5472 {
5473 name: "SETNEF",
5474 argLen: 1,
5475 clobberFlags: true,
5476 asm: x86.ASETNE,
5477 reg: regInfo{
5478 clobbers: 1,
5479 outputs: []outputInfo{
5480 {0, 238},
5481 },
5482 },
5483 },
5484 {
5485 name: "SETORD",
5486 argLen: 1,
5487 asm: x86.ASETPC,
5488 reg: regInfo{
5489 outputs: []outputInfo{
5490 {0, 239},
5491 },
5492 },
5493 },
5494 {
5495 name: "SETNAN",
5496 argLen: 1,
5497 asm: x86.ASETPS,
5498 reg: regInfo{
5499 outputs: []outputInfo{
5500 {0, 239},
5501 },
5502 },
5503 },
5504 {
5505 name: "SETGF",
5506 argLen: 1,
5507 asm: x86.ASETHI,
5508 reg: regInfo{
5509 outputs: []outputInfo{
5510 {0, 239},
5511 },
5512 },
5513 },
5514 {
5515 name: "SETGEF",
5516 argLen: 1,
5517 asm: x86.ASETCC,
5518 reg: regInfo{
5519 outputs: []outputInfo{
5520 {0, 239},
5521 },
5522 },
5523 },
5524 {
5525 name: "MOVBLSX",
5526 argLen: 1,
5527 asm: x86.AMOVBLSX,
5528 reg: regInfo{
5529 inputs: []inputInfo{
5530 {0, 239},
5531 },
5532 outputs: []outputInfo{
5533 {0, 239},
5534 },
5535 },
5536 },
5537 {
5538 name: "MOVBLZX",
5539 argLen: 1,
5540 asm: x86.AMOVBLZX,
5541 reg: regInfo{
5542 inputs: []inputInfo{
5543 {0, 239},
5544 },
5545 outputs: []outputInfo{
5546 {0, 239},
5547 },
5548 },
5549 },
5550 {
5551 name: "MOVWLSX",
5552 argLen: 1,
5553 asm: x86.AMOVWLSX,
5554 reg: regInfo{
5555 inputs: []inputInfo{
5556 {0, 239},
5557 },
5558 outputs: []outputInfo{
5559 {0, 239},
5560 },
5561 },
5562 },
5563 {
5564 name: "MOVWLZX",
5565 argLen: 1,
5566 asm: x86.AMOVWLZX,
5567 reg: regInfo{
5568 inputs: []inputInfo{
5569 {0, 239},
5570 },
5571 outputs: []outputInfo{
5572 {0, 239},
5573 },
5574 },
5575 },
5576 {
5577 name: "MOVLconst",
5578 auxType: auxInt32,
5579 argLen: 0,
5580 rematerializeable: true,
5581 asm: x86.AMOVL,
5582 reg: regInfo{
5583 outputs: []outputInfo{
5584 {0, 239},
5585 },
5586 },
5587 },
5588 {
5589 name: "CVTTSD2SL",
5590 argLen: 1,
5591 asm: x86.ACVTTSD2SL,
5592 reg: regInfo{
5593 inputs: []inputInfo{
5594 {0, 65280},
5595 },
5596 outputs: []outputInfo{
5597 {0, 239},
5598 },
5599 },
5600 },
5601 {
5602 name: "CVTTSS2SL",
5603 argLen: 1,
5604 asm: x86.ACVTTSS2SL,
5605 reg: regInfo{
5606 inputs: []inputInfo{
5607 {0, 65280},
5608 },
5609 outputs: []outputInfo{
5610 {0, 239},
5611 },
5612 },
5613 },
5614 {
5615 name: "CVTSL2SS",
5616 argLen: 1,
5617 asm: x86.ACVTSL2SS,
5618 reg: regInfo{
5619 inputs: []inputInfo{
5620 {0, 239},
5621 },
5622 outputs: []outputInfo{
5623 {0, 65280},
5624 },
5625 },
5626 },
5627 {
5628 name: "CVTSL2SD",
5629 argLen: 1,
5630 asm: x86.ACVTSL2SD,
5631 reg: regInfo{
5632 inputs: []inputInfo{
5633 {0, 239},
5634 },
5635 outputs: []outputInfo{
5636 {0, 65280},
5637 },
5638 },
5639 },
5640 {
5641 name: "CVTSD2SS",
5642 argLen: 1,
5643 asm: x86.ACVTSD2SS,
5644 reg: regInfo{
5645 inputs: []inputInfo{
5646 {0, 65280},
5647 },
5648 outputs: []outputInfo{
5649 {0, 65280},
5650 },
5651 },
5652 },
5653 {
5654 name: "CVTSS2SD",
5655 argLen: 1,
5656 asm: x86.ACVTSS2SD,
5657 reg: regInfo{
5658 inputs: []inputInfo{
5659 {0, 65280},
5660 },
5661 outputs: []outputInfo{
5662 {0, 65280},
5663 },
5664 },
5665 },
5666 {
5667 name: "PXOR",
5668 argLen: 2,
5669 commutative: true,
5670 resultInArg0: true,
5671 asm: x86.APXOR,
5672 reg: regInfo{
5673 inputs: []inputInfo{
5674 {0, 65280},
5675 {1, 65280},
5676 },
5677 outputs: []outputInfo{
5678 {0, 65280},
5679 },
5680 },
5681 },
5682 {
5683 name: "LEAL",
5684 auxType: auxSymOff,
5685 argLen: 1,
5686 rematerializeable: true,
5687 symEffect: SymAddr,
5688 reg: regInfo{
5689 inputs: []inputInfo{
5690 {0, 65791},
5691 },
5692 outputs: []outputInfo{
5693 {0, 239},
5694 },
5695 },
5696 },
5697 {
5698 name: "LEAL1",
5699 auxType: auxSymOff,
5700 argLen: 2,
5701 commutative: true,
5702 symEffect: SymAddr,
5703 reg: regInfo{
5704 inputs: []inputInfo{
5705 {1, 255},
5706 {0, 65791},
5707 },
5708 outputs: []outputInfo{
5709 {0, 239},
5710 },
5711 },
5712 },
5713 {
5714 name: "LEAL2",
5715 auxType: auxSymOff,
5716 argLen: 2,
5717 symEffect: SymAddr,
5718 reg: regInfo{
5719 inputs: []inputInfo{
5720 {1, 255},
5721 {0, 65791},
5722 },
5723 outputs: []outputInfo{
5724 {0, 239},
5725 },
5726 },
5727 },
5728 {
5729 name: "LEAL4",
5730 auxType: auxSymOff,
5731 argLen: 2,
5732 symEffect: SymAddr,
5733 reg: regInfo{
5734 inputs: []inputInfo{
5735 {1, 255},
5736 {0, 65791},
5737 },
5738 outputs: []outputInfo{
5739 {0, 239},
5740 },
5741 },
5742 },
5743 {
5744 name: "LEAL8",
5745 auxType: auxSymOff,
5746 argLen: 2,
5747 symEffect: SymAddr,
5748 reg: regInfo{
5749 inputs: []inputInfo{
5750 {1, 255},
5751 {0, 65791},
5752 },
5753 outputs: []outputInfo{
5754 {0, 239},
5755 },
5756 },
5757 },
5758 {
5759 name: "MOVBload",
5760 auxType: auxSymOff,
5761 argLen: 2,
5762 faultOnNilArg0: true,
5763 symEffect: SymRead,
5764 asm: x86.AMOVBLZX,
5765 reg: regInfo{
5766 inputs: []inputInfo{
5767 {0, 65791},
5768 },
5769 outputs: []outputInfo{
5770 {0, 239},
5771 },
5772 },
5773 },
5774 {
5775 name: "MOVBLSXload",
5776 auxType: auxSymOff,
5777 argLen: 2,
5778 faultOnNilArg0: true,
5779 symEffect: SymRead,
5780 asm: x86.AMOVBLSX,
5781 reg: regInfo{
5782 inputs: []inputInfo{
5783 {0, 65791},
5784 },
5785 outputs: []outputInfo{
5786 {0, 239},
5787 },
5788 },
5789 },
5790 {
5791 name: "MOVWload",
5792 auxType: auxSymOff,
5793 argLen: 2,
5794 faultOnNilArg0: true,
5795 symEffect: SymRead,
5796 asm: x86.AMOVWLZX,
5797 reg: regInfo{
5798 inputs: []inputInfo{
5799 {0, 65791},
5800 },
5801 outputs: []outputInfo{
5802 {0, 239},
5803 },
5804 },
5805 },
5806 {
5807 name: "MOVWLSXload",
5808 auxType: auxSymOff,
5809 argLen: 2,
5810 faultOnNilArg0: true,
5811 symEffect: SymRead,
5812 asm: x86.AMOVWLSX,
5813 reg: regInfo{
5814 inputs: []inputInfo{
5815 {0, 65791},
5816 },
5817 outputs: []outputInfo{
5818 {0, 239},
5819 },
5820 },
5821 },
5822 {
5823 name: "MOVLload",
5824 auxType: auxSymOff,
5825 argLen: 2,
5826 faultOnNilArg0: true,
5827 symEffect: SymRead,
5828 asm: x86.AMOVL,
5829 reg: regInfo{
5830 inputs: []inputInfo{
5831 {0, 65791},
5832 },
5833 outputs: []outputInfo{
5834 {0, 239},
5835 },
5836 },
5837 },
5838 {
5839 name: "MOVBstore",
5840 auxType: auxSymOff,
5841 argLen: 3,
5842 faultOnNilArg0: true,
5843 symEffect: SymWrite,
5844 asm: x86.AMOVB,
5845 reg: regInfo{
5846 inputs: []inputInfo{
5847 {1, 255},
5848 {0, 65791},
5849 },
5850 },
5851 },
5852 {
5853 name: "MOVWstore",
5854 auxType: auxSymOff,
5855 argLen: 3,
5856 faultOnNilArg0: true,
5857 symEffect: SymWrite,
5858 asm: x86.AMOVW,
5859 reg: regInfo{
5860 inputs: []inputInfo{
5861 {1, 255},
5862 {0, 65791},
5863 },
5864 },
5865 },
5866 {
5867 name: "MOVLstore",
5868 auxType: auxSymOff,
5869 argLen: 3,
5870 faultOnNilArg0: true,
5871 symEffect: SymWrite,
5872 asm: x86.AMOVL,
5873 reg: regInfo{
5874 inputs: []inputInfo{
5875 {1, 255},
5876 {0, 65791},
5877 },
5878 },
5879 },
5880 {
5881 name: "ADDLmodify",
5882 auxType: auxSymOff,
5883 argLen: 3,
5884 clobberFlags: true,
5885 faultOnNilArg0: true,
5886 symEffect: SymRead | SymWrite,
5887 asm: x86.AADDL,
5888 reg: regInfo{
5889 inputs: []inputInfo{
5890 {1, 255},
5891 {0, 65791},
5892 },
5893 },
5894 },
5895 {
5896 name: "SUBLmodify",
5897 auxType: auxSymOff,
5898 argLen: 3,
5899 clobberFlags: true,
5900 faultOnNilArg0: true,
5901 symEffect: SymRead | SymWrite,
5902 asm: x86.ASUBL,
5903 reg: regInfo{
5904 inputs: []inputInfo{
5905 {1, 255},
5906 {0, 65791},
5907 },
5908 },
5909 },
5910 {
5911 name: "ANDLmodify",
5912 auxType: auxSymOff,
5913 argLen: 3,
5914 clobberFlags: true,
5915 faultOnNilArg0: true,
5916 symEffect: SymRead | SymWrite,
5917 asm: x86.AANDL,
5918 reg: regInfo{
5919 inputs: []inputInfo{
5920 {1, 255},
5921 {0, 65791},
5922 },
5923 },
5924 },
5925 {
5926 name: "ORLmodify",
5927 auxType: auxSymOff,
5928 argLen: 3,
5929 clobberFlags: true,
5930 faultOnNilArg0: true,
5931 symEffect: SymRead | SymWrite,
5932 asm: x86.AORL,
5933 reg: regInfo{
5934 inputs: []inputInfo{
5935 {1, 255},
5936 {0, 65791},
5937 },
5938 },
5939 },
5940 {
5941 name: "XORLmodify",
5942 auxType: auxSymOff,
5943 argLen: 3,
5944 clobberFlags: true,
5945 faultOnNilArg0: true,
5946 symEffect: SymRead | SymWrite,
5947 asm: x86.AXORL,
5948 reg: regInfo{
5949 inputs: []inputInfo{
5950 {1, 255},
5951 {0, 65791},
5952 },
5953 },
5954 },
5955 {
5956 name: "ADDLmodifyidx4",
5957 auxType: auxSymOff,
5958 argLen: 4,
5959 clobberFlags: true,
5960 symEffect: SymRead | SymWrite,
5961 asm: x86.AADDL,
5962 reg: regInfo{
5963 inputs: []inputInfo{
5964 {1, 255},
5965 {2, 255},
5966 {0, 65791},
5967 },
5968 },
5969 },
5970 {
5971 name: "SUBLmodifyidx4",
5972 auxType: auxSymOff,
5973 argLen: 4,
5974 clobberFlags: true,
5975 symEffect: SymRead | SymWrite,
5976 asm: x86.ASUBL,
5977 reg: regInfo{
5978 inputs: []inputInfo{
5979 {1, 255},
5980 {2, 255},
5981 {0, 65791},
5982 },
5983 },
5984 },
5985 {
5986 name: "ANDLmodifyidx4",
5987 auxType: auxSymOff,
5988 argLen: 4,
5989 clobberFlags: true,
5990 symEffect: SymRead | SymWrite,
5991 asm: x86.AANDL,
5992 reg: regInfo{
5993 inputs: []inputInfo{
5994 {1, 255},
5995 {2, 255},
5996 {0, 65791},
5997 },
5998 },
5999 },
6000 {
6001 name: "ORLmodifyidx4",
6002 auxType: auxSymOff,
6003 argLen: 4,
6004 clobberFlags: true,
6005 symEffect: SymRead | SymWrite,
6006 asm: x86.AORL,
6007 reg: regInfo{
6008 inputs: []inputInfo{
6009 {1, 255},
6010 {2, 255},
6011 {0, 65791},
6012 },
6013 },
6014 },
6015 {
6016 name: "XORLmodifyidx4",
6017 auxType: auxSymOff,
6018 argLen: 4,
6019 clobberFlags: true,
6020 symEffect: SymRead | SymWrite,
6021 asm: x86.AXORL,
6022 reg: regInfo{
6023 inputs: []inputInfo{
6024 {1, 255},
6025 {2, 255},
6026 {0, 65791},
6027 },
6028 },
6029 },
6030 {
6031 name: "ADDLconstmodify",
6032 auxType: auxSymValAndOff,
6033 argLen: 2,
6034 clobberFlags: true,
6035 faultOnNilArg0: true,
6036 symEffect: SymRead | SymWrite,
6037 asm: x86.AADDL,
6038 reg: regInfo{
6039 inputs: []inputInfo{
6040 {0, 65791},
6041 },
6042 },
6043 },
6044 {
6045 name: "ANDLconstmodify",
6046 auxType: auxSymValAndOff,
6047 argLen: 2,
6048 clobberFlags: true,
6049 faultOnNilArg0: true,
6050 symEffect: SymRead | SymWrite,
6051 asm: x86.AANDL,
6052 reg: regInfo{
6053 inputs: []inputInfo{
6054 {0, 65791},
6055 },
6056 },
6057 },
6058 {
6059 name: "ORLconstmodify",
6060 auxType: auxSymValAndOff,
6061 argLen: 2,
6062 clobberFlags: true,
6063 faultOnNilArg0: true,
6064 symEffect: SymRead | SymWrite,
6065 asm: x86.AORL,
6066 reg: regInfo{
6067 inputs: []inputInfo{
6068 {0, 65791},
6069 },
6070 },
6071 },
6072 {
6073 name: "XORLconstmodify",
6074 auxType: auxSymValAndOff,
6075 argLen: 2,
6076 clobberFlags: true,
6077 faultOnNilArg0: true,
6078 symEffect: SymRead | SymWrite,
6079 asm: x86.AXORL,
6080 reg: regInfo{
6081 inputs: []inputInfo{
6082 {0, 65791},
6083 },
6084 },
6085 },
6086 {
6087 name: "ADDLconstmodifyidx4",
6088 auxType: auxSymValAndOff,
6089 argLen: 3,
6090 clobberFlags: true,
6091 symEffect: SymRead | SymWrite,
6092 asm: x86.AADDL,
6093 reg: regInfo{
6094 inputs: []inputInfo{
6095 {1, 255},
6096 {0, 65791},
6097 },
6098 },
6099 },
6100 {
6101 name: "ANDLconstmodifyidx4",
6102 auxType: auxSymValAndOff,
6103 argLen: 3,
6104 clobberFlags: true,
6105 symEffect: SymRead | SymWrite,
6106 asm: x86.AANDL,
6107 reg: regInfo{
6108 inputs: []inputInfo{
6109 {1, 255},
6110 {0, 65791},
6111 },
6112 },
6113 },
6114 {
6115 name: "ORLconstmodifyidx4",
6116 auxType: auxSymValAndOff,
6117 argLen: 3,
6118 clobberFlags: true,
6119 symEffect: SymRead | SymWrite,
6120 asm: x86.AORL,
6121 reg: regInfo{
6122 inputs: []inputInfo{
6123 {1, 255},
6124 {0, 65791},
6125 },
6126 },
6127 },
6128 {
6129 name: "XORLconstmodifyidx4",
6130 auxType: auxSymValAndOff,
6131 argLen: 3,
6132 clobberFlags: true,
6133 symEffect: SymRead | SymWrite,
6134 asm: x86.AXORL,
6135 reg: regInfo{
6136 inputs: []inputInfo{
6137 {1, 255},
6138 {0, 65791},
6139 },
6140 },
6141 },
6142 {
6143 name: "MOVBloadidx1",
6144 auxType: auxSymOff,
6145 argLen: 3,
6146 commutative: true,
6147 symEffect: SymRead,
6148 asm: x86.AMOVBLZX,
6149 reg: regInfo{
6150 inputs: []inputInfo{
6151 {1, 255},
6152 {0, 65791},
6153 },
6154 outputs: []outputInfo{
6155 {0, 239},
6156 },
6157 },
6158 },
6159 {
6160 name: "MOVWloadidx1",
6161 auxType: auxSymOff,
6162 argLen: 3,
6163 commutative: true,
6164 symEffect: SymRead,
6165 asm: x86.AMOVWLZX,
6166 reg: regInfo{
6167 inputs: []inputInfo{
6168 {1, 255},
6169 {0, 65791},
6170 },
6171 outputs: []outputInfo{
6172 {0, 239},
6173 },
6174 },
6175 },
6176 {
6177 name: "MOVWloadidx2",
6178 auxType: auxSymOff,
6179 argLen: 3,
6180 symEffect: SymRead,
6181 asm: x86.AMOVWLZX,
6182 reg: regInfo{
6183 inputs: []inputInfo{
6184 {1, 255},
6185 {0, 65791},
6186 },
6187 outputs: []outputInfo{
6188 {0, 239},
6189 },
6190 },
6191 },
6192 {
6193 name: "MOVLloadidx1",
6194 auxType: auxSymOff,
6195 argLen: 3,
6196 commutative: true,
6197 symEffect: SymRead,
6198 asm: x86.AMOVL,
6199 reg: regInfo{
6200 inputs: []inputInfo{
6201 {1, 255},
6202 {0, 65791},
6203 },
6204 outputs: []outputInfo{
6205 {0, 239},
6206 },
6207 },
6208 },
6209 {
6210 name: "MOVLloadidx4",
6211 auxType: auxSymOff,
6212 argLen: 3,
6213 symEffect: SymRead,
6214 asm: x86.AMOVL,
6215 reg: regInfo{
6216 inputs: []inputInfo{
6217 {1, 255},
6218 {0, 65791},
6219 },
6220 outputs: []outputInfo{
6221 {0, 239},
6222 },
6223 },
6224 },
6225 {
6226 name: "MOVBstoreidx1",
6227 auxType: auxSymOff,
6228 argLen: 4,
6229 commutative: true,
6230 symEffect: SymWrite,
6231 asm: x86.AMOVB,
6232 reg: regInfo{
6233 inputs: []inputInfo{
6234 {1, 255},
6235 {2, 255},
6236 {0, 65791},
6237 },
6238 },
6239 },
6240 {
6241 name: "MOVWstoreidx1",
6242 auxType: auxSymOff,
6243 argLen: 4,
6244 commutative: true,
6245 symEffect: SymWrite,
6246 asm: x86.AMOVW,
6247 reg: regInfo{
6248 inputs: []inputInfo{
6249 {1, 255},
6250 {2, 255},
6251 {0, 65791},
6252 },
6253 },
6254 },
6255 {
6256 name: "MOVWstoreidx2",
6257 auxType: auxSymOff,
6258 argLen: 4,
6259 symEffect: SymWrite,
6260 asm: x86.AMOVW,
6261 reg: regInfo{
6262 inputs: []inputInfo{
6263 {1, 255},
6264 {2, 255},
6265 {0, 65791},
6266 },
6267 },
6268 },
6269 {
6270 name: "MOVLstoreidx1",
6271 auxType: auxSymOff,
6272 argLen: 4,
6273 commutative: true,
6274 symEffect: SymWrite,
6275 asm: x86.AMOVL,
6276 reg: regInfo{
6277 inputs: []inputInfo{
6278 {1, 255},
6279 {2, 255},
6280 {0, 65791},
6281 },
6282 },
6283 },
6284 {
6285 name: "MOVLstoreidx4",
6286 auxType: auxSymOff,
6287 argLen: 4,
6288 symEffect: SymWrite,
6289 asm: x86.AMOVL,
6290 reg: regInfo{
6291 inputs: []inputInfo{
6292 {1, 255},
6293 {2, 255},
6294 {0, 65791},
6295 },
6296 },
6297 },
6298 {
6299 name: "MOVBstoreconst",
6300 auxType: auxSymValAndOff,
6301 argLen: 2,
6302 faultOnNilArg0: true,
6303 symEffect: SymWrite,
6304 asm: x86.AMOVB,
6305 reg: regInfo{
6306 inputs: []inputInfo{
6307 {0, 65791},
6308 },
6309 },
6310 },
6311 {
6312 name: "MOVWstoreconst",
6313 auxType: auxSymValAndOff,
6314 argLen: 2,
6315 faultOnNilArg0: true,
6316 symEffect: SymWrite,
6317 asm: x86.AMOVW,
6318 reg: regInfo{
6319 inputs: []inputInfo{
6320 {0, 65791},
6321 },
6322 },
6323 },
6324 {
6325 name: "MOVLstoreconst",
6326 auxType: auxSymValAndOff,
6327 argLen: 2,
6328 faultOnNilArg0: true,
6329 symEffect: SymWrite,
6330 asm: x86.AMOVL,
6331 reg: regInfo{
6332 inputs: []inputInfo{
6333 {0, 65791},
6334 },
6335 },
6336 },
6337 {
6338 name: "MOVBstoreconstidx1",
6339 auxType: auxSymValAndOff,
6340 argLen: 3,
6341 symEffect: SymWrite,
6342 asm: x86.AMOVB,
6343 reg: regInfo{
6344 inputs: []inputInfo{
6345 {1, 255},
6346 {0, 65791},
6347 },
6348 },
6349 },
6350 {
6351 name: "MOVWstoreconstidx1",
6352 auxType: auxSymValAndOff,
6353 argLen: 3,
6354 symEffect: SymWrite,
6355 asm: x86.AMOVW,
6356 reg: regInfo{
6357 inputs: []inputInfo{
6358 {1, 255},
6359 {0, 65791},
6360 },
6361 },
6362 },
6363 {
6364 name: "MOVWstoreconstidx2",
6365 auxType: auxSymValAndOff,
6366 argLen: 3,
6367 symEffect: SymWrite,
6368 asm: x86.AMOVW,
6369 reg: regInfo{
6370 inputs: []inputInfo{
6371 {1, 255},
6372 {0, 65791},
6373 },
6374 },
6375 },
6376 {
6377 name: "MOVLstoreconstidx1",
6378 auxType: auxSymValAndOff,
6379 argLen: 3,
6380 symEffect: SymWrite,
6381 asm: x86.AMOVL,
6382 reg: regInfo{
6383 inputs: []inputInfo{
6384 {1, 255},
6385 {0, 65791},
6386 },
6387 },
6388 },
6389 {
6390 name: "MOVLstoreconstidx4",
6391 auxType: auxSymValAndOff,
6392 argLen: 3,
6393 symEffect: SymWrite,
6394 asm: x86.AMOVL,
6395 reg: regInfo{
6396 inputs: []inputInfo{
6397 {1, 255},
6398 {0, 65791},
6399 },
6400 },
6401 },
6402 {
6403 name: "DUFFZERO",
6404 auxType: auxInt64,
6405 argLen: 3,
6406 faultOnNilArg0: true,
6407 reg: regInfo{
6408 inputs: []inputInfo{
6409 {0, 128},
6410 {1, 1},
6411 },
6412 clobbers: 130,
6413 },
6414 },
6415 {
6416 name: "REPSTOSL",
6417 argLen: 4,
6418 faultOnNilArg0: true,
6419 reg: regInfo{
6420 inputs: []inputInfo{
6421 {0, 128},
6422 {1, 2},
6423 {2, 1},
6424 },
6425 clobbers: 130,
6426 },
6427 },
6428 {
6429 name: "CALLstatic",
6430 auxType: auxCallOff,
6431 argLen: 1,
6432 clobberFlags: true,
6433 call: true,
6434 reg: regInfo{
6435 clobbers: 65519,
6436 },
6437 },
6438 {
6439 name: "CALLtail",
6440 auxType: auxCallOff,
6441 argLen: 1,
6442 clobberFlags: true,
6443 call: true,
6444 tailCall: true,
6445 reg: regInfo{
6446 clobbers: 65519,
6447 },
6448 },
6449 {
6450 name: "CALLclosure",
6451 auxType: auxCallOff,
6452 argLen: 3,
6453 clobberFlags: true,
6454 call: true,
6455 reg: regInfo{
6456 inputs: []inputInfo{
6457 {1, 4},
6458 {0, 255},
6459 },
6460 clobbers: 65519,
6461 },
6462 },
6463 {
6464 name: "CALLinter",
6465 auxType: auxCallOff,
6466 argLen: 2,
6467 clobberFlags: true,
6468 call: true,
6469 reg: regInfo{
6470 inputs: []inputInfo{
6471 {0, 239},
6472 },
6473 clobbers: 65519,
6474 },
6475 },
6476 {
6477 name: "DUFFCOPY",
6478 auxType: auxInt64,
6479 argLen: 3,
6480 clobberFlags: true,
6481 faultOnNilArg0: true,
6482 faultOnNilArg1: true,
6483 reg: regInfo{
6484 inputs: []inputInfo{
6485 {0, 128},
6486 {1, 64},
6487 },
6488 clobbers: 194,
6489 },
6490 },
6491 {
6492 name: "REPMOVSL",
6493 argLen: 4,
6494 faultOnNilArg0: true,
6495 faultOnNilArg1: true,
6496 reg: regInfo{
6497 inputs: []inputInfo{
6498 {0, 128},
6499 {1, 64},
6500 {2, 2},
6501 },
6502 clobbers: 194,
6503 },
6504 },
6505 {
6506 name: "InvertFlags",
6507 argLen: 1,
6508 reg: regInfo{},
6509 },
6510 {
6511 name: "LoweredGetG",
6512 argLen: 1,
6513 reg: regInfo{
6514 outputs: []outputInfo{
6515 {0, 239},
6516 },
6517 },
6518 },
6519 {
6520 name: "LoweredGetClosurePtr",
6521 argLen: 0,
6522 zeroWidth: true,
6523 reg: regInfo{
6524 outputs: []outputInfo{
6525 {0, 4},
6526 },
6527 },
6528 },
6529 {
6530 name: "LoweredGetCallerPC",
6531 argLen: 0,
6532 rematerializeable: true,
6533 reg: regInfo{
6534 outputs: []outputInfo{
6535 {0, 239},
6536 },
6537 },
6538 },
6539 {
6540 name: "LoweredGetCallerSP",
6541 argLen: 1,
6542 rematerializeable: true,
6543 reg: regInfo{
6544 outputs: []outputInfo{
6545 {0, 239},
6546 },
6547 },
6548 },
6549 {
6550 name: "LoweredNilCheck",
6551 argLen: 2,
6552 clobberFlags: true,
6553 nilCheck: true,
6554 faultOnNilArg0: true,
6555 reg: regInfo{
6556 inputs: []inputInfo{
6557 {0, 255},
6558 },
6559 },
6560 },
6561 {
6562 name: "LoweredWB",
6563 auxType: auxInt64,
6564 argLen: 1,
6565 clobberFlags: true,
6566 reg: regInfo{
6567 clobbers: 65280,
6568 outputs: []outputInfo{
6569 {0, 128},
6570 },
6571 },
6572 },
6573 {
6574 name: "LoweredPanicBoundsA",
6575 auxType: auxInt64,
6576 argLen: 3,
6577 call: true,
6578 reg: regInfo{
6579 inputs: []inputInfo{
6580 {0, 4},
6581 {1, 8},
6582 },
6583 },
6584 },
6585 {
6586 name: "LoweredPanicBoundsB",
6587 auxType: auxInt64,
6588 argLen: 3,
6589 call: true,
6590 reg: regInfo{
6591 inputs: []inputInfo{
6592 {0, 2},
6593 {1, 4},
6594 },
6595 },
6596 },
6597 {
6598 name: "LoweredPanicBoundsC",
6599 auxType: auxInt64,
6600 argLen: 3,
6601 call: true,
6602 reg: regInfo{
6603 inputs: []inputInfo{
6604 {0, 1},
6605 {1, 2},
6606 },
6607 },
6608 },
6609 {
6610 name: "LoweredPanicExtendA",
6611 auxType: auxInt64,
6612 argLen: 4,
6613 call: true,
6614 reg: regInfo{
6615 inputs: []inputInfo{
6616 {0, 64},
6617 {1, 4},
6618 {2, 8},
6619 },
6620 },
6621 },
6622 {
6623 name: "LoweredPanicExtendB",
6624 auxType: auxInt64,
6625 argLen: 4,
6626 call: true,
6627 reg: regInfo{
6628 inputs: []inputInfo{
6629 {0, 64},
6630 {1, 2},
6631 {2, 4},
6632 },
6633 },
6634 },
6635 {
6636 name: "LoweredPanicExtendC",
6637 auxType: auxInt64,
6638 argLen: 4,
6639 call: true,
6640 reg: regInfo{
6641 inputs: []inputInfo{
6642 {0, 64},
6643 {1, 1},
6644 {2, 2},
6645 },
6646 },
6647 },
6648 {
6649 name: "FlagEQ",
6650 argLen: 0,
6651 reg: regInfo{},
6652 },
6653 {
6654 name: "FlagLT_ULT",
6655 argLen: 0,
6656 reg: regInfo{},
6657 },
6658 {
6659 name: "FlagLT_UGT",
6660 argLen: 0,
6661 reg: regInfo{},
6662 },
6663 {
6664 name: "FlagGT_UGT",
6665 argLen: 0,
6666 reg: regInfo{},
6667 },
6668 {
6669 name: "FlagGT_ULT",
6670 argLen: 0,
6671 reg: regInfo{},
6672 },
6673 {
6674 name: "MOVSSconst1",
6675 auxType: auxFloat32,
6676 argLen: 0,
6677 reg: regInfo{
6678 outputs: []outputInfo{
6679 {0, 239},
6680 },
6681 },
6682 },
6683 {
6684 name: "MOVSDconst1",
6685 auxType: auxFloat64,
6686 argLen: 0,
6687 reg: regInfo{
6688 outputs: []outputInfo{
6689 {0, 239},
6690 },
6691 },
6692 },
6693 {
6694 name: "MOVSSconst2",
6695 argLen: 1,
6696 asm: x86.AMOVSS,
6697 reg: regInfo{
6698 inputs: []inputInfo{
6699 {0, 239},
6700 },
6701 outputs: []outputInfo{
6702 {0, 65280},
6703 },
6704 },
6705 },
6706 {
6707 name: "MOVSDconst2",
6708 argLen: 1,
6709 asm: x86.AMOVSD,
6710 reg: regInfo{
6711 inputs: []inputInfo{
6712 {0, 239},
6713 },
6714 outputs: []outputInfo{
6715 {0, 65280},
6716 },
6717 },
6718 },
6719
6720 {
6721 name: "ADDSS",
6722 argLen: 2,
6723 commutative: true,
6724 resultInArg0: true,
6725 asm: x86.AADDSS,
6726 reg: regInfo{
6727 inputs: []inputInfo{
6728 {0, 2147418112},
6729 {1, 2147418112},
6730 },
6731 outputs: []outputInfo{
6732 {0, 2147418112},
6733 },
6734 },
6735 },
6736 {
6737 name: "ADDSD",
6738 argLen: 2,
6739 commutative: true,
6740 resultInArg0: true,
6741 asm: x86.AADDSD,
6742 reg: regInfo{
6743 inputs: []inputInfo{
6744 {0, 2147418112},
6745 {1, 2147418112},
6746 },
6747 outputs: []outputInfo{
6748 {0, 2147418112},
6749 },
6750 },
6751 },
6752 {
6753 name: "SUBSS",
6754 argLen: 2,
6755 resultInArg0: true,
6756 asm: x86.ASUBSS,
6757 reg: regInfo{
6758 inputs: []inputInfo{
6759 {0, 2147418112},
6760 {1, 2147418112},
6761 },
6762 outputs: []outputInfo{
6763 {0, 2147418112},
6764 },
6765 },
6766 },
6767 {
6768 name: "SUBSD",
6769 argLen: 2,
6770 resultInArg0: true,
6771 asm: x86.ASUBSD,
6772 reg: regInfo{
6773 inputs: []inputInfo{
6774 {0, 2147418112},
6775 {1, 2147418112},
6776 },
6777 outputs: []outputInfo{
6778 {0, 2147418112},
6779 },
6780 },
6781 },
6782 {
6783 name: "MULSS",
6784 argLen: 2,
6785 commutative: true,
6786 resultInArg0: true,
6787 asm: x86.AMULSS,
6788 reg: regInfo{
6789 inputs: []inputInfo{
6790 {0, 2147418112},
6791 {1, 2147418112},
6792 },
6793 outputs: []outputInfo{
6794 {0, 2147418112},
6795 },
6796 },
6797 },
6798 {
6799 name: "MULSD",
6800 argLen: 2,
6801 commutative: true,
6802 resultInArg0: true,
6803 asm: x86.AMULSD,
6804 reg: regInfo{
6805 inputs: []inputInfo{
6806 {0, 2147418112},
6807 {1, 2147418112},
6808 },
6809 outputs: []outputInfo{
6810 {0, 2147418112},
6811 },
6812 },
6813 },
6814 {
6815 name: "DIVSS",
6816 argLen: 2,
6817 resultInArg0: true,
6818 asm: x86.ADIVSS,
6819 reg: regInfo{
6820 inputs: []inputInfo{
6821 {0, 2147418112},
6822 {1, 2147418112},
6823 },
6824 outputs: []outputInfo{
6825 {0, 2147418112},
6826 },
6827 },
6828 },
6829 {
6830 name: "DIVSD",
6831 argLen: 2,
6832 resultInArg0: true,
6833 asm: x86.ADIVSD,
6834 reg: regInfo{
6835 inputs: []inputInfo{
6836 {0, 2147418112},
6837 {1, 2147418112},
6838 },
6839 outputs: []outputInfo{
6840 {0, 2147418112},
6841 },
6842 },
6843 },
6844 {
6845 name: "MOVSSload",
6846 auxType: auxSymOff,
6847 argLen: 2,
6848 faultOnNilArg0: true,
6849 symEffect: SymRead,
6850 asm: x86.AMOVSS,
6851 reg: regInfo{
6852 inputs: []inputInfo{
6853 {0, 4295016447},
6854 },
6855 outputs: []outputInfo{
6856 {0, 2147418112},
6857 },
6858 },
6859 },
6860 {
6861 name: "MOVSDload",
6862 auxType: auxSymOff,
6863 argLen: 2,
6864 faultOnNilArg0: true,
6865 symEffect: SymRead,
6866 asm: x86.AMOVSD,
6867 reg: regInfo{
6868 inputs: []inputInfo{
6869 {0, 4295016447},
6870 },
6871 outputs: []outputInfo{
6872 {0, 2147418112},
6873 },
6874 },
6875 },
6876 {
6877 name: "MOVSSconst",
6878 auxType: auxFloat32,
6879 argLen: 0,
6880 rematerializeable: true,
6881 asm: x86.AMOVSS,
6882 reg: regInfo{
6883 outputs: []outputInfo{
6884 {0, 2147418112},
6885 },
6886 },
6887 },
6888 {
6889 name: "MOVSDconst",
6890 auxType: auxFloat64,
6891 argLen: 0,
6892 rematerializeable: true,
6893 asm: x86.AMOVSD,
6894 reg: regInfo{
6895 outputs: []outputInfo{
6896 {0, 2147418112},
6897 },
6898 },
6899 },
6900 {
6901 name: "MOVSSloadidx1",
6902 auxType: auxSymOff,
6903 argLen: 3,
6904 symEffect: SymRead,
6905 asm: x86.AMOVSS,
6906 scale: 1,
6907 reg: regInfo{
6908 inputs: []inputInfo{
6909 {1, 49151},
6910 {0, 4295016447},
6911 },
6912 outputs: []outputInfo{
6913 {0, 2147418112},
6914 },
6915 },
6916 },
6917 {
6918 name: "MOVSSloadidx4",
6919 auxType: auxSymOff,
6920 argLen: 3,
6921 symEffect: SymRead,
6922 asm: x86.AMOVSS,
6923 scale: 4,
6924 reg: regInfo{
6925 inputs: []inputInfo{
6926 {1, 49151},
6927 {0, 4295016447},
6928 },
6929 outputs: []outputInfo{
6930 {0, 2147418112},
6931 },
6932 },
6933 },
6934 {
6935 name: "MOVSDloadidx1",
6936 auxType: auxSymOff,
6937 argLen: 3,
6938 symEffect: SymRead,
6939 asm: x86.AMOVSD,
6940 scale: 1,
6941 reg: regInfo{
6942 inputs: []inputInfo{
6943 {1, 49151},
6944 {0, 4295016447},
6945 },
6946 outputs: []outputInfo{
6947 {0, 2147418112},
6948 },
6949 },
6950 },
6951 {
6952 name: "MOVSDloadidx8",
6953 auxType: auxSymOff,
6954 argLen: 3,
6955 symEffect: SymRead,
6956 asm: x86.AMOVSD,
6957 scale: 8,
6958 reg: regInfo{
6959 inputs: []inputInfo{
6960 {1, 49151},
6961 {0, 4295016447},
6962 },
6963 outputs: []outputInfo{
6964 {0, 2147418112},
6965 },
6966 },
6967 },
6968 {
6969 name: "MOVSSstore",
6970 auxType: auxSymOff,
6971 argLen: 3,
6972 faultOnNilArg0: true,
6973 symEffect: SymWrite,
6974 asm: x86.AMOVSS,
6975 reg: regInfo{
6976 inputs: []inputInfo{
6977 {1, 2147418112},
6978 {0, 4295016447},
6979 },
6980 },
6981 },
6982 {
6983 name: "MOVSDstore",
6984 auxType: auxSymOff,
6985 argLen: 3,
6986 faultOnNilArg0: true,
6987 symEffect: SymWrite,
6988 asm: x86.AMOVSD,
6989 reg: regInfo{
6990 inputs: []inputInfo{
6991 {1, 2147418112},
6992 {0, 4295016447},
6993 },
6994 },
6995 },
6996 {
6997 name: "MOVSSstoreidx1",
6998 auxType: auxSymOff,
6999 argLen: 4,
7000 symEffect: SymWrite,
7001 asm: x86.AMOVSS,
7002 scale: 1,
7003 reg: regInfo{
7004 inputs: []inputInfo{
7005 {1, 49151},
7006 {2, 2147418112},
7007 {0, 4295016447},
7008 },
7009 },
7010 },
7011 {
7012 name: "MOVSSstoreidx4",
7013 auxType: auxSymOff,
7014 argLen: 4,
7015 symEffect: SymWrite,
7016 asm: x86.AMOVSS,
7017 scale: 4,
7018 reg: regInfo{
7019 inputs: []inputInfo{
7020 {1, 49151},
7021 {2, 2147418112},
7022 {0, 4295016447},
7023 },
7024 },
7025 },
7026 {
7027 name: "MOVSDstoreidx1",
7028 auxType: auxSymOff,
7029 argLen: 4,
7030 symEffect: SymWrite,
7031 asm: x86.AMOVSD,
7032 scale: 1,
7033 reg: regInfo{
7034 inputs: []inputInfo{
7035 {1, 49151},
7036 {2, 2147418112},
7037 {0, 4295016447},
7038 },
7039 },
7040 },
7041 {
7042 name: "MOVSDstoreidx8",
7043 auxType: auxSymOff,
7044 argLen: 4,
7045 symEffect: SymWrite,
7046 asm: x86.AMOVSD,
7047 scale: 8,
7048 reg: regInfo{
7049 inputs: []inputInfo{
7050 {1, 49151},
7051 {2, 2147418112},
7052 {0, 4295016447},
7053 },
7054 },
7055 },
7056 {
7057 name: "ADDSSload",
7058 auxType: auxSymOff,
7059 argLen: 3,
7060 resultInArg0: true,
7061 faultOnNilArg1: true,
7062 symEffect: SymRead,
7063 asm: x86.AADDSS,
7064 reg: regInfo{
7065 inputs: []inputInfo{
7066 {0, 2147418112},
7067 {1, 4295032831},
7068 },
7069 outputs: []outputInfo{
7070 {0, 2147418112},
7071 },
7072 },
7073 },
7074 {
7075 name: "ADDSDload",
7076 auxType: auxSymOff,
7077 argLen: 3,
7078 resultInArg0: true,
7079 faultOnNilArg1: true,
7080 symEffect: SymRead,
7081 asm: x86.AADDSD,
7082 reg: regInfo{
7083 inputs: []inputInfo{
7084 {0, 2147418112},
7085 {1, 4295032831},
7086 },
7087 outputs: []outputInfo{
7088 {0, 2147418112},
7089 },
7090 },
7091 },
7092 {
7093 name: "SUBSSload",
7094 auxType: auxSymOff,
7095 argLen: 3,
7096 resultInArg0: true,
7097 faultOnNilArg1: true,
7098 symEffect: SymRead,
7099 asm: x86.ASUBSS,
7100 reg: regInfo{
7101 inputs: []inputInfo{
7102 {0, 2147418112},
7103 {1, 4295032831},
7104 },
7105 outputs: []outputInfo{
7106 {0, 2147418112},
7107 },
7108 },
7109 },
7110 {
7111 name: "SUBSDload",
7112 auxType: auxSymOff,
7113 argLen: 3,
7114 resultInArg0: true,
7115 faultOnNilArg1: true,
7116 symEffect: SymRead,
7117 asm: x86.ASUBSD,
7118 reg: regInfo{
7119 inputs: []inputInfo{
7120 {0, 2147418112},
7121 {1, 4295032831},
7122 },
7123 outputs: []outputInfo{
7124 {0, 2147418112},
7125 },
7126 },
7127 },
7128 {
7129 name: "MULSSload",
7130 auxType: auxSymOff,
7131 argLen: 3,
7132 resultInArg0: true,
7133 faultOnNilArg1: true,
7134 symEffect: SymRead,
7135 asm: x86.AMULSS,
7136 reg: regInfo{
7137 inputs: []inputInfo{
7138 {0, 2147418112},
7139 {1, 4295032831},
7140 },
7141 outputs: []outputInfo{
7142 {0, 2147418112},
7143 },
7144 },
7145 },
7146 {
7147 name: "MULSDload",
7148 auxType: auxSymOff,
7149 argLen: 3,
7150 resultInArg0: true,
7151 faultOnNilArg1: true,
7152 symEffect: SymRead,
7153 asm: x86.AMULSD,
7154 reg: regInfo{
7155 inputs: []inputInfo{
7156 {0, 2147418112},
7157 {1, 4295032831},
7158 },
7159 outputs: []outputInfo{
7160 {0, 2147418112},
7161 },
7162 },
7163 },
7164 {
7165 name: "DIVSSload",
7166 auxType: auxSymOff,
7167 argLen: 3,
7168 resultInArg0: true,
7169 faultOnNilArg1: true,
7170 symEffect: SymRead,
7171 asm: x86.ADIVSS,
7172 reg: regInfo{
7173 inputs: []inputInfo{
7174 {0, 2147418112},
7175 {1, 4295032831},
7176 },
7177 outputs: []outputInfo{
7178 {0, 2147418112},
7179 },
7180 },
7181 },
7182 {
7183 name: "DIVSDload",
7184 auxType: auxSymOff,
7185 argLen: 3,
7186 resultInArg0: true,
7187 faultOnNilArg1: true,
7188 symEffect: SymRead,
7189 asm: x86.ADIVSD,
7190 reg: regInfo{
7191 inputs: []inputInfo{
7192 {0, 2147418112},
7193 {1, 4295032831},
7194 },
7195 outputs: []outputInfo{
7196 {0, 2147418112},
7197 },
7198 },
7199 },
7200 {
7201 name: "ADDSSloadidx1",
7202 auxType: auxSymOff,
7203 argLen: 4,
7204 resultInArg0: true,
7205 symEffect: SymRead,
7206 asm: x86.AADDSS,
7207 scale: 1,
7208 reg: regInfo{
7209 inputs: []inputInfo{
7210 {0, 2147418112},
7211 {2, 4295016447},
7212 {1, 4295032831},
7213 },
7214 outputs: []outputInfo{
7215 {0, 2147418112},
7216 },
7217 },
7218 },
7219 {
7220 name: "ADDSSloadidx4",
7221 auxType: auxSymOff,
7222 argLen: 4,
7223 resultInArg0: true,
7224 symEffect: SymRead,
7225 asm: x86.AADDSS,
7226 scale: 4,
7227 reg: regInfo{
7228 inputs: []inputInfo{
7229 {0, 2147418112},
7230 {2, 4295016447},
7231 {1, 4295032831},
7232 },
7233 outputs: []outputInfo{
7234 {0, 2147418112},
7235 },
7236 },
7237 },
7238 {
7239 name: "ADDSDloadidx1",
7240 auxType: auxSymOff,
7241 argLen: 4,
7242 resultInArg0: true,
7243 symEffect: SymRead,
7244 asm: x86.AADDSD,
7245 scale: 1,
7246 reg: regInfo{
7247 inputs: []inputInfo{
7248 {0, 2147418112},
7249 {2, 4295016447},
7250 {1, 4295032831},
7251 },
7252 outputs: []outputInfo{
7253 {0, 2147418112},
7254 },
7255 },
7256 },
7257 {
7258 name: "ADDSDloadidx8",
7259 auxType: auxSymOff,
7260 argLen: 4,
7261 resultInArg0: true,
7262 symEffect: SymRead,
7263 asm: x86.AADDSD,
7264 scale: 8,
7265 reg: regInfo{
7266 inputs: []inputInfo{
7267 {0, 2147418112},
7268 {2, 4295016447},
7269 {1, 4295032831},
7270 },
7271 outputs: []outputInfo{
7272 {0, 2147418112},
7273 },
7274 },
7275 },
7276 {
7277 name: "SUBSSloadidx1",
7278 auxType: auxSymOff,
7279 argLen: 4,
7280 resultInArg0: true,
7281 symEffect: SymRead,
7282 asm: x86.ASUBSS,
7283 scale: 1,
7284 reg: regInfo{
7285 inputs: []inputInfo{
7286 {0, 2147418112},
7287 {2, 4295016447},
7288 {1, 4295032831},
7289 },
7290 outputs: []outputInfo{
7291 {0, 2147418112},
7292 },
7293 },
7294 },
7295 {
7296 name: "SUBSSloadidx4",
7297 auxType: auxSymOff,
7298 argLen: 4,
7299 resultInArg0: true,
7300 symEffect: SymRead,
7301 asm: x86.ASUBSS,
7302 scale: 4,
7303 reg: regInfo{
7304 inputs: []inputInfo{
7305 {0, 2147418112},
7306 {2, 4295016447},
7307 {1, 4295032831},
7308 },
7309 outputs: []outputInfo{
7310 {0, 2147418112},
7311 },
7312 },
7313 },
7314 {
7315 name: "SUBSDloadidx1",
7316 auxType: auxSymOff,
7317 argLen: 4,
7318 resultInArg0: true,
7319 symEffect: SymRead,
7320 asm: x86.ASUBSD,
7321 scale: 1,
7322 reg: regInfo{
7323 inputs: []inputInfo{
7324 {0, 2147418112},
7325 {2, 4295016447},
7326 {1, 4295032831},
7327 },
7328 outputs: []outputInfo{
7329 {0, 2147418112},
7330 },
7331 },
7332 },
7333 {
7334 name: "SUBSDloadidx8",
7335 auxType: auxSymOff,
7336 argLen: 4,
7337 resultInArg0: true,
7338 symEffect: SymRead,
7339 asm: x86.ASUBSD,
7340 scale: 8,
7341 reg: regInfo{
7342 inputs: []inputInfo{
7343 {0, 2147418112},
7344 {2, 4295016447},
7345 {1, 4295032831},
7346 },
7347 outputs: []outputInfo{
7348 {0, 2147418112},
7349 },
7350 },
7351 },
7352 {
7353 name: "MULSSloadidx1",
7354 auxType: auxSymOff,
7355 argLen: 4,
7356 resultInArg0: true,
7357 symEffect: SymRead,
7358 asm: x86.AMULSS,
7359 scale: 1,
7360 reg: regInfo{
7361 inputs: []inputInfo{
7362 {0, 2147418112},
7363 {2, 4295016447},
7364 {1, 4295032831},
7365 },
7366 outputs: []outputInfo{
7367 {0, 2147418112},
7368 },
7369 },
7370 },
7371 {
7372 name: "MULSSloadidx4",
7373 auxType: auxSymOff,
7374 argLen: 4,
7375 resultInArg0: true,
7376 symEffect: SymRead,
7377 asm: x86.AMULSS,
7378 scale: 4,
7379 reg: regInfo{
7380 inputs: []inputInfo{
7381 {0, 2147418112},
7382 {2, 4295016447},
7383 {1, 4295032831},
7384 },
7385 outputs: []outputInfo{
7386 {0, 2147418112},
7387 },
7388 },
7389 },
7390 {
7391 name: "MULSDloadidx1",
7392 auxType: auxSymOff,
7393 argLen: 4,
7394 resultInArg0: true,
7395 symEffect: SymRead,
7396 asm: x86.AMULSD,
7397 scale: 1,
7398 reg: regInfo{
7399 inputs: []inputInfo{
7400 {0, 2147418112},
7401 {2, 4295016447},
7402 {1, 4295032831},
7403 },
7404 outputs: []outputInfo{
7405 {0, 2147418112},
7406 },
7407 },
7408 },
7409 {
7410 name: "MULSDloadidx8",
7411 auxType: auxSymOff,
7412 argLen: 4,
7413 resultInArg0: true,
7414 symEffect: SymRead,
7415 asm: x86.AMULSD,
7416 scale: 8,
7417 reg: regInfo{
7418 inputs: []inputInfo{
7419 {0, 2147418112},
7420 {2, 4295016447},
7421 {1, 4295032831},
7422 },
7423 outputs: []outputInfo{
7424 {0, 2147418112},
7425 },
7426 },
7427 },
7428 {
7429 name: "DIVSSloadidx1",
7430 auxType: auxSymOff,
7431 argLen: 4,
7432 resultInArg0: true,
7433 symEffect: SymRead,
7434 asm: x86.ADIVSS,
7435 scale: 1,
7436 reg: regInfo{
7437 inputs: []inputInfo{
7438 {0, 2147418112},
7439 {2, 4295016447},
7440 {1, 4295032831},
7441 },
7442 outputs: []outputInfo{
7443 {0, 2147418112},
7444 },
7445 },
7446 },
7447 {
7448 name: "DIVSSloadidx4",
7449 auxType: auxSymOff,
7450 argLen: 4,
7451 resultInArg0: true,
7452 symEffect: SymRead,
7453 asm: x86.ADIVSS,
7454 scale: 4,
7455 reg: regInfo{
7456 inputs: []inputInfo{
7457 {0, 2147418112},
7458 {2, 4295016447},
7459 {1, 4295032831},
7460 },
7461 outputs: []outputInfo{
7462 {0, 2147418112},
7463 },
7464 },
7465 },
7466 {
7467 name: "DIVSDloadidx1",
7468 auxType: auxSymOff,
7469 argLen: 4,
7470 resultInArg0: true,
7471 symEffect: SymRead,
7472 asm: x86.ADIVSD,
7473 scale: 1,
7474 reg: regInfo{
7475 inputs: []inputInfo{
7476 {0, 2147418112},
7477 {2, 4295016447},
7478 {1, 4295032831},
7479 },
7480 outputs: []outputInfo{
7481 {0, 2147418112},
7482 },
7483 },
7484 },
7485 {
7486 name: "DIVSDloadidx8",
7487 auxType: auxSymOff,
7488 argLen: 4,
7489 resultInArg0: true,
7490 symEffect: SymRead,
7491 asm: x86.ADIVSD,
7492 scale: 8,
7493 reg: regInfo{
7494 inputs: []inputInfo{
7495 {0, 2147418112},
7496 {2, 4295016447},
7497 {1, 4295032831},
7498 },
7499 outputs: []outputInfo{
7500 {0, 2147418112},
7501 },
7502 },
7503 },
7504 {
7505 name: "ADDQ",
7506 argLen: 2,
7507 commutative: true,
7508 clobberFlags: true,
7509 asm: x86.AADDQ,
7510 reg: regInfo{
7511 inputs: []inputInfo{
7512 {1, 49135},
7513 {0, 49151},
7514 },
7515 outputs: []outputInfo{
7516 {0, 49135},
7517 },
7518 },
7519 },
7520 {
7521 name: "ADDL",
7522 argLen: 2,
7523 commutative: true,
7524 clobberFlags: true,
7525 asm: x86.AADDL,
7526 reg: regInfo{
7527 inputs: []inputInfo{
7528 {1, 49135},
7529 {0, 49151},
7530 },
7531 outputs: []outputInfo{
7532 {0, 49135},
7533 },
7534 },
7535 },
7536 {
7537 name: "ADDQconst",
7538 auxType: auxInt32,
7539 argLen: 1,
7540 clobberFlags: true,
7541 asm: x86.AADDQ,
7542 reg: regInfo{
7543 inputs: []inputInfo{
7544 {0, 49151},
7545 },
7546 outputs: []outputInfo{
7547 {0, 49135},
7548 },
7549 },
7550 },
7551 {
7552 name: "ADDLconst",
7553 auxType: auxInt32,
7554 argLen: 1,
7555 clobberFlags: true,
7556 asm: x86.AADDL,
7557 reg: regInfo{
7558 inputs: []inputInfo{
7559 {0, 49151},
7560 },
7561 outputs: []outputInfo{
7562 {0, 49135},
7563 },
7564 },
7565 },
7566 {
7567 name: "ADDQconstmodify",
7568 auxType: auxSymValAndOff,
7569 argLen: 2,
7570 clobberFlags: true,
7571 faultOnNilArg0: true,
7572 symEffect: SymRead | SymWrite,
7573 asm: x86.AADDQ,
7574 reg: regInfo{
7575 inputs: []inputInfo{
7576 {0, 4295032831},
7577 },
7578 },
7579 },
7580 {
7581 name: "ADDLconstmodify",
7582 auxType: auxSymValAndOff,
7583 argLen: 2,
7584 clobberFlags: true,
7585 faultOnNilArg0: true,
7586 symEffect: SymRead | SymWrite,
7587 asm: x86.AADDL,
7588 reg: regInfo{
7589 inputs: []inputInfo{
7590 {0, 4295032831},
7591 },
7592 },
7593 },
7594 {
7595 name: "SUBQ",
7596 argLen: 2,
7597 resultInArg0: true,
7598 clobberFlags: true,
7599 asm: x86.ASUBQ,
7600 reg: regInfo{
7601 inputs: []inputInfo{
7602 {0, 49135},
7603 {1, 49135},
7604 },
7605 outputs: []outputInfo{
7606 {0, 49135},
7607 },
7608 },
7609 },
7610 {
7611 name: "SUBL",
7612 argLen: 2,
7613 resultInArg0: true,
7614 clobberFlags: true,
7615 asm: x86.ASUBL,
7616 reg: regInfo{
7617 inputs: []inputInfo{
7618 {0, 49135},
7619 {1, 49135},
7620 },
7621 outputs: []outputInfo{
7622 {0, 49135},
7623 },
7624 },
7625 },
7626 {
7627 name: "SUBQconst",
7628 auxType: auxInt32,
7629 argLen: 1,
7630 resultInArg0: true,
7631 clobberFlags: true,
7632 asm: x86.ASUBQ,
7633 reg: regInfo{
7634 inputs: []inputInfo{
7635 {0, 49135},
7636 },
7637 outputs: []outputInfo{
7638 {0, 49135},
7639 },
7640 },
7641 },
7642 {
7643 name: "SUBLconst",
7644 auxType: auxInt32,
7645 argLen: 1,
7646 resultInArg0: true,
7647 clobberFlags: true,
7648 asm: x86.ASUBL,
7649 reg: regInfo{
7650 inputs: []inputInfo{
7651 {0, 49135},
7652 },
7653 outputs: []outputInfo{
7654 {0, 49135},
7655 },
7656 },
7657 },
7658 {
7659 name: "MULQ",
7660 argLen: 2,
7661 commutative: true,
7662 resultInArg0: true,
7663 clobberFlags: true,
7664 asm: x86.AIMULQ,
7665 reg: regInfo{
7666 inputs: []inputInfo{
7667 {0, 49135},
7668 {1, 49135},
7669 },
7670 outputs: []outputInfo{
7671 {0, 49135},
7672 },
7673 },
7674 },
7675 {
7676 name: "MULL",
7677 argLen: 2,
7678 commutative: true,
7679 resultInArg0: true,
7680 clobberFlags: true,
7681 asm: x86.AIMULL,
7682 reg: regInfo{
7683 inputs: []inputInfo{
7684 {0, 49135},
7685 {1, 49135},
7686 },
7687 outputs: []outputInfo{
7688 {0, 49135},
7689 },
7690 },
7691 },
7692 {
7693 name: "MULQconst",
7694 auxType: auxInt32,
7695 argLen: 1,
7696 clobberFlags: true,
7697 asm: x86.AIMUL3Q,
7698 reg: regInfo{
7699 inputs: []inputInfo{
7700 {0, 49135},
7701 },
7702 outputs: []outputInfo{
7703 {0, 49135},
7704 },
7705 },
7706 },
7707 {
7708 name: "MULLconst",
7709 auxType: auxInt32,
7710 argLen: 1,
7711 clobberFlags: true,
7712 asm: x86.AIMUL3L,
7713 reg: regInfo{
7714 inputs: []inputInfo{
7715 {0, 49135},
7716 },
7717 outputs: []outputInfo{
7718 {0, 49135},
7719 },
7720 },
7721 },
7722 {
7723 name: "MULLU",
7724 argLen: 2,
7725 commutative: true,
7726 clobberFlags: true,
7727 asm: x86.AMULL,
7728 reg: regInfo{
7729 inputs: []inputInfo{
7730 {0, 1},
7731 {1, 49151},
7732 },
7733 clobbers: 4,
7734 outputs: []outputInfo{
7735 {1, 0},
7736 {0, 1},
7737 },
7738 },
7739 },
7740 {
7741 name: "MULQU",
7742 argLen: 2,
7743 commutative: true,
7744 clobberFlags: true,
7745 asm: x86.AMULQ,
7746 reg: regInfo{
7747 inputs: []inputInfo{
7748 {0, 1},
7749 {1, 49151},
7750 },
7751 clobbers: 4,
7752 outputs: []outputInfo{
7753 {1, 0},
7754 {0, 1},
7755 },
7756 },
7757 },
7758 {
7759 name: "HMULQ",
7760 argLen: 2,
7761 clobberFlags: true,
7762 asm: x86.AIMULQ,
7763 reg: regInfo{
7764 inputs: []inputInfo{
7765 {0, 1},
7766 {1, 49151},
7767 },
7768 clobbers: 1,
7769 outputs: []outputInfo{
7770 {0, 4},
7771 },
7772 },
7773 },
7774 {
7775 name: "HMULL",
7776 argLen: 2,
7777 clobberFlags: true,
7778 asm: x86.AIMULL,
7779 reg: regInfo{
7780 inputs: []inputInfo{
7781 {0, 1},
7782 {1, 49151},
7783 },
7784 clobbers: 1,
7785 outputs: []outputInfo{
7786 {0, 4},
7787 },
7788 },
7789 },
7790 {
7791 name: "HMULQU",
7792 argLen: 2,
7793 clobberFlags: true,
7794 asm: x86.AMULQ,
7795 reg: regInfo{
7796 inputs: []inputInfo{
7797 {0, 1},
7798 {1, 49151},
7799 },
7800 clobbers: 1,
7801 outputs: []outputInfo{
7802 {0, 4},
7803 },
7804 },
7805 },
7806 {
7807 name: "HMULLU",
7808 argLen: 2,
7809 clobberFlags: true,
7810 asm: x86.AMULL,
7811 reg: regInfo{
7812 inputs: []inputInfo{
7813 {0, 1},
7814 {1, 49151},
7815 },
7816 clobbers: 1,
7817 outputs: []outputInfo{
7818 {0, 4},
7819 },
7820 },
7821 },
7822 {
7823 name: "AVGQU",
7824 argLen: 2,
7825 commutative: true,
7826 resultInArg0: true,
7827 clobberFlags: true,
7828 reg: regInfo{
7829 inputs: []inputInfo{
7830 {0, 49135},
7831 {1, 49135},
7832 },
7833 outputs: []outputInfo{
7834 {0, 49135},
7835 },
7836 },
7837 },
7838 {
7839 name: "DIVQ",
7840 auxType: auxBool,
7841 argLen: 2,
7842 clobberFlags: true,
7843 asm: x86.AIDIVQ,
7844 reg: regInfo{
7845 inputs: []inputInfo{
7846 {0, 1},
7847 {1, 49147},
7848 },
7849 outputs: []outputInfo{
7850 {0, 1},
7851 {1, 4},
7852 },
7853 },
7854 },
7855 {
7856 name: "DIVL",
7857 auxType: auxBool,
7858 argLen: 2,
7859 clobberFlags: true,
7860 asm: x86.AIDIVL,
7861 reg: regInfo{
7862 inputs: []inputInfo{
7863 {0, 1},
7864 {1, 49147},
7865 },
7866 outputs: []outputInfo{
7867 {0, 1},
7868 {1, 4},
7869 },
7870 },
7871 },
7872 {
7873 name: "DIVW",
7874 auxType: auxBool,
7875 argLen: 2,
7876 clobberFlags: true,
7877 asm: x86.AIDIVW,
7878 reg: regInfo{
7879 inputs: []inputInfo{
7880 {0, 1},
7881 {1, 49147},
7882 },
7883 outputs: []outputInfo{
7884 {0, 1},
7885 {1, 4},
7886 },
7887 },
7888 },
7889 {
7890 name: "DIVQU",
7891 argLen: 2,
7892 clobberFlags: true,
7893 asm: x86.ADIVQ,
7894 reg: regInfo{
7895 inputs: []inputInfo{
7896 {0, 1},
7897 {1, 49147},
7898 },
7899 outputs: []outputInfo{
7900 {0, 1},
7901 {1, 4},
7902 },
7903 },
7904 },
7905 {
7906 name: "DIVLU",
7907 argLen: 2,
7908 clobberFlags: true,
7909 asm: x86.ADIVL,
7910 reg: regInfo{
7911 inputs: []inputInfo{
7912 {0, 1},
7913 {1, 49147},
7914 },
7915 outputs: []outputInfo{
7916 {0, 1},
7917 {1, 4},
7918 },
7919 },
7920 },
7921 {
7922 name: "DIVWU",
7923 argLen: 2,
7924 clobberFlags: true,
7925 asm: x86.ADIVW,
7926 reg: regInfo{
7927 inputs: []inputInfo{
7928 {0, 1},
7929 {1, 49147},
7930 },
7931 outputs: []outputInfo{
7932 {0, 1},
7933 {1, 4},
7934 },
7935 },
7936 },
7937 {
7938 name: "NEGLflags",
7939 argLen: 1,
7940 resultInArg0: true,
7941 asm: x86.ANEGL,
7942 reg: regInfo{
7943 inputs: []inputInfo{
7944 {0, 49135},
7945 },
7946 outputs: []outputInfo{
7947 {1, 0},
7948 {0, 49135},
7949 },
7950 },
7951 },
7952 {
7953 name: "ADDQconstflags",
7954 auxType: auxInt32,
7955 argLen: 1,
7956 resultInArg0: true,
7957 asm: x86.AADDQ,
7958 reg: regInfo{
7959 inputs: []inputInfo{
7960 {0, 49135},
7961 },
7962 outputs: []outputInfo{
7963 {1, 0},
7964 {0, 49135},
7965 },
7966 },
7967 },
7968 {
7969 name: "ADDLconstflags",
7970 auxType: auxInt32,
7971 argLen: 1,
7972 resultInArg0: true,
7973 asm: x86.AADDL,
7974 reg: regInfo{
7975 inputs: []inputInfo{
7976 {0, 49135},
7977 },
7978 outputs: []outputInfo{
7979 {1, 0},
7980 {0, 49135},
7981 },
7982 },
7983 },
7984 {
7985 name: "ADDQcarry",
7986 argLen: 2,
7987 commutative: true,
7988 resultInArg0: true,
7989 asm: x86.AADDQ,
7990 reg: regInfo{
7991 inputs: []inputInfo{
7992 {0, 49135},
7993 {1, 49135},
7994 },
7995 outputs: []outputInfo{
7996 {1, 0},
7997 {0, 49135},
7998 },
7999 },
8000 },
8001 {
8002 name: "ADCQ",
8003 argLen: 3,
8004 commutative: true,
8005 resultInArg0: true,
8006 asm: x86.AADCQ,
8007 reg: regInfo{
8008 inputs: []inputInfo{
8009 {0, 49135},
8010 {1, 49135},
8011 },
8012 outputs: []outputInfo{
8013 {1, 0},
8014 {0, 49135},
8015 },
8016 },
8017 },
8018 {
8019 name: "ADDQconstcarry",
8020 auxType: auxInt32,
8021 argLen: 1,
8022 resultInArg0: true,
8023 asm: x86.AADDQ,
8024 reg: regInfo{
8025 inputs: []inputInfo{
8026 {0, 49135},
8027 },
8028 outputs: []outputInfo{
8029 {1, 0},
8030 {0, 49135},
8031 },
8032 },
8033 },
8034 {
8035 name: "ADCQconst",
8036 auxType: auxInt32,
8037 argLen: 2,
8038 resultInArg0: true,
8039 asm: x86.AADCQ,
8040 reg: regInfo{
8041 inputs: []inputInfo{
8042 {0, 49135},
8043 },
8044 outputs: []outputInfo{
8045 {1, 0},
8046 {0, 49135},
8047 },
8048 },
8049 },
8050 {
8051 name: "SUBQborrow",
8052 argLen: 2,
8053 resultInArg0: true,
8054 asm: x86.ASUBQ,
8055 reg: regInfo{
8056 inputs: []inputInfo{
8057 {0, 49135},
8058 {1, 49135},
8059 },
8060 outputs: []outputInfo{
8061 {1, 0},
8062 {0, 49135},
8063 },
8064 },
8065 },
8066 {
8067 name: "SBBQ",
8068 argLen: 3,
8069 resultInArg0: true,
8070 asm: x86.ASBBQ,
8071 reg: regInfo{
8072 inputs: []inputInfo{
8073 {0, 49135},
8074 {1, 49135},
8075 },
8076 outputs: []outputInfo{
8077 {1, 0},
8078 {0, 49135},
8079 },
8080 },
8081 },
8082 {
8083 name: "SUBQconstborrow",
8084 auxType: auxInt32,
8085 argLen: 1,
8086 resultInArg0: true,
8087 asm: x86.ASUBQ,
8088 reg: regInfo{
8089 inputs: []inputInfo{
8090 {0, 49135},
8091 },
8092 outputs: []outputInfo{
8093 {1, 0},
8094 {0, 49135},
8095 },
8096 },
8097 },
8098 {
8099 name: "SBBQconst",
8100 auxType: auxInt32,
8101 argLen: 2,
8102 resultInArg0: true,
8103 asm: x86.ASBBQ,
8104 reg: regInfo{
8105 inputs: []inputInfo{
8106 {0, 49135},
8107 },
8108 outputs: []outputInfo{
8109 {1, 0},
8110 {0, 49135},
8111 },
8112 },
8113 },
8114 {
8115 name: "MULQU2",
8116 argLen: 2,
8117 commutative: true,
8118 clobberFlags: true,
8119 asm: x86.AMULQ,
8120 reg: regInfo{
8121 inputs: []inputInfo{
8122 {0, 1},
8123 {1, 49151},
8124 },
8125 outputs: []outputInfo{
8126 {0, 4},
8127 {1, 1},
8128 },
8129 },
8130 },
8131 {
8132 name: "DIVQU2",
8133 argLen: 3,
8134 clobberFlags: true,
8135 asm: x86.ADIVQ,
8136 reg: regInfo{
8137 inputs: []inputInfo{
8138 {0, 4},
8139 {1, 1},
8140 {2, 49151},
8141 },
8142 outputs: []outputInfo{
8143 {0, 1},
8144 {1, 4},
8145 },
8146 },
8147 },
8148 {
8149 name: "ANDQ",
8150 argLen: 2,
8151 commutative: true,
8152 resultInArg0: true,
8153 clobberFlags: true,
8154 asm: x86.AANDQ,
8155 reg: regInfo{
8156 inputs: []inputInfo{
8157 {0, 49135},
8158 {1, 49135},
8159 },
8160 outputs: []outputInfo{
8161 {0, 49135},
8162 },
8163 },
8164 },
8165 {
8166 name: "ANDL",
8167 argLen: 2,
8168 commutative: true,
8169 resultInArg0: true,
8170 clobberFlags: true,
8171 asm: x86.AANDL,
8172 reg: regInfo{
8173 inputs: []inputInfo{
8174 {0, 49135},
8175 {1, 49135},
8176 },
8177 outputs: []outputInfo{
8178 {0, 49135},
8179 },
8180 },
8181 },
8182 {
8183 name: "ANDQconst",
8184 auxType: auxInt32,
8185 argLen: 1,
8186 resultInArg0: true,
8187 clobberFlags: true,
8188 asm: x86.AANDQ,
8189 reg: regInfo{
8190 inputs: []inputInfo{
8191 {0, 49135},
8192 },
8193 outputs: []outputInfo{
8194 {0, 49135},
8195 },
8196 },
8197 },
8198 {
8199 name: "ANDLconst",
8200 auxType: auxInt32,
8201 argLen: 1,
8202 resultInArg0: true,
8203 clobberFlags: true,
8204 asm: x86.AANDL,
8205 reg: regInfo{
8206 inputs: []inputInfo{
8207 {0, 49135},
8208 },
8209 outputs: []outputInfo{
8210 {0, 49135},
8211 },
8212 },
8213 },
8214 {
8215 name: "ANDQconstmodify",
8216 auxType: auxSymValAndOff,
8217 argLen: 2,
8218 clobberFlags: true,
8219 faultOnNilArg0: true,
8220 symEffect: SymRead | SymWrite,
8221 asm: x86.AANDQ,
8222 reg: regInfo{
8223 inputs: []inputInfo{
8224 {0, 4295032831},
8225 },
8226 },
8227 },
8228 {
8229 name: "ANDLconstmodify",
8230 auxType: auxSymValAndOff,
8231 argLen: 2,
8232 clobberFlags: true,
8233 faultOnNilArg0: true,
8234 symEffect: SymRead | SymWrite,
8235 asm: x86.AANDL,
8236 reg: regInfo{
8237 inputs: []inputInfo{
8238 {0, 4295032831},
8239 },
8240 },
8241 },
8242 {
8243 name: "ORQ",
8244 argLen: 2,
8245 commutative: true,
8246 resultInArg0: true,
8247 clobberFlags: true,
8248 asm: x86.AORQ,
8249 reg: regInfo{
8250 inputs: []inputInfo{
8251 {0, 49135},
8252 {1, 49135},
8253 },
8254 outputs: []outputInfo{
8255 {0, 49135},
8256 },
8257 },
8258 },
8259 {
8260 name: "ORL",
8261 argLen: 2,
8262 commutative: true,
8263 resultInArg0: true,
8264 clobberFlags: true,
8265 asm: x86.AORL,
8266 reg: regInfo{
8267 inputs: []inputInfo{
8268 {0, 49135},
8269 {1, 49135},
8270 },
8271 outputs: []outputInfo{
8272 {0, 49135},
8273 },
8274 },
8275 },
8276 {
8277 name: "ORQconst",
8278 auxType: auxInt32,
8279 argLen: 1,
8280 resultInArg0: true,
8281 clobberFlags: true,
8282 asm: x86.AORQ,
8283 reg: regInfo{
8284 inputs: []inputInfo{
8285 {0, 49135},
8286 },
8287 outputs: []outputInfo{
8288 {0, 49135},
8289 },
8290 },
8291 },
8292 {
8293 name: "ORLconst",
8294 auxType: auxInt32,
8295 argLen: 1,
8296 resultInArg0: true,
8297 clobberFlags: true,
8298 asm: x86.AORL,
8299 reg: regInfo{
8300 inputs: []inputInfo{
8301 {0, 49135},
8302 },
8303 outputs: []outputInfo{
8304 {0, 49135},
8305 },
8306 },
8307 },
8308 {
8309 name: "ORQconstmodify",
8310 auxType: auxSymValAndOff,
8311 argLen: 2,
8312 clobberFlags: true,
8313 faultOnNilArg0: true,
8314 symEffect: SymRead | SymWrite,
8315 asm: x86.AORQ,
8316 reg: regInfo{
8317 inputs: []inputInfo{
8318 {0, 4295032831},
8319 },
8320 },
8321 },
8322 {
8323 name: "ORLconstmodify",
8324 auxType: auxSymValAndOff,
8325 argLen: 2,
8326 clobberFlags: true,
8327 faultOnNilArg0: true,
8328 symEffect: SymRead | SymWrite,
8329 asm: x86.AORL,
8330 reg: regInfo{
8331 inputs: []inputInfo{
8332 {0, 4295032831},
8333 },
8334 },
8335 },
8336 {
8337 name: "XORQ",
8338 argLen: 2,
8339 commutative: true,
8340 resultInArg0: true,
8341 clobberFlags: true,
8342 asm: x86.AXORQ,
8343 reg: regInfo{
8344 inputs: []inputInfo{
8345 {0, 49135},
8346 {1, 49135},
8347 },
8348 outputs: []outputInfo{
8349 {0, 49135},
8350 },
8351 },
8352 },
8353 {
8354 name: "XORL",
8355 argLen: 2,
8356 commutative: true,
8357 resultInArg0: true,
8358 clobberFlags: true,
8359 asm: x86.AXORL,
8360 reg: regInfo{
8361 inputs: []inputInfo{
8362 {0, 49135},
8363 {1, 49135},
8364 },
8365 outputs: []outputInfo{
8366 {0, 49135},
8367 },
8368 },
8369 },
8370 {
8371 name: "XORQconst",
8372 auxType: auxInt32,
8373 argLen: 1,
8374 resultInArg0: true,
8375 clobberFlags: true,
8376 asm: x86.AXORQ,
8377 reg: regInfo{
8378 inputs: []inputInfo{
8379 {0, 49135},
8380 },
8381 outputs: []outputInfo{
8382 {0, 49135},
8383 },
8384 },
8385 },
8386 {
8387 name: "XORLconst",
8388 auxType: auxInt32,
8389 argLen: 1,
8390 resultInArg0: true,
8391 clobberFlags: true,
8392 asm: x86.AXORL,
8393 reg: regInfo{
8394 inputs: []inputInfo{
8395 {0, 49135},
8396 },
8397 outputs: []outputInfo{
8398 {0, 49135},
8399 },
8400 },
8401 },
8402 {
8403 name: "XORQconstmodify",
8404 auxType: auxSymValAndOff,
8405 argLen: 2,
8406 clobberFlags: true,
8407 faultOnNilArg0: true,
8408 symEffect: SymRead | SymWrite,
8409 asm: x86.AXORQ,
8410 reg: regInfo{
8411 inputs: []inputInfo{
8412 {0, 4295032831},
8413 },
8414 },
8415 },
8416 {
8417 name: "XORLconstmodify",
8418 auxType: auxSymValAndOff,
8419 argLen: 2,
8420 clobberFlags: true,
8421 faultOnNilArg0: true,
8422 symEffect: SymRead | SymWrite,
8423 asm: x86.AXORL,
8424 reg: regInfo{
8425 inputs: []inputInfo{
8426 {0, 4295032831},
8427 },
8428 },
8429 },
8430 {
8431 name: "CMPQ",
8432 argLen: 2,
8433 asm: x86.ACMPQ,
8434 reg: regInfo{
8435 inputs: []inputInfo{
8436 {0, 49151},
8437 {1, 49151},
8438 },
8439 },
8440 },
8441 {
8442 name: "CMPL",
8443 argLen: 2,
8444 asm: x86.ACMPL,
8445 reg: regInfo{
8446 inputs: []inputInfo{
8447 {0, 49151},
8448 {1, 49151},
8449 },
8450 },
8451 },
8452 {
8453 name: "CMPW",
8454 argLen: 2,
8455 asm: x86.ACMPW,
8456 reg: regInfo{
8457 inputs: []inputInfo{
8458 {0, 49151},
8459 {1, 49151},
8460 },
8461 },
8462 },
8463 {
8464 name: "CMPB",
8465 argLen: 2,
8466 asm: x86.ACMPB,
8467 reg: regInfo{
8468 inputs: []inputInfo{
8469 {0, 49151},
8470 {1, 49151},
8471 },
8472 },
8473 },
8474 {
8475 name: "CMPQconst",
8476 auxType: auxInt32,
8477 argLen: 1,
8478 asm: x86.ACMPQ,
8479 reg: regInfo{
8480 inputs: []inputInfo{
8481 {0, 49151},
8482 },
8483 },
8484 },
8485 {
8486 name: "CMPLconst",
8487 auxType: auxInt32,
8488 argLen: 1,
8489 asm: x86.ACMPL,
8490 reg: regInfo{
8491 inputs: []inputInfo{
8492 {0, 49151},
8493 },
8494 },
8495 },
8496 {
8497 name: "CMPWconst",
8498 auxType: auxInt16,
8499 argLen: 1,
8500 asm: x86.ACMPW,
8501 reg: regInfo{
8502 inputs: []inputInfo{
8503 {0, 49151},
8504 },
8505 },
8506 },
8507 {
8508 name: "CMPBconst",
8509 auxType: auxInt8,
8510 argLen: 1,
8511 asm: x86.ACMPB,
8512 reg: regInfo{
8513 inputs: []inputInfo{
8514 {0, 49151},
8515 },
8516 },
8517 },
8518 {
8519 name: "CMPQload",
8520 auxType: auxSymOff,
8521 argLen: 3,
8522 faultOnNilArg0: true,
8523 symEffect: SymRead,
8524 asm: x86.ACMPQ,
8525 reg: regInfo{
8526 inputs: []inputInfo{
8527 {1, 49151},
8528 {0, 4295032831},
8529 },
8530 },
8531 },
8532 {
8533 name: "CMPLload",
8534 auxType: auxSymOff,
8535 argLen: 3,
8536 faultOnNilArg0: true,
8537 symEffect: SymRead,
8538 asm: x86.ACMPL,
8539 reg: regInfo{
8540 inputs: []inputInfo{
8541 {1, 49151},
8542 {0, 4295032831},
8543 },
8544 },
8545 },
8546 {
8547 name: "CMPWload",
8548 auxType: auxSymOff,
8549 argLen: 3,
8550 faultOnNilArg0: true,
8551 symEffect: SymRead,
8552 asm: x86.ACMPW,
8553 reg: regInfo{
8554 inputs: []inputInfo{
8555 {1, 49151},
8556 {0, 4295032831},
8557 },
8558 },
8559 },
8560 {
8561 name: "CMPBload",
8562 auxType: auxSymOff,
8563 argLen: 3,
8564 faultOnNilArg0: true,
8565 symEffect: SymRead,
8566 asm: x86.ACMPB,
8567 reg: regInfo{
8568 inputs: []inputInfo{
8569 {1, 49151},
8570 {0, 4295032831},
8571 },
8572 },
8573 },
8574 {
8575 name: "CMPQconstload",
8576 auxType: auxSymValAndOff,
8577 argLen: 2,
8578 faultOnNilArg0: true,
8579 symEffect: SymRead,
8580 asm: x86.ACMPQ,
8581 reg: regInfo{
8582 inputs: []inputInfo{
8583 {0, 4295032831},
8584 },
8585 },
8586 },
8587 {
8588 name: "CMPLconstload",
8589 auxType: auxSymValAndOff,
8590 argLen: 2,
8591 faultOnNilArg0: true,
8592 symEffect: SymRead,
8593 asm: x86.ACMPL,
8594 reg: regInfo{
8595 inputs: []inputInfo{
8596 {0, 4295032831},
8597 },
8598 },
8599 },
8600 {
8601 name: "CMPWconstload",
8602 auxType: auxSymValAndOff,
8603 argLen: 2,
8604 faultOnNilArg0: true,
8605 symEffect: SymRead,
8606 asm: x86.ACMPW,
8607 reg: regInfo{
8608 inputs: []inputInfo{
8609 {0, 4295032831},
8610 },
8611 },
8612 },
8613 {
8614 name: "CMPBconstload",
8615 auxType: auxSymValAndOff,
8616 argLen: 2,
8617 faultOnNilArg0: true,
8618 symEffect: SymRead,
8619 asm: x86.ACMPB,
8620 reg: regInfo{
8621 inputs: []inputInfo{
8622 {0, 4295032831},
8623 },
8624 },
8625 },
8626 {
8627 name: "CMPQloadidx8",
8628 auxType: auxSymOff,
8629 argLen: 4,
8630 symEffect: SymRead,
8631 asm: x86.ACMPQ,
8632 scale: 8,
8633 reg: regInfo{
8634 inputs: []inputInfo{
8635 {1, 49151},
8636 {2, 49151},
8637 {0, 4295032831},
8638 },
8639 },
8640 },
8641 {
8642 name: "CMPQloadidx1",
8643 auxType: auxSymOff,
8644 argLen: 4,
8645 commutative: true,
8646 symEffect: SymRead,
8647 asm: x86.ACMPQ,
8648 scale: 1,
8649 reg: regInfo{
8650 inputs: []inputInfo{
8651 {1, 49151},
8652 {2, 49151},
8653 {0, 4295032831},
8654 },
8655 },
8656 },
8657 {
8658 name: "CMPLloadidx4",
8659 auxType: auxSymOff,
8660 argLen: 4,
8661 symEffect: SymRead,
8662 asm: x86.ACMPL,
8663 scale: 4,
8664 reg: regInfo{
8665 inputs: []inputInfo{
8666 {1, 49151},
8667 {2, 49151},
8668 {0, 4295032831},
8669 },
8670 },
8671 },
8672 {
8673 name: "CMPLloadidx1",
8674 auxType: auxSymOff,
8675 argLen: 4,
8676 commutative: true,
8677 symEffect: SymRead,
8678 asm: x86.ACMPL,
8679 scale: 1,
8680 reg: regInfo{
8681 inputs: []inputInfo{
8682 {1, 49151},
8683 {2, 49151},
8684 {0, 4295032831},
8685 },
8686 },
8687 },
8688 {
8689 name: "CMPWloadidx2",
8690 auxType: auxSymOff,
8691 argLen: 4,
8692 symEffect: SymRead,
8693 asm: x86.ACMPW,
8694 scale: 2,
8695 reg: regInfo{
8696 inputs: []inputInfo{
8697 {1, 49151},
8698 {2, 49151},
8699 {0, 4295032831},
8700 },
8701 },
8702 },
8703 {
8704 name: "CMPWloadidx1",
8705 auxType: auxSymOff,
8706 argLen: 4,
8707 commutative: true,
8708 symEffect: SymRead,
8709 asm: x86.ACMPW,
8710 scale: 1,
8711 reg: regInfo{
8712 inputs: []inputInfo{
8713 {1, 49151},
8714 {2, 49151},
8715 {0, 4295032831},
8716 },
8717 },
8718 },
8719 {
8720 name: "CMPBloadidx1",
8721 auxType: auxSymOff,
8722 argLen: 4,
8723 commutative: true,
8724 symEffect: SymRead,
8725 asm: x86.ACMPB,
8726 scale: 1,
8727 reg: regInfo{
8728 inputs: []inputInfo{
8729 {1, 49151},
8730 {2, 49151},
8731 {0, 4295032831},
8732 },
8733 },
8734 },
8735 {
8736 name: "CMPQconstloadidx8",
8737 auxType: auxSymValAndOff,
8738 argLen: 3,
8739 symEffect: SymRead,
8740 asm: x86.ACMPQ,
8741 scale: 8,
8742 reg: regInfo{
8743 inputs: []inputInfo{
8744 {1, 49151},
8745 {0, 4295032831},
8746 },
8747 },
8748 },
8749 {
8750 name: "CMPQconstloadidx1",
8751 auxType: auxSymValAndOff,
8752 argLen: 3,
8753 commutative: true,
8754 symEffect: SymRead,
8755 asm: x86.ACMPQ,
8756 scale: 1,
8757 reg: regInfo{
8758 inputs: []inputInfo{
8759 {1, 49151},
8760 {0, 4295032831},
8761 },
8762 },
8763 },
8764 {
8765 name: "CMPLconstloadidx4",
8766 auxType: auxSymValAndOff,
8767 argLen: 3,
8768 symEffect: SymRead,
8769 asm: x86.ACMPL,
8770 scale: 4,
8771 reg: regInfo{
8772 inputs: []inputInfo{
8773 {1, 49151},
8774 {0, 4295032831},
8775 },
8776 },
8777 },
8778 {
8779 name: "CMPLconstloadidx1",
8780 auxType: auxSymValAndOff,
8781 argLen: 3,
8782 commutative: true,
8783 symEffect: SymRead,
8784 asm: x86.ACMPL,
8785 scale: 1,
8786 reg: regInfo{
8787 inputs: []inputInfo{
8788 {1, 49151},
8789 {0, 4295032831},
8790 },
8791 },
8792 },
8793 {
8794 name: "CMPWconstloadidx2",
8795 auxType: auxSymValAndOff,
8796 argLen: 3,
8797 symEffect: SymRead,
8798 asm: x86.ACMPW,
8799 scale: 2,
8800 reg: regInfo{
8801 inputs: []inputInfo{
8802 {1, 49151},
8803 {0, 4295032831},
8804 },
8805 },
8806 },
8807 {
8808 name: "CMPWconstloadidx1",
8809 auxType: auxSymValAndOff,
8810 argLen: 3,
8811 commutative: true,
8812 symEffect: SymRead,
8813 asm: x86.ACMPW,
8814 scale: 1,
8815 reg: regInfo{
8816 inputs: []inputInfo{
8817 {1, 49151},
8818 {0, 4295032831},
8819 },
8820 },
8821 },
8822 {
8823 name: "CMPBconstloadidx1",
8824 auxType: auxSymValAndOff,
8825 argLen: 3,
8826 commutative: true,
8827 symEffect: SymRead,
8828 asm: x86.ACMPB,
8829 scale: 1,
8830 reg: regInfo{
8831 inputs: []inputInfo{
8832 {1, 49151},
8833 {0, 4295032831},
8834 },
8835 },
8836 },
8837 {
8838 name: "UCOMISS",
8839 argLen: 2,
8840 asm: x86.AUCOMISS,
8841 reg: regInfo{
8842 inputs: []inputInfo{
8843 {0, 2147418112},
8844 {1, 2147418112},
8845 },
8846 },
8847 },
8848 {
8849 name: "UCOMISD",
8850 argLen: 2,
8851 asm: x86.AUCOMISD,
8852 reg: regInfo{
8853 inputs: []inputInfo{
8854 {0, 2147418112},
8855 {1, 2147418112},
8856 },
8857 },
8858 },
8859 {
8860 name: "BTL",
8861 argLen: 2,
8862 asm: x86.ABTL,
8863 reg: regInfo{
8864 inputs: []inputInfo{
8865 {0, 49151},
8866 {1, 49151},
8867 },
8868 },
8869 },
8870 {
8871 name: "BTQ",
8872 argLen: 2,
8873 asm: x86.ABTQ,
8874 reg: regInfo{
8875 inputs: []inputInfo{
8876 {0, 49151},
8877 {1, 49151},
8878 },
8879 },
8880 },
8881 {
8882 name: "BTCL",
8883 argLen: 2,
8884 resultInArg0: true,
8885 clobberFlags: true,
8886 asm: x86.ABTCL,
8887 reg: regInfo{
8888 inputs: []inputInfo{
8889 {0, 49135},
8890 {1, 49135},
8891 },
8892 outputs: []outputInfo{
8893 {0, 49135},
8894 },
8895 },
8896 },
8897 {
8898 name: "BTCQ",
8899 argLen: 2,
8900 resultInArg0: true,
8901 clobberFlags: true,
8902 asm: x86.ABTCQ,
8903 reg: regInfo{
8904 inputs: []inputInfo{
8905 {0, 49135},
8906 {1, 49135},
8907 },
8908 outputs: []outputInfo{
8909 {0, 49135},
8910 },
8911 },
8912 },
8913 {
8914 name: "BTRL",
8915 argLen: 2,
8916 resultInArg0: true,
8917 clobberFlags: true,
8918 asm: x86.ABTRL,
8919 reg: regInfo{
8920 inputs: []inputInfo{
8921 {0, 49135},
8922 {1, 49135},
8923 },
8924 outputs: []outputInfo{
8925 {0, 49135},
8926 },
8927 },
8928 },
8929 {
8930 name: "BTRQ",
8931 argLen: 2,
8932 resultInArg0: true,
8933 clobberFlags: true,
8934 asm: x86.ABTRQ,
8935 reg: regInfo{
8936 inputs: []inputInfo{
8937 {0, 49135},
8938 {1, 49135},
8939 },
8940 outputs: []outputInfo{
8941 {0, 49135},
8942 },
8943 },
8944 },
8945 {
8946 name: "BTSL",
8947 argLen: 2,
8948 resultInArg0: true,
8949 clobberFlags: true,
8950 asm: x86.ABTSL,
8951 reg: regInfo{
8952 inputs: []inputInfo{
8953 {0, 49135},
8954 {1, 49135},
8955 },
8956 outputs: []outputInfo{
8957 {0, 49135},
8958 },
8959 },
8960 },
8961 {
8962 name: "BTSQ",
8963 argLen: 2,
8964 resultInArg0: true,
8965 clobberFlags: true,
8966 asm: x86.ABTSQ,
8967 reg: regInfo{
8968 inputs: []inputInfo{
8969 {0, 49135},
8970 {1, 49135},
8971 },
8972 outputs: []outputInfo{
8973 {0, 49135},
8974 },
8975 },
8976 },
8977 {
8978 name: "BTLconst",
8979 auxType: auxInt8,
8980 argLen: 1,
8981 asm: x86.ABTL,
8982 reg: regInfo{
8983 inputs: []inputInfo{
8984 {0, 49151},
8985 },
8986 },
8987 },
8988 {
8989 name: "BTQconst",
8990 auxType: auxInt8,
8991 argLen: 1,
8992 asm: x86.ABTQ,
8993 reg: regInfo{
8994 inputs: []inputInfo{
8995 {0, 49151},
8996 },
8997 },
8998 },
8999 {
9000 name: "BTCQconst",
9001 auxType: auxInt8,
9002 argLen: 1,
9003 resultInArg0: true,
9004 clobberFlags: true,
9005 asm: x86.ABTCQ,
9006 reg: regInfo{
9007 inputs: []inputInfo{
9008 {0, 49135},
9009 },
9010 outputs: []outputInfo{
9011 {0, 49135},
9012 },
9013 },
9014 },
9015 {
9016 name: "BTRQconst",
9017 auxType: auxInt8,
9018 argLen: 1,
9019 resultInArg0: true,
9020 clobberFlags: true,
9021 asm: x86.ABTRQ,
9022 reg: regInfo{
9023 inputs: []inputInfo{
9024 {0, 49135},
9025 },
9026 outputs: []outputInfo{
9027 {0, 49135},
9028 },
9029 },
9030 },
9031 {
9032 name: "BTSQconst",
9033 auxType: auxInt8,
9034 argLen: 1,
9035 resultInArg0: true,
9036 clobberFlags: true,
9037 asm: x86.ABTSQ,
9038 reg: regInfo{
9039 inputs: []inputInfo{
9040 {0, 49135},
9041 },
9042 outputs: []outputInfo{
9043 {0, 49135},
9044 },
9045 },
9046 },
9047 {
9048 name: "BTSQconstmodify",
9049 auxType: auxSymValAndOff,
9050 argLen: 2,
9051 clobberFlags: true,
9052 faultOnNilArg0: true,
9053 symEffect: SymRead | SymWrite,
9054 asm: x86.ABTSQ,
9055 reg: regInfo{
9056 inputs: []inputInfo{
9057 {0, 4295032831},
9058 },
9059 },
9060 },
9061 {
9062 name: "BTRQconstmodify",
9063 auxType: auxSymValAndOff,
9064 argLen: 2,
9065 clobberFlags: true,
9066 faultOnNilArg0: true,
9067 symEffect: SymRead | SymWrite,
9068 asm: x86.ABTRQ,
9069 reg: regInfo{
9070 inputs: []inputInfo{
9071 {0, 4295032831},
9072 },
9073 },
9074 },
9075 {
9076 name: "BTCQconstmodify",
9077 auxType: auxSymValAndOff,
9078 argLen: 2,
9079 clobberFlags: true,
9080 faultOnNilArg0: true,
9081 symEffect: SymRead | SymWrite,
9082 asm: x86.ABTCQ,
9083 reg: regInfo{
9084 inputs: []inputInfo{
9085 {0, 4295032831},
9086 },
9087 },
9088 },
9089 {
9090 name: "TESTQ",
9091 argLen: 2,
9092 commutative: true,
9093 asm: x86.ATESTQ,
9094 reg: regInfo{
9095 inputs: []inputInfo{
9096 {0, 49151},
9097 {1, 49151},
9098 },
9099 },
9100 },
9101 {
9102 name: "TESTL",
9103 argLen: 2,
9104 commutative: true,
9105 asm: x86.ATESTL,
9106 reg: regInfo{
9107 inputs: []inputInfo{
9108 {0, 49151},
9109 {1, 49151},
9110 },
9111 },
9112 },
9113 {
9114 name: "TESTW",
9115 argLen: 2,
9116 commutative: true,
9117 asm: x86.ATESTW,
9118 reg: regInfo{
9119 inputs: []inputInfo{
9120 {0, 49151},
9121 {1, 49151},
9122 },
9123 },
9124 },
9125 {
9126 name: "TESTB",
9127 argLen: 2,
9128 commutative: true,
9129 asm: x86.ATESTB,
9130 reg: regInfo{
9131 inputs: []inputInfo{
9132 {0, 49151},
9133 {1, 49151},
9134 },
9135 },
9136 },
9137 {
9138 name: "TESTQconst",
9139 auxType: auxInt32,
9140 argLen: 1,
9141 asm: x86.ATESTQ,
9142 reg: regInfo{
9143 inputs: []inputInfo{
9144 {0, 49151},
9145 },
9146 },
9147 },
9148 {
9149 name: "TESTLconst",
9150 auxType: auxInt32,
9151 argLen: 1,
9152 asm: x86.ATESTL,
9153 reg: regInfo{
9154 inputs: []inputInfo{
9155 {0, 49151},
9156 },
9157 },
9158 },
9159 {
9160 name: "TESTWconst",
9161 auxType: auxInt16,
9162 argLen: 1,
9163 asm: x86.ATESTW,
9164 reg: regInfo{
9165 inputs: []inputInfo{
9166 {0, 49151},
9167 },
9168 },
9169 },
9170 {
9171 name: "TESTBconst",
9172 auxType: auxInt8,
9173 argLen: 1,
9174 asm: x86.ATESTB,
9175 reg: regInfo{
9176 inputs: []inputInfo{
9177 {0, 49151},
9178 },
9179 },
9180 },
9181 {
9182 name: "SHLQ",
9183 argLen: 2,
9184 resultInArg0: true,
9185 clobberFlags: true,
9186 asm: x86.ASHLQ,
9187 reg: regInfo{
9188 inputs: []inputInfo{
9189 {1, 2},
9190 {0, 49135},
9191 },
9192 outputs: []outputInfo{
9193 {0, 49135},
9194 },
9195 },
9196 },
9197 {
9198 name: "SHLL",
9199 argLen: 2,
9200 resultInArg0: true,
9201 clobberFlags: true,
9202 asm: x86.ASHLL,
9203 reg: regInfo{
9204 inputs: []inputInfo{
9205 {1, 2},
9206 {0, 49135},
9207 },
9208 outputs: []outputInfo{
9209 {0, 49135},
9210 },
9211 },
9212 },
9213 {
9214 name: "SHLQconst",
9215 auxType: auxInt8,
9216 argLen: 1,
9217 resultInArg0: true,
9218 clobberFlags: true,
9219 asm: x86.ASHLQ,
9220 reg: regInfo{
9221 inputs: []inputInfo{
9222 {0, 49135},
9223 },
9224 outputs: []outputInfo{
9225 {0, 49135},
9226 },
9227 },
9228 },
9229 {
9230 name: "SHLLconst",
9231 auxType: auxInt8,
9232 argLen: 1,
9233 resultInArg0: true,
9234 clobberFlags: true,
9235 asm: x86.ASHLL,
9236 reg: regInfo{
9237 inputs: []inputInfo{
9238 {0, 49135},
9239 },
9240 outputs: []outputInfo{
9241 {0, 49135},
9242 },
9243 },
9244 },
9245 {
9246 name: "SHRQ",
9247 argLen: 2,
9248 resultInArg0: true,
9249 clobberFlags: true,
9250 asm: x86.ASHRQ,
9251 reg: regInfo{
9252 inputs: []inputInfo{
9253 {1, 2},
9254 {0, 49135},
9255 },
9256 outputs: []outputInfo{
9257 {0, 49135},
9258 },
9259 },
9260 },
9261 {
9262 name: "SHRL",
9263 argLen: 2,
9264 resultInArg0: true,
9265 clobberFlags: true,
9266 asm: x86.ASHRL,
9267 reg: regInfo{
9268 inputs: []inputInfo{
9269 {1, 2},
9270 {0, 49135},
9271 },
9272 outputs: []outputInfo{
9273 {0, 49135},
9274 },
9275 },
9276 },
9277 {
9278 name: "SHRW",
9279 argLen: 2,
9280 resultInArg0: true,
9281 clobberFlags: true,
9282 asm: x86.ASHRW,
9283 reg: regInfo{
9284 inputs: []inputInfo{
9285 {1, 2},
9286 {0, 49135},
9287 },
9288 outputs: []outputInfo{
9289 {0, 49135},
9290 },
9291 },
9292 },
9293 {
9294 name: "SHRB",
9295 argLen: 2,
9296 resultInArg0: true,
9297 clobberFlags: true,
9298 asm: x86.ASHRB,
9299 reg: regInfo{
9300 inputs: []inputInfo{
9301 {1, 2},
9302 {0, 49135},
9303 },
9304 outputs: []outputInfo{
9305 {0, 49135},
9306 },
9307 },
9308 },
9309 {
9310 name: "SHRQconst",
9311 auxType: auxInt8,
9312 argLen: 1,
9313 resultInArg0: true,
9314 clobberFlags: true,
9315 asm: x86.ASHRQ,
9316 reg: regInfo{
9317 inputs: []inputInfo{
9318 {0, 49135},
9319 },
9320 outputs: []outputInfo{
9321 {0, 49135},
9322 },
9323 },
9324 },
9325 {
9326 name: "SHRLconst",
9327 auxType: auxInt8,
9328 argLen: 1,
9329 resultInArg0: true,
9330 clobberFlags: true,
9331 asm: x86.ASHRL,
9332 reg: regInfo{
9333 inputs: []inputInfo{
9334 {0, 49135},
9335 },
9336 outputs: []outputInfo{
9337 {0, 49135},
9338 },
9339 },
9340 },
9341 {
9342 name: "SHRWconst",
9343 auxType: auxInt8,
9344 argLen: 1,
9345 resultInArg0: true,
9346 clobberFlags: true,
9347 asm: x86.ASHRW,
9348 reg: regInfo{
9349 inputs: []inputInfo{
9350 {0, 49135},
9351 },
9352 outputs: []outputInfo{
9353 {0, 49135},
9354 },
9355 },
9356 },
9357 {
9358 name: "SHRBconst",
9359 auxType: auxInt8,
9360 argLen: 1,
9361 resultInArg0: true,
9362 clobberFlags: true,
9363 asm: x86.ASHRB,
9364 reg: regInfo{
9365 inputs: []inputInfo{
9366 {0, 49135},
9367 },
9368 outputs: []outputInfo{
9369 {0, 49135},
9370 },
9371 },
9372 },
9373 {
9374 name: "SARQ",
9375 argLen: 2,
9376 resultInArg0: true,
9377 clobberFlags: true,
9378 asm: x86.ASARQ,
9379 reg: regInfo{
9380 inputs: []inputInfo{
9381 {1, 2},
9382 {0, 49135},
9383 },
9384 outputs: []outputInfo{
9385 {0, 49135},
9386 },
9387 },
9388 },
9389 {
9390 name: "SARL",
9391 argLen: 2,
9392 resultInArg0: true,
9393 clobberFlags: true,
9394 asm: x86.ASARL,
9395 reg: regInfo{
9396 inputs: []inputInfo{
9397 {1, 2},
9398 {0, 49135},
9399 },
9400 outputs: []outputInfo{
9401 {0, 49135},
9402 },
9403 },
9404 },
9405 {
9406 name: "SARW",
9407 argLen: 2,
9408 resultInArg0: true,
9409 clobberFlags: true,
9410 asm: x86.ASARW,
9411 reg: regInfo{
9412 inputs: []inputInfo{
9413 {1, 2},
9414 {0, 49135},
9415 },
9416 outputs: []outputInfo{
9417 {0, 49135},
9418 },
9419 },
9420 },
9421 {
9422 name: "SARB",
9423 argLen: 2,
9424 resultInArg0: true,
9425 clobberFlags: true,
9426 asm: x86.ASARB,
9427 reg: regInfo{
9428 inputs: []inputInfo{
9429 {1, 2},
9430 {0, 49135},
9431 },
9432 outputs: []outputInfo{
9433 {0, 49135},
9434 },
9435 },
9436 },
9437 {
9438 name: "SARQconst",
9439 auxType: auxInt8,
9440 argLen: 1,
9441 resultInArg0: true,
9442 clobberFlags: true,
9443 asm: x86.ASARQ,
9444 reg: regInfo{
9445 inputs: []inputInfo{
9446 {0, 49135},
9447 },
9448 outputs: []outputInfo{
9449 {0, 49135},
9450 },
9451 },
9452 },
9453 {
9454 name: "SARLconst",
9455 auxType: auxInt8,
9456 argLen: 1,
9457 resultInArg0: true,
9458 clobberFlags: true,
9459 asm: x86.ASARL,
9460 reg: regInfo{
9461 inputs: []inputInfo{
9462 {0, 49135},
9463 },
9464 outputs: []outputInfo{
9465 {0, 49135},
9466 },
9467 },
9468 },
9469 {
9470 name: "SARWconst",
9471 auxType: auxInt8,
9472 argLen: 1,
9473 resultInArg0: true,
9474 clobberFlags: true,
9475 asm: x86.ASARW,
9476 reg: regInfo{
9477 inputs: []inputInfo{
9478 {0, 49135},
9479 },
9480 outputs: []outputInfo{
9481 {0, 49135},
9482 },
9483 },
9484 },
9485 {
9486 name: "SARBconst",
9487 auxType: auxInt8,
9488 argLen: 1,
9489 resultInArg0: true,
9490 clobberFlags: true,
9491 asm: x86.ASARB,
9492 reg: regInfo{
9493 inputs: []inputInfo{
9494 {0, 49135},
9495 },
9496 outputs: []outputInfo{
9497 {0, 49135},
9498 },
9499 },
9500 },
9501 {
9502 name: "SHRDQ",
9503 argLen: 3,
9504 resultInArg0: true,
9505 clobberFlags: true,
9506 asm: x86.ASHRQ,
9507 reg: regInfo{
9508 inputs: []inputInfo{
9509 {2, 2},
9510 {0, 49135},
9511 {1, 49135},
9512 },
9513 outputs: []outputInfo{
9514 {0, 49135},
9515 },
9516 },
9517 },
9518 {
9519 name: "SHLDQ",
9520 argLen: 3,
9521 resultInArg0: true,
9522 clobberFlags: true,
9523 asm: x86.ASHLQ,
9524 reg: regInfo{
9525 inputs: []inputInfo{
9526 {2, 2},
9527 {0, 49135},
9528 {1, 49135},
9529 },
9530 outputs: []outputInfo{
9531 {0, 49135},
9532 },
9533 },
9534 },
9535 {
9536 name: "ROLQ",
9537 argLen: 2,
9538 resultInArg0: true,
9539 clobberFlags: true,
9540 asm: x86.AROLQ,
9541 reg: regInfo{
9542 inputs: []inputInfo{
9543 {1, 2},
9544 {0, 49135},
9545 },
9546 outputs: []outputInfo{
9547 {0, 49135},
9548 },
9549 },
9550 },
9551 {
9552 name: "ROLL",
9553 argLen: 2,
9554 resultInArg0: true,
9555 clobberFlags: true,
9556 asm: x86.AROLL,
9557 reg: regInfo{
9558 inputs: []inputInfo{
9559 {1, 2},
9560 {0, 49135},
9561 },
9562 outputs: []outputInfo{
9563 {0, 49135},
9564 },
9565 },
9566 },
9567 {
9568 name: "ROLW",
9569 argLen: 2,
9570 resultInArg0: true,
9571 clobberFlags: true,
9572 asm: x86.AROLW,
9573 reg: regInfo{
9574 inputs: []inputInfo{
9575 {1, 2},
9576 {0, 49135},
9577 },
9578 outputs: []outputInfo{
9579 {0, 49135},
9580 },
9581 },
9582 },
9583 {
9584 name: "ROLB",
9585 argLen: 2,
9586 resultInArg0: true,
9587 clobberFlags: true,
9588 asm: x86.AROLB,
9589 reg: regInfo{
9590 inputs: []inputInfo{
9591 {1, 2},
9592 {0, 49135},
9593 },
9594 outputs: []outputInfo{
9595 {0, 49135},
9596 },
9597 },
9598 },
9599 {
9600 name: "RORQ",
9601 argLen: 2,
9602 resultInArg0: true,
9603 clobberFlags: true,
9604 asm: x86.ARORQ,
9605 reg: regInfo{
9606 inputs: []inputInfo{
9607 {1, 2},
9608 {0, 49135},
9609 },
9610 outputs: []outputInfo{
9611 {0, 49135},
9612 },
9613 },
9614 },
9615 {
9616 name: "RORL",
9617 argLen: 2,
9618 resultInArg0: true,
9619 clobberFlags: true,
9620 asm: x86.ARORL,
9621 reg: regInfo{
9622 inputs: []inputInfo{
9623 {1, 2},
9624 {0, 49135},
9625 },
9626 outputs: []outputInfo{
9627 {0, 49135},
9628 },
9629 },
9630 },
9631 {
9632 name: "RORW",
9633 argLen: 2,
9634 resultInArg0: true,
9635 clobberFlags: true,
9636 asm: x86.ARORW,
9637 reg: regInfo{
9638 inputs: []inputInfo{
9639 {1, 2},
9640 {0, 49135},
9641 },
9642 outputs: []outputInfo{
9643 {0, 49135},
9644 },
9645 },
9646 },
9647 {
9648 name: "RORB",
9649 argLen: 2,
9650 resultInArg0: true,
9651 clobberFlags: true,
9652 asm: x86.ARORB,
9653 reg: regInfo{
9654 inputs: []inputInfo{
9655 {1, 2},
9656 {0, 49135},
9657 },
9658 outputs: []outputInfo{
9659 {0, 49135},
9660 },
9661 },
9662 },
9663 {
9664 name: "ROLQconst",
9665 auxType: auxInt8,
9666 argLen: 1,
9667 resultInArg0: true,
9668 clobberFlags: true,
9669 asm: x86.AROLQ,
9670 reg: regInfo{
9671 inputs: []inputInfo{
9672 {0, 49135},
9673 },
9674 outputs: []outputInfo{
9675 {0, 49135},
9676 },
9677 },
9678 },
9679 {
9680 name: "ROLLconst",
9681 auxType: auxInt8,
9682 argLen: 1,
9683 resultInArg0: true,
9684 clobberFlags: true,
9685 asm: x86.AROLL,
9686 reg: regInfo{
9687 inputs: []inputInfo{
9688 {0, 49135},
9689 },
9690 outputs: []outputInfo{
9691 {0, 49135},
9692 },
9693 },
9694 },
9695 {
9696 name: "ROLWconst",
9697 auxType: auxInt8,
9698 argLen: 1,
9699 resultInArg0: true,
9700 clobberFlags: true,
9701 asm: x86.AROLW,
9702 reg: regInfo{
9703 inputs: []inputInfo{
9704 {0, 49135},
9705 },
9706 outputs: []outputInfo{
9707 {0, 49135},
9708 },
9709 },
9710 },
9711 {
9712 name: "ROLBconst",
9713 auxType: auxInt8,
9714 argLen: 1,
9715 resultInArg0: true,
9716 clobberFlags: true,
9717 asm: x86.AROLB,
9718 reg: regInfo{
9719 inputs: []inputInfo{
9720 {0, 49135},
9721 },
9722 outputs: []outputInfo{
9723 {0, 49135},
9724 },
9725 },
9726 },
9727 {
9728 name: "ADDLload",
9729 auxType: auxSymOff,
9730 argLen: 3,
9731 resultInArg0: true,
9732 clobberFlags: true,
9733 faultOnNilArg1: true,
9734 symEffect: SymRead,
9735 asm: x86.AADDL,
9736 reg: regInfo{
9737 inputs: []inputInfo{
9738 {0, 49135},
9739 {1, 4295032831},
9740 },
9741 outputs: []outputInfo{
9742 {0, 49135},
9743 },
9744 },
9745 },
9746 {
9747 name: "ADDQload",
9748 auxType: auxSymOff,
9749 argLen: 3,
9750 resultInArg0: true,
9751 clobberFlags: true,
9752 faultOnNilArg1: true,
9753 symEffect: SymRead,
9754 asm: x86.AADDQ,
9755 reg: regInfo{
9756 inputs: []inputInfo{
9757 {0, 49135},
9758 {1, 4295032831},
9759 },
9760 outputs: []outputInfo{
9761 {0, 49135},
9762 },
9763 },
9764 },
9765 {
9766 name: "SUBQload",
9767 auxType: auxSymOff,
9768 argLen: 3,
9769 resultInArg0: true,
9770 clobberFlags: true,
9771 faultOnNilArg1: true,
9772 symEffect: SymRead,
9773 asm: x86.ASUBQ,
9774 reg: regInfo{
9775 inputs: []inputInfo{
9776 {0, 49135},
9777 {1, 4295032831},
9778 },
9779 outputs: []outputInfo{
9780 {0, 49135},
9781 },
9782 },
9783 },
9784 {
9785 name: "SUBLload",
9786 auxType: auxSymOff,
9787 argLen: 3,
9788 resultInArg0: true,
9789 clobberFlags: true,
9790 faultOnNilArg1: true,
9791 symEffect: SymRead,
9792 asm: x86.ASUBL,
9793 reg: regInfo{
9794 inputs: []inputInfo{
9795 {0, 49135},
9796 {1, 4295032831},
9797 },
9798 outputs: []outputInfo{
9799 {0, 49135},
9800 },
9801 },
9802 },
9803 {
9804 name: "ANDLload",
9805 auxType: auxSymOff,
9806 argLen: 3,
9807 resultInArg0: true,
9808 clobberFlags: true,
9809 faultOnNilArg1: true,
9810 symEffect: SymRead,
9811 asm: x86.AANDL,
9812 reg: regInfo{
9813 inputs: []inputInfo{
9814 {0, 49135},
9815 {1, 4295032831},
9816 },
9817 outputs: []outputInfo{
9818 {0, 49135},
9819 },
9820 },
9821 },
9822 {
9823 name: "ANDQload",
9824 auxType: auxSymOff,
9825 argLen: 3,
9826 resultInArg0: true,
9827 clobberFlags: true,
9828 faultOnNilArg1: true,
9829 symEffect: SymRead,
9830 asm: x86.AANDQ,
9831 reg: regInfo{
9832 inputs: []inputInfo{
9833 {0, 49135},
9834 {1, 4295032831},
9835 },
9836 outputs: []outputInfo{
9837 {0, 49135},
9838 },
9839 },
9840 },
9841 {
9842 name: "ORQload",
9843 auxType: auxSymOff,
9844 argLen: 3,
9845 resultInArg0: true,
9846 clobberFlags: true,
9847 faultOnNilArg1: true,
9848 symEffect: SymRead,
9849 asm: x86.AORQ,
9850 reg: regInfo{
9851 inputs: []inputInfo{
9852 {0, 49135},
9853 {1, 4295032831},
9854 },
9855 outputs: []outputInfo{
9856 {0, 49135},
9857 },
9858 },
9859 },
9860 {
9861 name: "ORLload",
9862 auxType: auxSymOff,
9863 argLen: 3,
9864 resultInArg0: true,
9865 clobberFlags: true,
9866 faultOnNilArg1: true,
9867 symEffect: SymRead,
9868 asm: x86.AORL,
9869 reg: regInfo{
9870 inputs: []inputInfo{
9871 {0, 49135},
9872 {1, 4295032831},
9873 },
9874 outputs: []outputInfo{
9875 {0, 49135},
9876 },
9877 },
9878 },
9879 {
9880 name: "XORQload",
9881 auxType: auxSymOff,
9882 argLen: 3,
9883 resultInArg0: true,
9884 clobberFlags: true,
9885 faultOnNilArg1: true,
9886 symEffect: SymRead,
9887 asm: x86.AXORQ,
9888 reg: regInfo{
9889 inputs: []inputInfo{
9890 {0, 49135},
9891 {1, 4295032831},
9892 },
9893 outputs: []outputInfo{
9894 {0, 49135},
9895 },
9896 },
9897 },
9898 {
9899 name: "XORLload",
9900 auxType: auxSymOff,
9901 argLen: 3,
9902 resultInArg0: true,
9903 clobberFlags: true,
9904 faultOnNilArg1: true,
9905 symEffect: SymRead,
9906 asm: x86.AXORL,
9907 reg: regInfo{
9908 inputs: []inputInfo{
9909 {0, 49135},
9910 {1, 4295032831},
9911 },
9912 outputs: []outputInfo{
9913 {0, 49135},
9914 },
9915 },
9916 },
9917 {
9918 name: "ADDLloadidx1",
9919 auxType: auxSymOff,
9920 argLen: 4,
9921 resultInArg0: true,
9922 clobberFlags: true,
9923 symEffect: SymRead,
9924 asm: x86.AADDL,
9925 scale: 1,
9926 reg: regInfo{
9927 inputs: []inputInfo{
9928 {0, 49135},
9929 {2, 49151},
9930 {1, 4295032831},
9931 },
9932 outputs: []outputInfo{
9933 {0, 49135},
9934 },
9935 },
9936 },
9937 {
9938 name: "ADDLloadidx4",
9939 auxType: auxSymOff,
9940 argLen: 4,
9941 resultInArg0: true,
9942 clobberFlags: true,
9943 symEffect: SymRead,
9944 asm: x86.AADDL,
9945 scale: 4,
9946 reg: regInfo{
9947 inputs: []inputInfo{
9948 {0, 49135},
9949 {2, 49151},
9950 {1, 4295032831},
9951 },
9952 outputs: []outputInfo{
9953 {0, 49135},
9954 },
9955 },
9956 },
9957 {
9958 name: "ADDLloadidx8",
9959 auxType: auxSymOff,
9960 argLen: 4,
9961 resultInArg0: true,
9962 clobberFlags: true,
9963 symEffect: SymRead,
9964 asm: x86.AADDL,
9965 scale: 8,
9966 reg: regInfo{
9967 inputs: []inputInfo{
9968 {0, 49135},
9969 {2, 49151},
9970 {1, 4295032831},
9971 },
9972 outputs: []outputInfo{
9973 {0, 49135},
9974 },
9975 },
9976 },
9977 {
9978 name: "ADDQloadidx1",
9979 auxType: auxSymOff,
9980 argLen: 4,
9981 resultInArg0: true,
9982 clobberFlags: true,
9983 symEffect: SymRead,
9984 asm: x86.AADDQ,
9985 scale: 1,
9986 reg: regInfo{
9987 inputs: []inputInfo{
9988 {0, 49135},
9989 {2, 49151},
9990 {1, 4295032831},
9991 },
9992 outputs: []outputInfo{
9993 {0, 49135},
9994 },
9995 },
9996 },
9997 {
9998 name: "ADDQloadidx8",
9999 auxType: auxSymOff,
10000 argLen: 4,
10001 resultInArg0: true,
10002 clobberFlags: true,
10003 symEffect: SymRead,
10004 asm: x86.AADDQ,
10005 scale: 8,
10006 reg: regInfo{
10007 inputs: []inputInfo{
10008 {0, 49135},
10009 {2, 49151},
10010 {1, 4295032831},
10011 },
10012 outputs: []outputInfo{
10013 {0, 49135},
10014 },
10015 },
10016 },
10017 {
10018 name: "SUBLloadidx1",
10019 auxType: auxSymOff,
10020 argLen: 4,
10021 resultInArg0: true,
10022 clobberFlags: true,
10023 symEffect: SymRead,
10024 asm: x86.ASUBL,
10025 scale: 1,
10026 reg: regInfo{
10027 inputs: []inputInfo{
10028 {0, 49135},
10029 {2, 49151},
10030 {1, 4295032831},
10031 },
10032 outputs: []outputInfo{
10033 {0, 49135},
10034 },
10035 },
10036 },
10037 {
10038 name: "SUBLloadidx4",
10039 auxType: auxSymOff,
10040 argLen: 4,
10041 resultInArg0: true,
10042 clobberFlags: true,
10043 symEffect: SymRead,
10044 asm: x86.ASUBL,
10045 scale: 4,
10046 reg: regInfo{
10047 inputs: []inputInfo{
10048 {0, 49135},
10049 {2, 49151},
10050 {1, 4295032831},
10051 },
10052 outputs: []outputInfo{
10053 {0, 49135},
10054 },
10055 },
10056 },
10057 {
10058 name: "SUBLloadidx8",
10059 auxType: auxSymOff,
10060 argLen: 4,
10061 resultInArg0: true,
10062 clobberFlags: true,
10063 symEffect: SymRead,
10064 asm: x86.ASUBL,
10065 scale: 8,
10066 reg: regInfo{
10067 inputs: []inputInfo{
10068 {0, 49135},
10069 {2, 49151},
10070 {1, 4295032831},
10071 },
10072 outputs: []outputInfo{
10073 {0, 49135},
10074 },
10075 },
10076 },
10077 {
10078 name: "SUBQloadidx1",
10079 auxType: auxSymOff,
10080 argLen: 4,
10081 resultInArg0: true,
10082 clobberFlags: true,
10083 symEffect: SymRead,
10084 asm: x86.ASUBQ,
10085 scale: 1,
10086 reg: regInfo{
10087 inputs: []inputInfo{
10088 {0, 49135},
10089 {2, 49151},
10090 {1, 4295032831},
10091 },
10092 outputs: []outputInfo{
10093 {0, 49135},
10094 },
10095 },
10096 },
10097 {
10098 name: "SUBQloadidx8",
10099 auxType: auxSymOff,
10100 argLen: 4,
10101 resultInArg0: true,
10102 clobberFlags: true,
10103 symEffect: SymRead,
10104 asm: x86.ASUBQ,
10105 scale: 8,
10106 reg: regInfo{
10107 inputs: []inputInfo{
10108 {0, 49135},
10109 {2, 49151},
10110 {1, 4295032831},
10111 },
10112 outputs: []outputInfo{
10113 {0, 49135},
10114 },
10115 },
10116 },
10117 {
10118 name: "ANDLloadidx1",
10119 auxType: auxSymOff,
10120 argLen: 4,
10121 resultInArg0: true,
10122 clobberFlags: true,
10123 symEffect: SymRead,
10124 asm: x86.AANDL,
10125 scale: 1,
10126 reg: regInfo{
10127 inputs: []inputInfo{
10128 {0, 49135},
10129 {2, 49151},
10130 {1, 4295032831},
10131 },
10132 outputs: []outputInfo{
10133 {0, 49135},
10134 },
10135 },
10136 },
10137 {
10138 name: "ANDLloadidx4",
10139 auxType: auxSymOff,
10140 argLen: 4,
10141 resultInArg0: true,
10142 clobberFlags: true,
10143 symEffect: SymRead,
10144 asm: x86.AANDL,
10145 scale: 4,
10146 reg: regInfo{
10147 inputs: []inputInfo{
10148 {0, 49135},
10149 {2, 49151},
10150 {1, 4295032831},
10151 },
10152 outputs: []outputInfo{
10153 {0, 49135},
10154 },
10155 },
10156 },
10157 {
10158 name: "ANDLloadidx8",
10159 auxType: auxSymOff,
10160 argLen: 4,
10161 resultInArg0: true,
10162 clobberFlags: true,
10163 symEffect: SymRead,
10164 asm: x86.AANDL,
10165 scale: 8,
10166 reg: regInfo{
10167 inputs: []inputInfo{
10168 {0, 49135},
10169 {2, 49151},
10170 {1, 4295032831},
10171 },
10172 outputs: []outputInfo{
10173 {0, 49135},
10174 },
10175 },
10176 },
10177 {
10178 name: "ANDQloadidx1",
10179 auxType: auxSymOff,
10180 argLen: 4,
10181 resultInArg0: true,
10182 clobberFlags: true,
10183 symEffect: SymRead,
10184 asm: x86.AANDQ,
10185 scale: 1,
10186 reg: regInfo{
10187 inputs: []inputInfo{
10188 {0, 49135},
10189 {2, 49151},
10190 {1, 4295032831},
10191 },
10192 outputs: []outputInfo{
10193 {0, 49135},
10194 },
10195 },
10196 },
10197 {
10198 name: "ANDQloadidx8",
10199 auxType: auxSymOff,
10200 argLen: 4,
10201 resultInArg0: true,
10202 clobberFlags: true,
10203 symEffect: SymRead,
10204 asm: x86.AANDQ,
10205 scale: 8,
10206 reg: regInfo{
10207 inputs: []inputInfo{
10208 {0, 49135},
10209 {2, 49151},
10210 {1, 4295032831},
10211 },
10212 outputs: []outputInfo{
10213 {0, 49135},
10214 },
10215 },
10216 },
10217 {
10218 name: "ORLloadidx1",
10219 auxType: auxSymOff,
10220 argLen: 4,
10221 resultInArg0: true,
10222 clobberFlags: true,
10223 symEffect: SymRead,
10224 asm: x86.AORL,
10225 scale: 1,
10226 reg: regInfo{
10227 inputs: []inputInfo{
10228 {0, 49135},
10229 {2, 49151},
10230 {1, 4295032831},
10231 },
10232 outputs: []outputInfo{
10233 {0, 49135},
10234 },
10235 },
10236 },
10237 {
10238 name: "ORLloadidx4",
10239 auxType: auxSymOff,
10240 argLen: 4,
10241 resultInArg0: true,
10242 clobberFlags: true,
10243 symEffect: SymRead,
10244 asm: x86.AORL,
10245 scale: 4,
10246 reg: regInfo{
10247 inputs: []inputInfo{
10248 {0, 49135},
10249 {2, 49151},
10250 {1, 4295032831},
10251 },
10252 outputs: []outputInfo{
10253 {0, 49135},
10254 },
10255 },
10256 },
10257 {
10258 name: "ORLloadidx8",
10259 auxType: auxSymOff,
10260 argLen: 4,
10261 resultInArg0: true,
10262 clobberFlags: true,
10263 symEffect: SymRead,
10264 asm: x86.AORL,
10265 scale: 8,
10266 reg: regInfo{
10267 inputs: []inputInfo{
10268 {0, 49135},
10269 {2, 49151},
10270 {1, 4295032831},
10271 },
10272 outputs: []outputInfo{
10273 {0, 49135},
10274 },
10275 },
10276 },
10277 {
10278 name: "ORQloadidx1",
10279 auxType: auxSymOff,
10280 argLen: 4,
10281 resultInArg0: true,
10282 clobberFlags: true,
10283 symEffect: SymRead,
10284 asm: x86.AORQ,
10285 scale: 1,
10286 reg: regInfo{
10287 inputs: []inputInfo{
10288 {0, 49135},
10289 {2, 49151},
10290 {1, 4295032831},
10291 },
10292 outputs: []outputInfo{
10293 {0, 49135},
10294 },
10295 },
10296 },
10297 {
10298 name: "ORQloadidx8",
10299 auxType: auxSymOff,
10300 argLen: 4,
10301 resultInArg0: true,
10302 clobberFlags: true,
10303 symEffect: SymRead,
10304 asm: x86.AORQ,
10305 scale: 8,
10306 reg: regInfo{
10307 inputs: []inputInfo{
10308 {0, 49135},
10309 {2, 49151},
10310 {1, 4295032831},
10311 },
10312 outputs: []outputInfo{
10313 {0, 49135},
10314 },
10315 },
10316 },
10317 {
10318 name: "XORLloadidx1",
10319 auxType: auxSymOff,
10320 argLen: 4,
10321 resultInArg0: true,
10322 clobberFlags: true,
10323 symEffect: SymRead,
10324 asm: x86.AXORL,
10325 scale: 1,
10326 reg: regInfo{
10327 inputs: []inputInfo{
10328 {0, 49135},
10329 {2, 49151},
10330 {1, 4295032831},
10331 },
10332 outputs: []outputInfo{
10333 {0, 49135},
10334 },
10335 },
10336 },
10337 {
10338 name: "XORLloadidx4",
10339 auxType: auxSymOff,
10340 argLen: 4,
10341 resultInArg0: true,
10342 clobberFlags: true,
10343 symEffect: SymRead,
10344 asm: x86.AXORL,
10345 scale: 4,
10346 reg: regInfo{
10347 inputs: []inputInfo{
10348 {0, 49135},
10349 {2, 49151},
10350 {1, 4295032831},
10351 },
10352 outputs: []outputInfo{
10353 {0, 49135},
10354 },
10355 },
10356 },
10357 {
10358 name: "XORLloadidx8",
10359 auxType: auxSymOff,
10360 argLen: 4,
10361 resultInArg0: true,
10362 clobberFlags: true,
10363 symEffect: SymRead,
10364 asm: x86.AXORL,
10365 scale: 8,
10366 reg: regInfo{
10367 inputs: []inputInfo{
10368 {0, 49135},
10369 {2, 49151},
10370 {1, 4295032831},
10371 },
10372 outputs: []outputInfo{
10373 {0, 49135},
10374 },
10375 },
10376 },
10377 {
10378 name: "XORQloadidx1",
10379 auxType: auxSymOff,
10380 argLen: 4,
10381 resultInArg0: true,
10382 clobberFlags: true,
10383 symEffect: SymRead,
10384 asm: x86.AXORQ,
10385 scale: 1,
10386 reg: regInfo{
10387 inputs: []inputInfo{
10388 {0, 49135},
10389 {2, 49151},
10390 {1, 4295032831},
10391 },
10392 outputs: []outputInfo{
10393 {0, 49135},
10394 },
10395 },
10396 },
10397 {
10398 name: "XORQloadidx8",
10399 auxType: auxSymOff,
10400 argLen: 4,
10401 resultInArg0: true,
10402 clobberFlags: true,
10403 symEffect: SymRead,
10404 asm: x86.AXORQ,
10405 scale: 8,
10406 reg: regInfo{
10407 inputs: []inputInfo{
10408 {0, 49135},
10409 {2, 49151},
10410 {1, 4295032831},
10411 },
10412 outputs: []outputInfo{
10413 {0, 49135},
10414 },
10415 },
10416 },
10417 {
10418 name: "ADDQmodify",
10419 auxType: auxSymOff,
10420 argLen: 3,
10421 clobberFlags: true,
10422 faultOnNilArg0: true,
10423 symEffect: SymRead | SymWrite,
10424 asm: x86.AADDQ,
10425 reg: regInfo{
10426 inputs: []inputInfo{
10427 {1, 49151},
10428 {0, 4295032831},
10429 },
10430 },
10431 },
10432 {
10433 name: "SUBQmodify",
10434 auxType: auxSymOff,
10435 argLen: 3,
10436 clobberFlags: true,
10437 faultOnNilArg0: true,
10438 symEffect: SymRead | SymWrite,
10439 asm: x86.ASUBQ,
10440 reg: regInfo{
10441 inputs: []inputInfo{
10442 {1, 49151},
10443 {0, 4295032831},
10444 },
10445 },
10446 },
10447 {
10448 name: "ANDQmodify",
10449 auxType: auxSymOff,
10450 argLen: 3,
10451 clobberFlags: true,
10452 faultOnNilArg0: true,
10453 symEffect: SymRead | SymWrite,
10454 asm: x86.AANDQ,
10455 reg: regInfo{
10456 inputs: []inputInfo{
10457 {1, 49151},
10458 {0, 4295032831},
10459 },
10460 },
10461 },
10462 {
10463 name: "ORQmodify",
10464 auxType: auxSymOff,
10465 argLen: 3,
10466 clobberFlags: true,
10467 faultOnNilArg0: true,
10468 symEffect: SymRead | SymWrite,
10469 asm: x86.AORQ,
10470 reg: regInfo{
10471 inputs: []inputInfo{
10472 {1, 49151},
10473 {0, 4295032831},
10474 },
10475 },
10476 },
10477 {
10478 name: "XORQmodify",
10479 auxType: auxSymOff,
10480 argLen: 3,
10481 clobberFlags: true,
10482 faultOnNilArg0: true,
10483 symEffect: SymRead | SymWrite,
10484 asm: x86.AXORQ,
10485 reg: regInfo{
10486 inputs: []inputInfo{
10487 {1, 49151},
10488 {0, 4295032831},
10489 },
10490 },
10491 },
10492 {
10493 name: "ADDLmodify",
10494 auxType: auxSymOff,
10495 argLen: 3,
10496 clobberFlags: true,
10497 faultOnNilArg0: true,
10498 symEffect: SymRead | SymWrite,
10499 asm: x86.AADDL,
10500 reg: regInfo{
10501 inputs: []inputInfo{
10502 {1, 49151},
10503 {0, 4295032831},
10504 },
10505 },
10506 },
10507 {
10508 name: "SUBLmodify",
10509 auxType: auxSymOff,
10510 argLen: 3,
10511 clobberFlags: true,
10512 faultOnNilArg0: true,
10513 symEffect: SymRead | SymWrite,
10514 asm: x86.ASUBL,
10515 reg: regInfo{
10516 inputs: []inputInfo{
10517 {1, 49151},
10518 {0, 4295032831},
10519 },
10520 },
10521 },
10522 {
10523 name: "ANDLmodify",
10524 auxType: auxSymOff,
10525 argLen: 3,
10526 clobberFlags: true,
10527 faultOnNilArg0: true,
10528 symEffect: SymRead | SymWrite,
10529 asm: x86.AANDL,
10530 reg: regInfo{
10531 inputs: []inputInfo{
10532 {1, 49151},
10533 {0, 4295032831},
10534 },
10535 },
10536 },
10537 {
10538 name: "ORLmodify",
10539 auxType: auxSymOff,
10540 argLen: 3,
10541 clobberFlags: true,
10542 faultOnNilArg0: true,
10543 symEffect: SymRead | SymWrite,
10544 asm: x86.AORL,
10545 reg: regInfo{
10546 inputs: []inputInfo{
10547 {1, 49151},
10548 {0, 4295032831},
10549 },
10550 },
10551 },
10552 {
10553 name: "XORLmodify",
10554 auxType: auxSymOff,
10555 argLen: 3,
10556 clobberFlags: true,
10557 faultOnNilArg0: true,
10558 symEffect: SymRead | SymWrite,
10559 asm: x86.AXORL,
10560 reg: regInfo{
10561 inputs: []inputInfo{
10562 {1, 49151},
10563 {0, 4295032831},
10564 },
10565 },
10566 },
10567 {
10568 name: "ADDQmodifyidx1",
10569 auxType: auxSymOff,
10570 argLen: 4,
10571 clobberFlags: true,
10572 symEffect: SymRead | SymWrite,
10573 asm: x86.AADDQ,
10574 scale: 1,
10575 reg: regInfo{
10576 inputs: []inputInfo{
10577 {1, 49151},
10578 {2, 49151},
10579 {0, 4295032831},
10580 },
10581 },
10582 },
10583 {
10584 name: "ADDQmodifyidx8",
10585 auxType: auxSymOff,
10586 argLen: 4,
10587 clobberFlags: true,
10588 symEffect: SymRead | SymWrite,
10589 asm: x86.AADDQ,
10590 scale: 8,
10591 reg: regInfo{
10592 inputs: []inputInfo{
10593 {1, 49151},
10594 {2, 49151},
10595 {0, 4295032831},
10596 },
10597 },
10598 },
10599 {
10600 name: "SUBQmodifyidx1",
10601 auxType: auxSymOff,
10602 argLen: 4,
10603 clobberFlags: true,
10604 symEffect: SymRead | SymWrite,
10605 asm: x86.ASUBQ,
10606 scale: 1,
10607 reg: regInfo{
10608 inputs: []inputInfo{
10609 {1, 49151},
10610 {2, 49151},
10611 {0, 4295032831},
10612 },
10613 },
10614 },
10615 {
10616 name: "SUBQmodifyidx8",
10617 auxType: auxSymOff,
10618 argLen: 4,
10619 clobberFlags: true,
10620 symEffect: SymRead | SymWrite,
10621 asm: x86.ASUBQ,
10622 scale: 8,
10623 reg: regInfo{
10624 inputs: []inputInfo{
10625 {1, 49151},
10626 {2, 49151},
10627 {0, 4295032831},
10628 },
10629 },
10630 },
10631 {
10632 name: "ANDQmodifyidx1",
10633 auxType: auxSymOff,
10634 argLen: 4,
10635 clobberFlags: true,
10636 symEffect: SymRead | SymWrite,
10637 asm: x86.AANDQ,
10638 scale: 1,
10639 reg: regInfo{
10640 inputs: []inputInfo{
10641 {1, 49151},
10642 {2, 49151},
10643 {0, 4295032831},
10644 },
10645 },
10646 },
10647 {
10648 name: "ANDQmodifyidx8",
10649 auxType: auxSymOff,
10650 argLen: 4,
10651 clobberFlags: true,
10652 symEffect: SymRead | SymWrite,
10653 asm: x86.AANDQ,
10654 scale: 8,
10655 reg: regInfo{
10656 inputs: []inputInfo{
10657 {1, 49151},
10658 {2, 49151},
10659 {0, 4295032831},
10660 },
10661 },
10662 },
10663 {
10664 name: "ORQmodifyidx1",
10665 auxType: auxSymOff,
10666 argLen: 4,
10667 clobberFlags: true,
10668 symEffect: SymRead | SymWrite,
10669 asm: x86.AORQ,
10670 scale: 1,
10671 reg: regInfo{
10672 inputs: []inputInfo{
10673 {1, 49151},
10674 {2, 49151},
10675 {0, 4295032831},
10676 },
10677 },
10678 },
10679 {
10680 name: "ORQmodifyidx8",
10681 auxType: auxSymOff,
10682 argLen: 4,
10683 clobberFlags: true,
10684 symEffect: SymRead | SymWrite,
10685 asm: x86.AORQ,
10686 scale: 8,
10687 reg: regInfo{
10688 inputs: []inputInfo{
10689 {1, 49151},
10690 {2, 49151},
10691 {0, 4295032831},
10692 },
10693 },
10694 },
10695 {
10696 name: "XORQmodifyidx1",
10697 auxType: auxSymOff,
10698 argLen: 4,
10699 clobberFlags: true,
10700 symEffect: SymRead | SymWrite,
10701 asm: x86.AXORQ,
10702 scale: 1,
10703 reg: regInfo{
10704 inputs: []inputInfo{
10705 {1, 49151},
10706 {2, 49151},
10707 {0, 4295032831},
10708 },
10709 },
10710 },
10711 {
10712 name: "XORQmodifyidx8",
10713 auxType: auxSymOff,
10714 argLen: 4,
10715 clobberFlags: true,
10716 symEffect: SymRead | SymWrite,
10717 asm: x86.AXORQ,
10718 scale: 8,
10719 reg: regInfo{
10720 inputs: []inputInfo{
10721 {1, 49151},
10722 {2, 49151},
10723 {0, 4295032831},
10724 },
10725 },
10726 },
10727 {
10728 name: "ADDLmodifyidx1",
10729 auxType: auxSymOff,
10730 argLen: 4,
10731 clobberFlags: true,
10732 symEffect: SymRead | SymWrite,
10733 asm: x86.AADDL,
10734 scale: 1,
10735 reg: regInfo{
10736 inputs: []inputInfo{
10737 {1, 49151},
10738 {2, 49151},
10739 {0, 4295032831},
10740 },
10741 },
10742 },
10743 {
10744 name: "ADDLmodifyidx4",
10745 auxType: auxSymOff,
10746 argLen: 4,
10747 clobberFlags: true,
10748 symEffect: SymRead | SymWrite,
10749 asm: x86.AADDL,
10750 scale: 4,
10751 reg: regInfo{
10752 inputs: []inputInfo{
10753 {1, 49151},
10754 {2, 49151},
10755 {0, 4295032831},
10756 },
10757 },
10758 },
10759 {
10760 name: "ADDLmodifyidx8",
10761 auxType: auxSymOff,
10762 argLen: 4,
10763 clobberFlags: true,
10764 symEffect: SymRead | SymWrite,
10765 asm: x86.AADDL,
10766 scale: 8,
10767 reg: regInfo{
10768 inputs: []inputInfo{
10769 {1, 49151},
10770 {2, 49151},
10771 {0, 4295032831},
10772 },
10773 },
10774 },
10775 {
10776 name: "SUBLmodifyidx1",
10777 auxType: auxSymOff,
10778 argLen: 4,
10779 clobberFlags: true,
10780 symEffect: SymRead | SymWrite,
10781 asm: x86.ASUBL,
10782 scale: 1,
10783 reg: regInfo{
10784 inputs: []inputInfo{
10785 {1, 49151},
10786 {2, 49151},
10787 {0, 4295032831},
10788 },
10789 },
10790 },
10791 {
10792 name: "SUBLmodifyidx4",
10793 auxType: auxSymOff,
10794 argLen: 4,
10795 clobberFlags: true,
10796 symEffect: SymRead | SymWrite,
10797 asm: x86.ASUBL,
10798 scale: 4,
10799 reg: regInfo{
10800 inputs: []inputInfo{
10801 {1, 49151},
10802 {2, 49151},
10803 {0, 4295032831},
10804 },
10805 },
10806 },
10807 {
10808 name: "SUBLmodifyidx8",
10809 auxType: auxSymOff,
10810 argLen: 4,
10811 clobberFlags: true,
10812 symEffect: SymRead | SymWrite,
10813 asm: x86.ASUBL,
10814 scale: 8,
10815 reg: regInfo{
10816 inputs: []inputInfo{
10817 {1, 49151},
10818 {2, 49151},
10819 {0, 4295032831},
10820 },
10821 },
10822 },
10823 {
10824 name: "ANDLmodifyidx1",
10825 auxType: auxSymOff,
10826 argLen: 4,
10827 clobberFlags: true,
10828 symEffect: SymRead | SymWrite,
10829 asm: x86.AANDL,
10830 scale: 1,
10831 reg: regInfo{
10832 inputs: []inputInfo{
10833 {1, 49151},
10834 {2, 49151},
10835 {0, 4295032831},
10836 },
10837 },
10838 },
10839 {
10840 name: "ANDLmodifyidx4",
10841 auxType: auxSymOff,
10842 argLen: 4,
10843 clobberFlags: true,
10844 symEffect: SymRead | SymWrite,
10845 asm: x86.AANDL,
10846 scale: 4,
10847 reg: regInfo{
10848 inputs: []inputInfo{
10849 {1, 49151},
10850 {2, 49151},
10851 {0, 4295032831},
10852 },
10853 },
10854 },
10855 {
10856 name: "ANDLmodifyidx8",
10857 auxType: auxSymOff,
10858 argLen: 4,
10859 clobberFlags: true,
10860 symEffect: SymRead | SymWrite,
10861 asm: x86.AANDL,
10862 scale: 8,
10863 reg: regInfo{
10864 inputs: []inputInfo{
10865 {1, 49151},
10866 {2, 49151},
10867 {0, 4295032831},
10868 },
10869 },
10870 },
10871 {
10872 name: "ORLmodifyidx1",
10873 auxType: auxSymOff,
10874 argLen: 4,
10875 clobberFlags: true,
10876 symEffect: SymRead | SymWrite,
10877 asm: x86.AORL,
10878 scale: 1,
10879 reg: regInfo{
10880 inputs: []inputInfo{
10881 {1, 49151},
10882 {2, 49151},
10883 {0, 4295032831},
10884 },
10885 },
10886 },
10887 {
10888 name: "ORLmodifyidx4",
10889 auxType: auxSymOff,
10890 argLen: 4,
10891 clobberFlags: true,
10892 symEffect: SymRead | SymWrite,
10893 asm: x86.AORL,
10894 scale: 4,
10895 reg: regInfo{
10896 inputs: []inputInfo{
10897 {1, 49151},
10898 {2, 49151},
10899 {0, 4295032831},
10900 },
10901 },
10902 },
10903 {
10904 name: "ORLmodifyidx8",
10905 auxType: auxSymOff,
10906 argLen: 4,
10907 clobberFlags: true,
10908 symEffect: SymRead | SymWrite,
10909 asm: x86.AORL,
10910 scale: 8,
10911 reg: regInfo{
10912 inputs: []inputInfo{
10913 {1, 49151},
10914 {2, 49151},
10915 {0, 4295032831},
10916 },
10917 },
10918 },
10919 {
10920 name: "XORLmodifyidx1",
10921 auxType: auxSymOff,
10922 argLen: 4,
10923 clobberFlags: true,
10924 symEffect: SymRead | SymWrite,
10925 asm: x86.AXORL,
10926 scale: 1,
10927 reg: regInfo{
10928 inputs: []inputInfo{
10929 {1, 49151},
10930 {2, 49151},
10931 {0, 4295032831},
10932 },
10933 },
10934 },
10935 {
10936 name: "XORLmodifyidx4",
10937 auxType: auxSymOff,
10938 argLen: 4,
10939 clobberFlags: true,
10940 symEffect: SymRead | SymWrite,
10941 asm: x86.AXORL,
10942 scale: 4,
10943 reg: regInfo{
10944 inputs: []inputInfo{
10945 {1, 49151},
10946 {2, 49151},
10947 {0, 4295032831},
10948 },
10949 },
10950 },
10951 {
10952 name: "XORLmodifyidx8",
10953 auxType: auxSymOff,
10954 argLen: 4,
10955 clobberFlags: true,
10956 symEffect: SymRead | SymWrite,
10957 asm: x86.AXORL,
10958 scale: 8,
10959 reg: regInfo{
10960 inputs: []inputInfo{
10961 {1, 49151},
10962 {2, 49151},
10963 {0, 4295032831},
10964 },
10965 },
10966 },
10967 {
10968 name: "ADDQconstmodifyidx1",
10969 auxType: auxSymValAndOff,
10970 argLen: 3,
10971 clobberFlags: true,
10972 symEffect: SymRead | SymWrite,
10973 asm: x86.AADDQ,
10974 scale: 1,
10975 reg: regInfo{
10976 inputs: []inputInfo{
10977 {1, 49151},
10978 {0, 4295032831},
10979 },
10980 },
10981 },
10982 {
10983 name: "ADDQconstmodifyidx8",
10984 auxType: auxSymValAndOff,
10985 argLen: 3,
10986 clobberFlags: true,
10987 symEffect: SymRead | SymWrite,
10988 asm: x86.AADDQ,
10989 scale: 8,
10990 reg: regInfo{
10991 inputs: []inputInfo{
10992 {1, 49151},
10993 {0, 4295032831},
10994 },
10995 },
10996 },
10997 {
10998 name: "ANDQconstmodifyidx1",
10999 auxType: auxSymValAndOff,
11000 argLen: 3,
11001 clobberFlags: true,
11002 symEffect: SymRead | SymWrite,
11003 asm: x86.AANDQ,
11004 scale: 1,
11005 reg: regInfo{
11006 inputs: []inputInfo{
11007 {1, 49151},
11008 {0, 4295032831},
11009 },
11010 },
11011 },
11012 {
11013 name: "ANDQconstmodifyidx8",
11014 auxType: auxSymValAndOff,
11015 argLen: 3,
11016 clobberFlags: true,
11017 symEffect: SymRead | SymWrite,
11018 asm: x86.AANDQ,
11019 scale: 8,
11020 reg: regInfo{
11021 inputs: []inputInfo{
11022 {1, 49151},
11023 {0, 4295032831},
11024 },
11025 },
11026 },
11027 {
11028 name: "ORQconstmodifyidx1",
11029 auxType: auxSymValAndOff,
11030 argLen: 3,
11031 clobberFlags: true,
11032 symEffect: SymRead | SymWrite,
11033 asm: x86.AORQ,
11034 scale: 1,
11035 reg: regInfo{
11036 inputs: []inputInfo{
11037 {1, 49151},
11038 {0, 4295032831},
11039 },
11040 },
11041 },
11042 {
11043 name: "ORQconstmodifyidx8",
11044 auxType: auxSymValAndOff,
11045 argLen: 3,
11046 clobberFlags: true,
11047 symEffect: SymRead | SymWrite,
11048 asm: x86.AORQ,
11049 scale: 8,
11050 reg: regInfo{
11051 inputs: []inputInfo{
11052 {1, 49151},
11053 {0, 4295032831},
11054 },
11055 },
11056 },
11057 {
11058 name: "XORQconstmodifyidx1",
11059 auxType: auxSymValAndOff,
11060 argLen: 3,
11061 clobberFlags: true,
11062 symEffect: SymRead | SymWrite,
11063 asm: x86.AXORQ,
11064 scale: 1,
11065 reg: regInfo{
11066 inputs: []inputInfo{
11067 {1, 49151},
11068 {0, 4295032831},
11069 },
11070 },
11071 },
11072 {
11073 name: "XORQconstmodifyidx8",
11074 auxType: auxSymValAndOff,
11075 argLen: 3,
11076 clobberFlags: true,
11077 symEffect: SymRead | SymWrite,
11078 asm: x86.AXORQ,
11079 scale: 8,
11080 reg: regInfo{
11081 inputs: []inputInfo{
11082 {1, 49151},
11083 {0, 4295032831},
11084 },
11085 },
11086 },
11087 {
11088 name: "ADDLconstmodifyidx1",
11089 auxType: auxSymValAndOff,
11090 argLen: 3,
11091 clobberFlags: true,
11092 symEffect: SymRead | SymWrite,
11093 asm: x86.AADDL,
11094 scale: 1,
11095 reg: regInfo{
11096 inputs: []inputInfo{
11097 {1, 49151},
11098 {0, 4295032831},
11099 },
11100 },
11101 },
11102 {
11103 name: "ADDLconstmodifyidx4",
11104 auxType: auxSymValAndOff,
11105 argLen: 3,
11106 clobberFlags: true,
11107 symEffect: SymRead | SymWrite,
11108 asm: x86.AADDL,
11109 scale: 4,
11110 reg: regInfo{
11111 inputs: []inputInfo{
11112 {1, 49151},
11113 {0, 4295032831},
11114 },
11115 },
11116 },
11117 {
11118 name: "ADDLconstmodifyidx8",
11119 auxType: auxSymValAndOff,
11120 argLen: 3,
11121 clobberFlags: true,
11122 symEffect: SymRead | SymWrite,
11123 asm: x86.AADDL,
11124 scale: 8,
11125 reg: regInfo{
11126 inputs: []inputInfo{
11127 {1, 49151},
11128 {0, 4295032831},
11129 },
11130 },
11131 },
11132 {
11133 name: "ANDLconstmodifyidx1",
11134 auxType: auxSymValAndOff,
11135 argLen: 3,
11136 clobberFlags: true,
11137 symEffect: SymRead | SymWrite,
11138 asm: x86.AANDL,
11139 scale: 1,
11140 reg: regInfo{
11141 inputs: []inputInfo{
11142 {1, 49151},
11143 {0, 4295032831},
11144 },
11145 },
11146 },
11147 {
11148 name: "ANDLconstmodifyidx4",
11149 auxType: auxSymValAndOff,
11150 argLen: 3,
11151 clobberFlags: true,
11152 symEffect: SymRead | SymWrite,
11153 asm: x86.AANDL,
11154 scale: 4,
11155 reg: regInfo{
11156 inputs: []inputInfo{
11157 {1, 49151},
11158 {0, 4295032831},
11159 },
11160 },
11161 },
11162 {
11163 name: "ANDLconstmodifyidx8",
11164 auxType: auxSymValAndOff,
11165 argLen: 3,
11166 clobberFlags: true,
11167 symEffect: SymRead | SymWrite,
11168 asm: x86.AANDL,
11169 scale: 8,
11170 reg: regInfo{
11171 inputs: []inputInfo{
11172 {1, 49151},
11173 {0, 4295032831},
11174 },
11175 },
11176 },
11177 {
11178 name: "ORLconstmodifyidx1",
11179 auxType: auxSymValAndOff,
11180 argLen: 3,
11181 clobberFlags: true,
11182 symEffect: SymRead | SymWrite,
11183 asm: x86.AORL,
11184 scale: 1,
11185 reg: regInfo{
11186 inputs: []inputInfo{
11187 {1, 49151},
11188 {0, 4295032831},
11189 },
11190 },
11191 },
11192 {
11193 name: "ORLconstmodifyidx4",
11194 auxType: auxSymValAndOff,
11195 argLen: 3,
11196 clobberFlags: true,
11197 symEffect: SymRead | SymWrite,
11198 asm: x86.AORL,
11199 scale: 4,
11200 reg: regInfo{
11201 inputs: []inputInfo{
11202 {1, 49151},
11203 {0, 4295032831},
11204 },
11205 },
11206 },
11207 {
11208 name: "ORLconstmodifyidx8",
11209 auxType: auxSymValAndOff,
11210 argLen: 3,
11211 clobberFlags: true,
11212 symEffect: SymRead | SymWrite,
11213 asm: x86.AORL,
11214 scale: 8,
11215 reg: regInfo{
11216 inputs: []inputInfo{
11217 {1, 49151},
11218 {0, 4295032831},
11219 },
11220 },
11221 },
11222 {
11223 name: "XORLconstmodifyidx1",
11224 auxType: auxSymValAndOff,
11225 argLen: 3,
11226 clobberFlags: true,
11227 symEffect: SymRead | SymWrite,
11228 asm: x86.AXORL,
11229 scale: 1,
11230 reg: regInfo{
11231 inputs: []inputInfo{
11232 {1, 49151},
11233 {0, 4295032831},
11234 },
11235 },
11236 },
11237 {
11238 name: "XORLconstmodifyidx4",
11239 auxType: auxSymValAndOff,
11240 argLen: 3,
11241 clobberFlags: true,
11242 symEffect: SymRead | SymWrite,
11243 asm: x86.AXORL,
11244 scale: 4,
11245 reg: regInfo{
11246 inputs: []inputInfo{
11247 {1, 49151},
11248 {0, 4295032831},
11249 },
11250 },
11251 },
11252 {
11253 name: "XORLconstmodifyidx8",
11254 auxType: auxSymValAndOff,
11255 argLen: 3,
11256 clobberFlags: true,
11257 symEffect: SymRead | SymWrite,
11258 asm: x86.AXORL,
11259 scale: 8,
11260 reg: regInfo{
11261 inputs: []inputInfo{
11262 {1, 49151},
11263 {0, 4295032831},
11264 },
11265 },
11266 },
11267 {
11268 name: "NEGQ",
11269 argLen: 1,
11270 resultInArg0: true,
11271 clobberFlags: true,
11272 asm: x86.ANEGQ,
11273 reg: regInfo{
11274 inputs: []inputInfo{
11275 {0, 49135},
11276 },
11277 outputs: []outputInfo{
11278 {0, 49135},
11279 },
11280 },
11281 },
11282 {
11283 name: "NEGL",
11284 argLen: 1,
11285 resultInArg0: true,
11286 clobberFlags: true,
11287 asm: x86.ANEGL,
11288 reg: regInfo{
11289 inputs: []inputInfo{
11290 {0, 49135},
11291 },
11292 outputs: []outputInfo{
11293 {0, 49135},
11294 },
11295 },
11296 },
11297 {
11298 name: "NOTQ",
11299 argLen: 1,
11300 resultInArg0: true,
11301 asm: x86.ANOTQ,
11302 reg: regInfo{
11303 inputs: []inputInfo{
11304 {0, 49135},
11305 },
11306 outputs: []outputInfo{
11307 {0, 49135},
11308 },
11309 },
11310 },
11311 {
11312 name: "NOTL",
11313 argLen: 1,
11314 resultInArg0: true,
11315 asm: x86.ANOTL,
11316 reg: regInfo{
11317 inputs: []inputInfo{
11318 {0, 49135},
11319 },
11320 outputs: []outputInfo{
11321 {0, 49135},
11322 },
11323 },
11324 },
11325 {
11326 name: "BSFQ",
11327 argLen: 1,
11328 asm: x86.ABSFQ,
11329 reg: regInfo{
11330 inputs: []inputInfo{
11331 {0, 49135},
11332 },
11333 outputs: []outputInfo{
11334 {1, 0},
11335 {0, 49135},
11336 },
11337 },
11338 },
11339 {
11340 name: "BSFL",
11341 argLen: 1,
11342 clobberFlags: true,
11343 asm: x86.ABSFL,
11344 reg: regInfo{
11345 inputs: []inputInfo{
11346 {0, 49135},
11347 },
11348 outputs: []outputInfo{
11349 {0, 49135},
11350 },
11351 },
11352 },
11353 {
11354 name: "BSRQ",
11355 argLen: 1,
11356 asm: x86.ABSRQ,
11357 reg: regInfo{
11358 inputs: []inputInfo{
11359 {0, 49135},
11360 },
11361 outputs: []outputInfo{
11362 {1, 0},
11363 {0, 49135},
11364 },
11365 },
11366 },
11367 {
11368 name: "BSRL",
11369 argLen: 1,
11370 clobberFlags: true,
11371 asm: x86.ABSRL,
11372 reg: regInfo{
11373 inputs: []inputInfo{
11374 {0, 49135},
11375 },
11376 outputs: []outputInfo{
11377 {0, 49135},
11378 },
11379 },
11380 },
11381 {
11382 name: "CMOVQEQ",
11383 argLen: 3,
11384 resultInArg0: true,
11385 asm: x86.ACMOVQEQ,
11386 reg: regInfo{
11387 inputs: []inputInfo{
11388 {0, 49135},
11389 {1, 49135},
11390 },
11391 outputs: []outputInfo{
11392 {0, 49135},
11393 },
11394 },
11395 },
11396 {
11397 name: "CMOVQNE",
11398 argLen: 3,
11399 resultInArg0: true,
11400 asm: x86.ACMOVQNE,
11401 reg: regInfo{
11402 inputs: []inputInfo{
11403 {0, 49135},
11404 {1, 49135},
11405 },
11406 outputs: []outputInfo{
11407 {0, 49135},
11408 },
11409 },
11410 },
11411 {
11412 name: "CMOVQLT",
11413 argLen: 3,
11414 resultInArg0: true,
11415 asm: x86.ACMOVQLT,
11416 reg: regInfo{
11417 inputs: []inputInfo{
11418 {0, 49135},
11419 {1, 49135},
11420 },
11421 outputs: []outputInfo{
11422 {0, 49135},
11423 },
11424 },
11425 },
11426 {
11427 name: "CMOVQGT",
11428 argLen: 3,
11429 resultInArg0: true,
11430 asm: x86.ACMOVQGT,
11431 reg: regInfo{
11432 inputs: []inputInfo{
11433 {0, 49135},
11434 {1, 49135},
11435 },
11436 outputs: []outputInfo{
11437 {0, 49135},
11438 },
11439 },
11440 },
11441 {
11442 name: "CMOVQLE",
11443 argLen: 3,
11444 resultInArg0: true,
11445 asm: x86.ACMOVQLE,
11446 reg: regInfo{
11447 inputs: []inputInfo{
11448 {0, 49135},
11449 {1, 49135},
11450 },
11451 outputs: []outputInfo{
11452 {0, 49135},
11453 },
11454 },
11455 },
11456 {
11457 name: "CMOVQGE",
11458 argLen: 3,
11459 resultInArg0: true,
11460 asm: x86.ACMOVQGE,
11461 reg: regInfo{
11462 inputs: []inputInfo{
11463 {0, 49135},
11464 {1, 49135},
11465 },
11466 outputs: []outputInfo{
11467 {0, 49135},
11468 },
11469 },
11470 },
11471 {
11472 name: "CMOVQLS",
11473 argLen: 3,
11474 resultInArg0: true,
11475 asm: x86.ACMOVQLS,
11476 reg: regInfo{
11477 inputs: []inputInfo{
11478 {0, 49135},
11479 {1, 49135},
11480 },
11481 outputs: []outputInfo{
11482 {0, 49135},
11483 },
11484 },
11485 },
11486 {
11487 name: "CMOVQHI",
11488 argLen: 3,
11489 resultInArg0: true,
11490 asm: x86.ACMOVQHI,
11491 reg: regInfo{
11492 inputs: []inputInfo{
11493 {0, 49135},
11494 {1, 49135},
11495 },
11496 outputs: []outputInfo{
11497 {0, 49135},
11498 },
11499 },
11500 },
11501 {
11502 name: "CMOVQCC",
11503 argLen: 3,
11504 resultInArg0: true,
11505 asm: x86.ACMOVQCC,
11506 reg: regInfo{
11507 inputs: []inputInfo{
11508 {0, 49135},
11509 {1, 49135},
11510 },
11511 outputs: []outputInfo{
11512 {0, 49135},
11513 },
11514 },
11515 },
11516 {
11517 name: "CMOVQCS",
11518 argLen: 3,
11519 resultInArg0: true,
11520 asm: x86.ACMOVQCS,
11521 reg: regInfo{
11522 inputs: []inputInfo{
11523 {0, 49135},
11524 {1, 49135},
11525 },
11526 outputs: []outputInfo{
11527 {0, 49135},
11528 },
11529 },
11530 },
11531 {
11532 name: "CMOVLEQ",
11533 argLen: 3,
11534 resultInArg0: true,
11535 asm: x86.ACMOVLEQ,
11536 reg: regInfo{
11537 inputs: []inputInfo{
11538 {0, 49135},
11539 {1, 49135},
11540 },
11541 outputs: []outputInfo{
11542 {0, 49135},
11543 },
11544 },
11545 },
11546 {
11547 name: "CMOVLNE",
11548 argLen: 3,
11549 resultInArg0: true,
11550 asm: x86.ACMOVLNE,
11551 reg: regInfo{
11552 inputs: []inputInfo{
11553 {0, 49135},
11554 {1, 49135},
11555 },
11556 outputs: []outputInfo{
11557 {0, 49135},
11558 },
11559 },
11560 },
11561 {
11562 name: "CMOVLLT",
11563 argLen: 3,
11564 resultInArg0: true,
11565 asm: x86.ACMOVLLT,
11566 reg: regInfo{
11567 inputs: []inputInfo{
11568 {0, 49135},
11569 {1, 49135},
11570 },
11571 outputs: []outputInfo{
11572 {0, 49135},
11573 },
11574 },
11575 },
11576 {
11577 name: "CMOVLGT",
11578 argLen: 3,
11579 resultInArg0: true,
11580 asm: x86.ACMOVLGT,
11581 reg: regInfo{
11582 inputs: []inputInfo{
11583 {0, 49135},
11584 {1, 49135},
11585 },
11586 outputs: []outputInfo{
11587 {0, 49135},
11588 },
11589 },
11590 },
11591 {
11592 name: "CMOVLLE",
11593 argLen: 3,
11594 resultInArg0: true,
11595 asm: x86.ACMOVLLE,
11596 reg: regInfo{
11597 inputs: []inputInfo{
11598 {0, 49135},
11599 {1, 49135},
11600 },
11601 outputs: []outputInfo{
11602 {0, 49135},
11603 },
11604 },
11605 },
11606 {
11607 name: "CMOVLGE",
11608 argLen: 3,
11609 resultInArg0: true,
11610 asm: x86.ACMOVLGE,
11611 reg: regInfo{
11612 inputs: []inputInfo{
11613 {0, 49135},
11614 {1, 49135},
11615 },
11616 outputs: []outputInfo{
11617 {0, 49135},
11618 },
11619 },
11620 },
11621 {
11622 name: "CMOVLLS",
11623 argLen: 3,
11624 resultInArg0: true,
11625 asm: x86.ACMOVLLS,
11626 reg: regInfo{
11627 inputs: []inputInfo{
11628 {0, 49135},
11629 {1, 49135},
11630 },
11631 outputs: []outputInfo{
11632 {0, 49135},
11633 },
11634 },
11635 },
11636 {
11637 name: "CMOVLHI",
11638 argLen: 3,
11639 resultInArg0: true,
11640 asm: x86.ACMOVLHI,
11641 reg: regInfo{
11642 inputs: []inputInfo{
11643 {0, 49135},
11644 {1, 49135},
11645 },
11646 outputs: []outputInfo{
11647 {0, 49135},
11648 },
11649 },
11650 },
11651 {
11652 name: "CMOVLCC",
11653 argLen: 3,
11654 resultInArg0: true,
11655 asm: x86.ACMOVLCC,
11656 reg: regInfo{
11657 inputs: []inputInfo{
11658 {0, 49135},
11659 {1, 49135},
11660 },
11661 outputs: []outputInfo{
11662 {0, 49135},
11663 },
11664 },
11665 },
11666 {
11667 name: "CMOVLCS",
11668 argLen: 3,
11669 resultInArg0: true,
11670 asm: x86.ACMOVLCS,
11671 reg: regInfo{
11672 inputs: []inputInfo{
11673 {0, 49135},
11674 {1, 49135},
11675 },
11676 outputs: []outputInfo{
11677 {0, 49135},
11678 },
11679 },
11680 },
11681 {
11682 name: "CMOVWEQ",
11683 argLen: 3,
11684 resultInArg0: true,
11685 asm: x86.ACMOVWEQ,
11686 reg: regInfo{
11687 inputs: []inputInfo{
11688 {0, 49135},
11689 {1, 49135},
11690 },
11691 outputs: []outputInfo{
11692 {0, 49135},
11693 },
11694 },
11695 },
11696 {
11697 name: "CMOVWNE",
11698 argLen: 3,
11699 resultInArg0: true,
11700 asm: x86.ACMOVWNE,
11701 reg: regInfo{
11702 inputs: []inputInfo{
11703 {0, 49135},
11704 {1, 49135},
11705 },
11706 outputs: []outputInfo{
11707 {0, 49135},
11708 },
11709 },
11710 },
11711 {
11712 name: "CMOVWLT",
11713 argLen: 3,
11714 resultInArg0: true,
11715 asm: x86.ACMOVWLT,
11716 reg: regInfo{
11717 inputs: []inputInfo{
11718 {0, 49135},
11719 {1, 49135},
11720 },
11721 outputs: []outputInfo{
11722 {0, 49135},
11723 },
11724 },
11725 },
11726 {
11727 name: "CMOVWGT",
11728 argLen: 3,
11729 resultInArg0: true,
11730 asm: x86.ACMOVWGT,
11731 reg: regInfo{
11732 inputs: []inputInfo{
11733 {0, 49135},
11734 {1, 49135},
11735 },
11736 outputs: []outputInfo{
11737 {0, 49135},
11738 },
11739 },
11740 },
11741 {
11742 name: "CMOVWLE",
11743 argLen: 3,
11744 resultInArg0: true,
11745 asm: x86.ACMOVWLE,
11746 reg: regInfo{
11747 inputs: []inputInfo{
11748 {0, 49135},
11749 {1, 49135},
11750 },
11751 outputs: []outputInfo{
11752 {0, 49135},
11753 },
11754 },
11755 },
11756 {
11757 name: "CMOVWGE",
11758 argLen: 3,
11759 resultInArg0: true,
11760 asm: x86.ACMOVWGE,
11761 reg: regInfo{
11762 inputs: []inputInfo{
11763 {0, 49135},
11764 {1, 49135},
11765 },
11766 outputs: []outputInfo{
11767 {0, 49135},
11768 },
11769 },
11770 },
11771 {
11772 name: "CMOVWLS",
11773 argLen: 3,
11774 resultInArg0: true,
11775 asm: x86.ACMOVWLS,
11776 reg: regInfo{
11777 inputs: []inputInfo{
11778 {0, 49135},
11779 {1, 49135},
11780 },
11781 outputs: []outputInfo{
11782 {0, 49135},
11783 },
11784 },
11785 },
11786 {
11787 name: "CMOVWHI",
11788 argLen: 3,
11789 resultInArg0: true,
11790 asm: x86.ACMOVWHI,
11791 reg: regInfo{
11792 inputs: []inputInfo{
11793 {0, 49135},
11794 {1, 49135},
11795 },
11796 outputs: []outputInfo{
11797 {0, 49135},
11798 },
11799 },
11800 },
11801 {
11802 name: "CMOVWCC",
11803 argLen: 3,
11804 resultInArg0: true,
11805 asm: x86.ACMOVWCC,
11806 reg: regInfo{
11807 inputs: []inputInfo{
11808 {0, 49135},
11809 {1, 49135},
11810 },
11811 outputs: []outputInfo{
11812 {0, 49135},
11813 },
11814 },
11815 },
11816 {
11817 name: "CMOVWCS",
11818 argLen: 3,
11819 resultInArg0: true,
11820 asm: x86.ACMOVWCS,
11821 reg: regInfo{
11822 inputs: []inputInfo{
11823 {0, 49135},
11824 {1, 49135},
11825 },
11826 outputs: []outputInfo{
11827 {0, 49135},
11828 },
11829 },
11830 },
11831 {
11832 name: "CMOVQEQF",
11833 argLen: 3,
11834 resultInArg0: true,
11835 needIntTemp: true,
11836 asm: x86.ACMOVQNE,
11837 reg: regInfo{
11838 inputs: []inputInfo{
11839 {0, 49135},
11840 {1, 49135},
11841 },
11842 outputs: []outputInfo{
11843 {0, 49135},
11844 },
11845 },
11846 },
11847 {
11848 name: "CMOVQNEF",
11849 argLen: 3,
11850 resultInArg0: true,
11851 asm: x86.ACMOVQNE,
11852 reg: regInfo{
11853 inputs: []inputInfo{
11854 {0, 49135},
11855 {1, 49135},
11856 },
11857 outputs: []outputInfo{
11858 {0, 49135},
11859 },
11860 },
11861 },
11862 {
11863 name: "CMOVQGTF",
11864 argLen: 3,
11865 resultInArg0: true,
11866 asm: x86.ACMOVQHI,
11867 reg: regInfo{
11868 inputs: []inputInfo{
11869 {0, 49135},
11870 {1, 49135},
11871 },
11872 outputs: []outputInfo{
11873 {0, 49135},
11874 },
11875 },
11876 },
11877 {
11878 name: "CMOVQGEF",
11879 argLen: 3,
11880 resultInArg0: true,
11881 asm: x86.ACMOVQCC,
11882 reg: regInfo{
11883 inputs: []inputInfo{
11884 {0, 49135},
11885 {1, 49135},
11886 },
11887 outputs: []outputInfo{
11888 {0, 49135},
11889 },
11890 },
11891 },
11892 {
11893 name: "CMOVLEQF",
11894 argLen: 3,
11895 resultInArg0: true,
11896 needIntTemp: true,
11897 asm: x86.ACMOVLNE,
11898 reg: regInfo{
11899 inputs: []inputInfo{
11900 {0, 49135},
11901 {1, 49135},
11902 },
11903 outputs: []outputInfo{
11904 {0, 49135},
11905 },
11906 },
11907 },
11908 {
11909 name: "CMOVLNEF",
11910 argLen: 3,
11911 resultInArg0: true,
11912 asm: x86.ACMOVLNE,
11913 reg: regInfo{
11914 inputs: []inputInfo{
11915 {0, 49135},
11916 {1, 49135},
11917 },
11918 outputs: []outputInfo{
11919 {0, 49135},
11920 },
11921 },
11922 },
11923 {
11924 name: "CMOVLGTF",
11925 argLen: 3,
11926 resultInArg0: true,
11927 asm: x86.ACMOVLHI,
11928 reg: regInfo{
11929 inputs: []inputInfo{
11930 {0, 49135},
11931 {1, 49135},
11932 },
11933 outputs: []outputInfo{
11934 {0, 49135},
11935 },
11936 },
11937 },
11938 {
11939 name: "CMOVLGEF",
11940 argLen: 3,
11941 resultInArg0: true,
11942 asm: x86.ACMOVLCC,
11943 reg: regInfo{
11944 inputs: []inputInfo{
11945 {0, 49135},
11946 {1, 49135},
11947 },
11948 outputs: []outputInfo{
11949 {0, 49135},
11950 },
11951 },
11952 },
11953 {
11954 name: "CMOVWEQF",
11955 argLen: 3,
11956 resultInArg0: true,
11957 needIntTemp: true,
11958 asm: x86.ACMOVWNE,
11959 reg: regInfo{
11960 inputs: []inputInfo{
11961 {0, 49135},
11962 {1, 49135},
11963 },
11964 outputs: []outputInfo{
11965 {0, 49135},
11966 },
11967 },
11968 },
11969 {
11970 name: "CMOVWNEF",
11971 argLen: 3,
11972 resultInArg0: true,
11973 asm: x86.ACMOVWNE,
11974 reg: regInfo{
11975 inputs: []inputInfo{
11976 {0, 49135},
11977 {1, 49135},
11978 },
11979 outputs: []outputInfo{
11980 {0, 49135},
11981 },
11982 },
11983 },
11984 {
11985 name: "CMOVWGTF",
11986 argLen: 3,
11987 resultInArg0: true,
11988 asm: x86.ACMOVWHI,
11989 reg: regInfo{
11990 inputs: []inputInfo{
11991 {0, 49135},
11992 {1, 49135},
11993 },
11994 outputs: []outputInfo{
11995 {0, 49135},
11996 },
11997 },
11998 },
11999 {
12000 name: "CMOVWGEF",
12001 argLen: 3,
12002 resultInArg0: true,
12003 asm: x86.ACMOVWCC,
12004 reg: regInfo{
12005 inputs: []inputInfo{
12006 {0, 49135},
12007 {1, 49135},
12008 },
12009 outputs: []outputInfo{
12010 {0, 49135},
12011 },
12012 },
12013 },
12014 {
12015 name: "BSWAPQ",
12016 argLen: 1,
12017 resultInArg0: true,
12018 asm: x86.ABSWAPQ,
12019 reg: regInfo{
12020 inputs: []inputInfo{
12021 {0, 49135},
12022 },
12023 outputs: []outputInfo{
12024 {0, 49135},
12025 },
12026 },
12027 },
12028 {
12029 name: "BSWAPL",
12030 argLen: 1,
12031 resultInArg0: true,
12032 asm: x86.ABSWAPL,
12033 reg: regInfo{
12034 inputs: []inputInfo{
12035 {0, 49135},
12036 },
12037 outputs: []outputInfo{
12038 {0, 49135},
12039 },
12040 },
12041 },
12042 {
12043 name: "POPCNTQ",
12044 argLen: 1,
12045 clobberFlags: true,
12046 asm: x86.APOPCNTQ,
12047 reg: regInfo{
12048 inputs: []inputInfo{
12049 {0, 49135},
12050 },
12051 outputs: []outputInfo{
12052 {0, 49135},
12053 },
12054 },
12055 },
12056 {
12057 name: "POPCNTL",
12058 argLen: 1,
12059 clobberFlags: true,
12060 asm: x86.APOPCNTL,
12061 reg: regInfo{
12062 inputs: []inputInfo{
12063 {0, 49135},
12064 },
12065 outputs: []outputInfo{
12066 {0, 49135},
12067 },
12068 },
12069 },
12070 {
12071 name: "SQRTSD",
12072 argLen: 1,
12073 asm: x86.ASQRTSD,
12074 reg: regInfo{
12075 inputs: []inputInfo{
12076 {0, 2147418112},
12077 },
12078 outputs: []outputInfo{
12079 {0, 2147418112},
12080 },
12081 },
12082 },
12083 {
12084 name: "SQRTSS",
12085 argLen: 1,
12086 asm: x86.ASQRTSS,
12087 reg: regInfo{
12088 inputs: []inputInfo{
12089 {0, 2147418112},
12090 },
12091 outputs: []outputInfo{
12092 {0, 2147418112},
12093 },
12094 },
12095 },
12096 {
12097 name: "ROUNDSD",
12098 auxType: auxInt8,
12099 argLen: 1,
12100 asm: x86.AROUNDSD,
12101 reg: regInfo{
12102 inputs: []inputInfo{
12103 {0, 2147418112},
12104 },
12105 outputs: []outputInfo{
12106 {0, 2147418112},
12107 },
12108 },
12109 },
12110 {
12111 name: "LoweredRound32F",
12112 argLen: 1,
12113 resultInArg0: true,
12114 zeroWidth: true,
12115 reg: regInfo{
12116 inputs: []inputInfo{
12117 {0, 2147418112},
12118 },
12119 outputs: []outputInfo{
12120 {0, 2147418112},
12121 },
12122 },
12123 },
12124 {
12125 name: "LoweredRound64F",
12126 argLen: 1,
12127 resultInArg0: true,
12128 zeroWidth: true,
12129 reg: regInfo{
12130 inputs: []inputInfo{
12131 {0, 2147418112},
12132 },
12133 outputs: []outputInfo{
12134 {0, 2147418112},
12135 },
12136 },
12137 },
12138 {
12139 name: "VFMADD231SS",
12140 argLen: 3,
12141 resultInArg0: true,
12142 asm: x86.AVFMADD231SS,
12143 reg: regInfo{
12144 inputs: []inputInfo{
12145 {0, 2147418112},
12146 {1, 2147418112},
12147 {2, 2147418112},
12148 },
12149 outputs: []outputInfo{
12150 {0, 2147418112},
12151 },
12152 },
12153 },
12154 {
12155 name: "VFMADD231SD",
12156 argLen: 3,
12157 resultInArg0: true,
12158 asm: x86.AVFMADD231SD,
12159 reg: regInfo{
12160 inputs: []inputInfo{
12161 {0, 2147418112},
12162 {1, 2147418112},
12163 {2, 2147418112},
12164 },
12165 outputs: []outputInfo{
12166 {0, 2147418112},
12167 },
12168 },
12169 },
12170 {
12171 name: "MINSD",
12172 argLen: 2,
12173 resultInArg0: true,
12174 asm: x86.AMINSD,
12175 reg: regInfo{
12176 inputs: []inputInfo{
12177 {0, 2147418112},
12178 {1, 2147418112},
12179 },
12180 outputs: []outputInfo{
12181 {0, 2147418112},
12182 },
12183 },
12184 },
12185 {
12186 name: "MINSS",
12187 argLen: 2,
12188 resultInArg0: true,
12189 asm: x86.AMINSS,
12190 reg: regInfo{
12191 inputs: []inputInfo{
12192 {0, 2147418112},
12193 {1, 2147418112},
12194 },
12195 outputs: []outputInfo{
12196 {0, 2147418112},
12197 },
12198 },
12199 },
12200 {
12201 name: "SBBQcarrymask",
12202 argLen: 1,
12203 asm: x86.ASBBQ,
12204 reg: regInfo{
12205 outputs: []outputInfo{
12206 {0, 49135},
12207 },
12208 },
12209 },
12210 {
12211 name: "SBBLcarrymask",
12212 argLen: 1,
12213 asm: x86.ASBBL,
12214 reg: regInfo{
12215 outputs: []outputInfo{
12216 {0, 49135},
12217 },
12218 },
12219 },
12220 {
12221 name: "SETEQ",
12222 argLen: 1,
12223 asm: x86.ASETEQ,
12224 reg: regInfo{
12225 outputs: []outputInfo{
12226 {0, 49135},
12227 },
12228 },
12229 },
12230 {
12231 name: "SETNE",
12232 argLen: 1,
12233 asm: x86.ASETNE,
12234 reg: regInfo{
12235 outputs: []outputInfo{
12236 {0, 49135},
12237 },
12238 },
12239 },
12240 {
12241 name: "SETL",
12242 argLen: 1,
12243 asm: x86.ASETLT,
12244 reg: regInfo{
12245 outputs: []outputInfo{
12246 {0, 49135},
12247 },
12248 },
12249 },
12250 {
12251 name: "SETLE",
12252 argLen: 1,
12253 asm: x86.ASETLE,
12254 reg: regInfo{
12255 outputs: []outputInfo{
12256 {0, 49135},
12257 },
12258 },
12259 },
12260 {
12261 name: "SETG",
12262 argLen: 1,
12263 asm: x86.ASETGT,
12264 reg: regInfo{
12265 outputs: []outputInfo{
12266 {0, 49135},
12267 },
12268 },
12269 },
12270 {
12271 name: "SETGE",
12272 argLen: 1,
12273 asm: x86.ASETGE,
12274 reg: regInfo{
12275 outputs: []outputInfo{
12276 {0, 49135},
12277 },
12278 },
12279 },
12280 {
12281 name: "SETB",
12282 argLen: 1,
12283 asm: x86.ASETCS,
12284 reg: regInfo{
12285 outputs: []outputInfo{
12286 {0, 49135},
12287 },
12288 },
12289 },
12290 {
12291 name: "SETBE",
12292 argLen: 1,
12293 asm: x86.ASETLS,
12294 reg: regInfo{
12295 outputs: []outputInfo{
12296 {0, 49135},
12297 },
12298 },
12299 },
12300 {
12301 name: "SETA",
12302 argLen: 1,
12303 asm: x86.ASETHI,
12304 reg: regInfo{
12305 outputs: []outputInfo{
12306 {0, 49135},
12307 },
12308 },
12309 },
12310 {
12311 name: "SETAE",
12312 argLen: 1,
12313 asm: x86.ASETCC,
12314 reg: regInfo{
12315 outputs: []outputInfo{
12316 {0, 49135},
12317 },
12318 },
12319 },
12320 {
12321 name: "SETO",
12322 argLen: 1,
12323 asm: x86.ASETOS,
12324 reg: regInfo{
12325 outputs: []outputInfo{
12326 {0, 49135},
12327 },
12328 },
12329 },
12330 {
12331 name: "SETEQstore",
12332 auxType: auxSymOff,
12333 argLen: 3,
12334 faultOnNilArg0: true,
12335 symEffect: SymWrite,
12336 asm: x86.ASETEQ,
12337 reg: regInfo{
12338 inputs: []inputInfo{
12339 {0, 4295032831},
12340 },
12341 },
12342 },
12343 {
12344 name: "SETNEstore",
12345 auxType: auxSymOff,
12346 argLen: 3,
12347 faultOnNilArg0: true,
12348 symEffect: SymWrite,
12349 asm: x86.ASETNE,
12350 reg: regInfo{
12351 inputs: []inputInfo{
12352 {0, 4295032831},
12353 },
12354 },
12355 },
12356 {
12357 name: "SETLstore",
12358 auxType: auxSymOff,
12359 argLen: 3,
12360 faultOnNilArg0: true,
12361 symEffect: SymWrite,
12362 asm: x86.ASETLT,
12363 reg: regInfo{
12364 inputs: []inputInfo{
12365 {0, 4295032831},
12366 },
12367 },
12368 },
12369 {
12370 name: "SETLEstore",
12371 auxType: auxSymOff,
12372 argLen: 3,
12373 faultOnNilArg0: true,
12374 symEffect: SymWrite,
12375 asm: x86.ASETLE,
12376 reg: regInfo{
12377 inputs: []inputInfo{
12378 {0, 4295032831},
12379 },
12380 },
12381 },
12382 {
12383 name: "SETGstore",
12384 auxType: auxSymOff,
12385 argLen: 3,
12386 faultOnNilArg0: true,
12387 symEffect: SymWrite,
12388 asm: x86.ASETGT,
12389 reg: regInfo{
12390 inputs: []inputInfo{
12391 {0, 4295032831},
12392 },
12393 },
12394 },
12395 {
12396 name: "SETGEstore",
12397 auxType: auxSymOff,
12398 argLen: 3,
12399 faultOnNilArg0: true,
12400 symEffect: SymWrite,
12401 asm: x86.ASETGE,
12402 reg: regInfo{
12403 inputs: []inputInfo{
12404 {0, 4295032831},
12405 },
12406 },
12407 },
12408 {
12409 name: "SETBstore",
12410 auxType: auxSymOff,
12411 argLen: 3,
12412 faultOnNilArg0: true,
12413 symEffect: SymWrite,
12414 asm: x86.ASETCS,
12415 reg: regInfo{
12416 inputs: []inputInfo{
12417 {0, 4295032831},
12418 },
12419 },
12420 },
12421 {
12422 name: "SETBEstore",
12423 auxType: auxSymOff,
12424 argLen: 3,
12425 faultOnNilArg0: true,
12426 symEffect: SymWrite,
12427 asm: x86.ASETLS,
12428 reg: regInfo{
12429 inputs: []inputInfo{
12430 {0, 4295032831},
12431 },
12432 },
12433 },
12434 {
12435 name: "SETAstore",
12436 auxType: auxSymOff,
12437 argLen: 3,
12438 faultOnNilArg0: true,
12439 symEffect: SymWrite,
12440 asm: x86.ASETHI,
12441 reg: regInfo{
12442 inputs: []inputInfo{
12443 {0, 4295032831},
12444 },
12445 },
12446 },
12447 {
12448 name: "SETAEstore",
12449 auxType: auxSymOff,
12450 argLen: 3,
12451 faultOnNilArg0: true,
12452 symEffect: SymWrite,
12453 asm: x86.ASETCC,
12454 reg: regInfo{
12455 inputs: []inputInfo{
12456 {0, 4295032831},
12457 },
12458 },
12459 },
12460 {
12461 name: "SETEQstoreidx1",
12462 auxType: auxSymOff,
12463 argLen: 4,
12464 commutative: true,
12465 symEffect: SymWrite,
12466 asm: x86.ASETEQ,
12467 scale: 1,
12468 reg: regInfo{
12469 inputs: []inputInfo{
12470 {1, 49151},
12471 {0, 4295032831},
12472 },
12473 },
12474 },
12475 {
12476 name: "SETNEstoreidx1",
12477 auxType: auxSymOff,
12478 argLen: 4,
12479 commutative: true,
12480 symEffect: SymWrite,
12481 asm: x86.ASETNE,
12482 scale: 1,
12483 reg: regInfo{
12484 inputs: []inputInfo{
12485 {1, 49151},
12486 {0, 4295032831},
12487 },
12488 },
12489 },
12490 {
12491 name: "SETLstoreidx1",
12492 auxType: auxSymOff,
12493 argLen: 4,
12494 commutative: true,
12495 symEffect: SymWrite,
12496 asm: x86.ASETLT,
12497 scale: 1,
12498 reg: regInfo{
12499 inputs: []inputInfo{
12500 {1, 49151},
12501 {0, 4295032831},
12502 },
12503 },
12504 },
12505 {
12506 name: "SETLEstoreidx1",
12507 auxType: auxSymOff,
12508 argLen: 4,
12509 commutative: true,
12510 symEffect: SymWrite,
12511 asm: x86.ASETLE,
12512 scale: 1,
12513 reg: regInfo{
12514 inputs: []inputInfo{
12515 {1, 49151},
12516 {0, 4295032831},
12517 },
12518 },
12519 },
12520 {
12521 name: "SETGstoreidx1",
12522 auxType: auxSymOff,
12523 argLen: 4,
12524 commutative: true,
12525 symEffect: SymWrite,
12526 asm: x86.ASETGT,
12527 scale: 1,
12528 reg: regInfo{
12529 inputs: []inputInfo{
12530 {1, 49151},
12531 {0, 4295032831},
12532 },
12533 },
12534 },
12535 {
12536 name: "SETGEstoreidx1",
12537 auxType: auxSymOff,
12538 argLen: 4,
12539 commutative: true,
12540 symEffect: SymWrite,
12541 asm: x86.ASETGE,
12542 scale: 1,
12543 reg: regInfo{
12544 inputs: []inputInfo{
12545 {1, 49151},
12546 {0, 4295032831},
12547 },
12548 },
12549 },
12550 {
12551 name: "SETBstoreidx1",
12552 auxType: auxSymOff,
12553 argLen: 4,
12554 commutative: true,
12555 symEffect: SymWrite,
12556 asm: x86.ASETCS,
12557 scale: 1,
12558 reg: regInfo{
12559 inputs: []inputInfo{
12560 {1, 49151},
12561 {0, 4295032831},
12562 },
12563 },
12564 },
12565 {
12566 name: "SETBEstoreidx1",
12567 auxType: auxSymOff,
12568 argLen: 4,
12569 commutative: true,
12570 symEffect: SymWrite,
12571 asm: x86.ASETLS,
12572 scale: 1,
12573 reg: regInfo{
12574 inputs: []inputInfo{
12575 {1, 49151},
12576 {0, 4295032831},
12577 },
12578 },
12579 },
12580 {
12581 name: "SETAstoreidx1",
12582 auxType: auxSymOff,
12583 argLen: 4,
12584 commutative: true,
12585 symEffect: SymWrite,
12586 asm: x86.ASETHI,
12587 scale: 1,
12588 reg: regInfo{
12589 inputs: []inputInfo{
12590 {1, 49151},
12591 {0, 4295032831},
12592 },
12593 },
12594 },
12595 {
12596 name: "SETAEstoreidx1",
12597 auxType: auxSymOff,
12598 argLen: 4,
12599 commutative: true,
12600 symEffect: SymWrite,
12601 asm: x86.ASETCC,
12602 scale: 1,
12603 reg: regInfo{
12604 inputs: []inputInfo{
12605 {1, 49151},
12606 {0, 4295032831},
12607 },
12608 },
12609 },
12610 {
12611 name: "SETEQF",
12612 argLen: 1,
12613 clobberFlags: true,
12614 needIntTemp: true,
12615 asm: x86.ASETEQ,
12616 reg: regInfo{
12617 outputs: []outputInfo{
12618 {0, 49135},
12619 },
12620 },
12621 },
12622 {
12623 name: "SETNEF",
12624 argLen: 1,
12625 clobberFlags: true,
12626 needIntTemp: true,
12627 asm: x86.ASETNE,
12628 reg: regInfo{
12629 outputs: []outputInfo{
12630 {0, 49135},
12631 },
12632 },
12633 },
12634 {
12635 name: "SETORD",
12636 argLen: 1,
12637 asm: x86.ASETPC,
12638 reg: regInfo{
12639 outputs: []outputInfo{
12640 {0, 49135},
12641 },
12642 },
12643 },
12644 {
12645 name: "SETNAN",
12646 argLen: 1,
12647 asm: x86.ASETPS,
12648 reg: regInfo{
12649 outputs: []outputInfo{
12650 {0, 49135},
12651 },
12652 },
12653 },
12654 {
12655 name: "SETGF",
12656 argLen: 1,
12657 asm: x86.ASETHI,
12658 reg: regInfo{
12659 outputs: []outputInfo{
12660 {0, 49135},
12661 },
12662 },
12663 },
12664 {
12665 name: "SETGEF",
12666 argLen: 1,
12667 asm: x86.ASETCC,
12668 reg: regInfo{
12669 outputs: []outputInfo{
12670 {0, 49135},
12671 },
12672 },
12673 },
12674 {
12675 name: "MOVBQSX",
12676 argLen: 1,
12677 asm: x86.AMOVBQSX,
12678 reg: regInfo{
12679 inputs: []inputInfo{
12680 {0, 49135},
12681 },
12682 outputs: []outputInfo{
12683 {0, 49135},
12684 },
12685 },
12686 },
12687 {
12688 name: "MOVBQZX",
12689 argLen: 1,
12690 asm: x86.AMOVBLZX,
12691 reg: regInfo{
12692 inputs: []inputInfo{
12693 {0, 49135},
12694 },
12695 outputs: []outputInfo{
12696 {0, 49135},
12697 },
12698 },
12699 },
12700 {
12701 name: "MOVWQSX",
12702 argLen: 1,
12703 asm: x86.AMOVWQSX,
12704 reg: regInfo{
12705 inputs: []inputInfo{
12706 {0, 49135},
12707 },
12708 outputs: []outputInfo{
12709 {0, 49135},
12710 },
12711 },
12712 },
12713 {
12714 name: "MOVWQZX",
12715 argLen: 1,
12716 asm: x86.AMOVWLZX,
12717 reg: regInfo{
12718 inputs: []inputInfo{
12719 {0, 49135},
12720 },
12721 outputs: []outputInfo{
12722 {0, 49135},
12723 },
12724 },
12725 },
12726 {
12727 name: "MOVLQSX",
12728 argLen: 1,
12729 asm: x86.AMOVLQSX,
12730 reg: regInfo{
12731 inputs: []inputInfo{
12732 {0, 49135},
12733 },
12734 outputs: []outputInfo{
12735 {0, 49135},
12736 },
12737 },
12738 },
12739 {
12740 name: "MOVLQZX",
12741 argLen: 1,
12742 asm: x86.AMOVL,
12743 reg: regInfo{
12744 inputs: []inputInfo{
12745 {0, 49135},
12746 },
12747 outputs: []outputInfo{
12748 {0, 49135},
12749 },
12750 },
12751 },
12752 {
12753 name: "MOVLconst",
12754 auxType: auxInt32,
12755 argLen: 0,
12756 rematerializeable: true,
12757 asm: x86.AMOVL,
12758 reg: regInfo{
12759 outputs: []outputInfo{
12760 {0, 49135},
12761 },
12762 },
12763 },
12764 {
12765 name: "MOVQconst",
12766 auxType: auxInt64,
12767 argLen: 0,
12768 rematerializeable: true,
12769 asm: x86.AMOVQ,
12770 reg: regInfo{
12771 outputs: []outputInfo{
12772 {0, 49135},
12773 },
12774 },
12775 },
12776 {
12777 name: "CVTTSD2SL",
12778 argLen: 1,
12779 asm: x86.ACVTTSD2SL,
12780 reg: regInfo{
12781 inputs: []inputInfo{
12782 {0, 2147418112},
12783 },
12784 outputs: []outputInfo{
12785 {0, 49135},
12786 },
12787 },
12788 },
12789 {
12790 name: "CVTTSD2SQ",
12791 argLen: 1,
12792 asm: x86.ACVTTSD2SQ,
12793 reg: regInfo{
12794 inputs: []inputInfo{
12795 {0, 2147418112},
12796 },
12797 outputs: []outputInfo{
12798 {0, 49135},
12799 },
12800 },
12801 },
12802 {
12803 name: "CVTTSS2SL",
12804 argLen: 1,
12805 asm: x86.ACVTTSS2SL,
12806 reg: regInfo{
12807 inputs: []inputInfo{
12808 {0, 2147418112},
12809 },
12810 outputs: []outputInfo{
12811 {0, 49135},
12812 },
12813 },
12814 },
12815 {
12816 name: "CVTTSS2SQ",
12817 argLen: 1,
12818 asm: x86.ACVTTSS2SQ,
12819 reg: regInfo{
12820 inputs: []inputInfo{
12821 {0, 2147418112},
12822 },
12823 outputs: []outputInfo{
12824 {0, 49135},
12825 },
12826 },
12827 },
12828 {
12829 name: "CVTSL2SS",
12830 argLen: 1,
12831 asm: x86.ACVTSL2SS,
12832 reg: regInfo{
12833 inputs: []inputInfo{
12834 {0, 49135},
12835 },
12836 outputs: []outputInfo{
12837 {0, 2147418112},
12838 },
12839 },
12840 },
12841 {
12842 name: "CVTSL2SD",
12843 argLen: 1,
12844 asm: x86.ACVTSL2SD,
12845 reg: regInfo{
12846 inputs: []inputInfo{
12847 {0, 49135},
12848 },
12849 outputs: []outputInfo{
12850 {0, 2147418112},
12851 },
12852 },
12853 },
12854 {
12855 name: "CVTSQ2SS",
12856 argLen: 1,
12857 asm: x86.ACVTSQ2SS,
12858 reg: regInfo{
12859 inputs: []inputInfo{
12860 {0, 49135},
12861 },
12862 outputs: []outputInfo{
12863 {0, 2147418112},
12864 },
12865 },
12866 },
12867 {
12868 name: "CVTSQ2SD",
12869 argLen: 1,
12870 asm: x86.ACVTSQ2SD,
12871 reg: regInfo{
12872 inputs: []inputInfo{
12873 {0, 49135},
12874 },
12875 outputs: []outputInfo{
12876 {0, 2147418112},
12877 },
12878 },
12879 },
12880 {
12881 name: "CVTSD2SS",
12882 argLen: 1,
12883 asm: x86.ACVTSD2SS,
12884 reg: regInfo{
12885 inputs: []inputInfo{
12886 {0, 2147418112},
12887 },
12888 outputs: []outputInfo{
12889 {0, 2147418112},
12890 },
12891 },
12892 },
12893 {
12894 name: "CVTSS2SD",
12895 argLen: 1,
12896 asm: x86.ACVTSS2SD,
12897 reg: regInfo{
12898 inputs: []inputInfo{
12899 {0, 2147418112},
12900 },
12901 outputs: []outputInfo{
12902 {0, 2147418112},
12903 },
12904 },
12905 },
12906 {
12907 name: "MOVQi2f",
12908 argLen: 1,
12909 reg: regInfo{
12910 inputs: []inputInfo{
12911 {0, 49135},
12912 },
12913 outputs: []outputInfo{
12914 {0, 2147418112},
12915 },
12916 },
12917 },
12918 {
12919 name: "MOVQf2i",
12920 argLen: 1,
12921 reg: regInfo{
12922 inputs: []inputInfo{
12923 {0, 2147418112},
12924 },
12925 outputs: []outputInfo{
12926 {0, 49135},
12927 },
12928 },
12929 },
12930 {
12931 name: "MOVLi2f",
12932 argLen: 1,
12933 reg: regInfo{
12934 inputs: []inputInfo{
12935 {0, 49135},
12936 },
12937 outputs: []outputInfo{
12938 {0, 2147418112},
12939 },
12940 },
12941 },
12942 {
12943 name: "MOVLf2i",
12944 argLen: 1,
12945 reg: regInfo{
12946 inputs: []inputInfo{
12947 {0, 2147418112},
12948 },
12949 outputs: []outputInfo{
12950 {0, 49135},
12951 },
12952 },
12953 },
12954 {
12955 name: "PXOR",
12956 argLen: 2,
12957 commutative: true,
12958 resultInArg0: true,
12959 asm: x86.APXOR,
12960 reg: regInfo{
12961 inputs: []inputInfo{
12962 {0, 2147418112},
12963 {1, 2147418112},
12964 },
12965 outputs: []outputInfo{
12966 {0, 2147418112},
12967 },
12968 },
12969 },
12970 {
12971 name: "POR",
12972 argLen: 2,
12973 commutative: true,
12974 resultInArg0: true,
12975 asm: x86.APOR,
12976 reg: regInfo{
12977 inputs: []inputInfo{
12978 {0, 2147418112},
12979 {1, 2147418112},
12980 },
12981 outputs: []outputInfo{
12982 {0, 2147418112},
12983 },
12984 },
12985 },
12986 {
12987 name: "LEAQ",
12988 auxType: auxSymOff,
12989 argLen: 1,
12990 rematerializeable: true,
12991 symEffect: SymAddr,
12992 asm: x86.ALEAQ,
12993 reg: regInfo{
12994 inputs: []inputInfo{
12995 {0, 4295032831},
12996 },
12997 outputs: []outputInfo{
12998 {0, 49135},
12999 },
13000 },
13001 },
13002 {
13003 name: "LEAL",
13004 auxType: auxSymOff,
13005 argLen: 1,
13006 rematerializeable: true,
13007 symEffect: SymAddr,
13008 asm: x86.ALEAL,
13009 reg: regInfo{
13010 inputs: []inputInfo{
13011 {0, 4295032831},
13012 },
13013 outputs: []outputInfo{
13014 {0, 49135},
13015 },
13016 },
13017 },
13018 {
13019 name: "LEAW",
13020 auxType: auxSymOff,
13021 argLen: 1,
13022 rematerializeable: true,
13023 symEffect: SymAddr,
13024 asm: x86.ALEAW,
13025 reg: regInfo{
13026 inputs: []inputInfo{
13027 {0, 4295032831},
13028 },
13029 outputs: []outputInfo{
13030 {0, 49135},
13031 },
13032 },
13033 },
13034 {
13035 name: "LEAQ1",
13036 auxType: auxSymOff,
13037 argLen: 2,
13038 commutative: true,
13039 symEffect: SymAddr,
13040 asm: x86.ALEAQ,
13041 scale: 1,
13042 reg: regInfo{
13043 inputs: []inputInfo{
13044 {1, 49151},
13045 {0, 4295032831},
13046 },
13047 outputs: []outputInfo{
13048 {0, 49135},
13049 },
13050 },
13051 },
13052 {
13053 name: "LEAL1",
13054 auxType: auxSymOff,
13055 argLen: 2,
13056 commutative: true,
13057 symEffect: SymAddr,
13058 asm: x86.ALEAL,
13059 scale: 1,
13060 reg: regInfo{
13061 inputs: []inputInfo{
13062 {1, 49151},
13063 {0, 4295032831},
13064 },
13065 outputs: []outputInfo{
13066 {0, 49135},
13067 },
13068 },
13069 },
13070 {
13071 name: "LEAW1",
13072 auxType: auxSymOff,
13073 argLen: 2,
13074 commutative: true,
13075 symEffect: SymAddr,
13076 asm: x86.ALEAW,
13077 scale: 1,
13078 reg: regInfo{
13079 inputs: []inputInfo{
13080 {1, 49151},
13081 {0, 4295032831},
13082 },
13083 outputs: []outputInfo{
13084 {0, 49135},
13085 },
13086 },
13087 },
13088 {
13089 name: "LEAQ2",
13090 auxType: auxSymOff,
13091 argLen: 2,
13092 symEffect: SymAddr,
13093 asm: x86.ALEAQ,
13094 scale: 2,
13095 reg: regInfo{
13096 inputs: []inputInfo{
13097 {1, 49151},
13098 {0, 4295032831},
13099 },
13100 outputs: []outputInfo{
13101 {0, 49135},
13102 },
13103 },
13104 },
13105 {
13106 name: "LEAL2",
13107 auxType: auxSymOff,
13108 argLen: 2,
13109 symEffect: SymAddr,
13110 asm: x86.ALEAL,
13111 scale: 2,
13112 reg: regInfo{
13113 inputs: []inputInfo{
13114 {1, 49151},
13115 {0, 4295032831},
13116 },
13117 outputs: []outputInfo{
13118 {0, 49135},
13119 },
13120 },
13121 },
13122 {
13123 name: "LEAW2",
13124 auxType: auxSymOff,
13125 argLen: 2,
13126 symEffect: SymAddr,
13127 asm: x86.ALEAW,
13128 scale: 2,
13129 reg: regInfo{
13130 inputs: []inputInfo{
13131 {1, 49151},
13132 {0, 4295032831},
13133 },
13134 outputs: []outputInfo{
13135 {0, 49135},
13136 },
13137 },
13138 },
13139 {
13140 name: "LEAQ4",
13141 auxType: auxSymOff,
13142 argLen: 2,
13143 symEffect: SymAddr,
13144 asm: x86.ALEAQ,
13145 scale: 4,
13146 reg: regInfo{
13147 inputs: []inputInfo{
13148 {1, 49151},
13149 {0, 4295032831},
13150 },
13151 outputs: []outputInfo{
13152 {0, 49135},
13153 },
13154 },
13155 },
13156 {
13157 name: "LEAL4",
13158 auxType: auxSymOff,
13159 argLen: 2,
13160 symEffect: SymAddr,
13161 asm: x86.ALEAL,
13162 scale: 4,
13163 reg: regInfo{
13164 inputs: []inputInfo{
13165 {1, 49151},
13166 {0, 4295032831},
13167 },
13168 outputs: []outputInfo{
13169 {0, 49135},
13170 },
13171 },
13172 },
13173 {
13174 name: "LEAW4",
13175 auxType: auxSymOff,
13176 argLen: 2,
13177 symEffect: SymAddr,
13178 asm: x86.ALEAW,
13179 scale: 4,
13180 reg: regInfo{
13181 inputs: []inputInfo{
13182 {1, 49151},
13183 {0, 4295032831},
13184 },
13185 outputs: []outputInfo{
13186 {0, 49135},
13187 },
13188 },
13189 },
13190 {
13191 name: "LEAQ8",
13192 auxType: auxSymOff,
13193 argLen: 2,
13194 symEffect: SymAddr,
13195 asm: x86.ALEAQ,
13196 scale: 8,
13197 reg: regInfo{
13198 inputs: []inputInfo{
13199 {1, 49151},
13200 {0, 4295032831},
13201 },
13202 outputs: []outputInfo{
13203 {0, 49135},
13204 },
13205 },
13206 },
13207 {
13208 name: "LEAL8",
13209 auxType: auxSymOff,
13210 argLen: 2,
13211 symEffect: SymAddr,
13212 asm: x86.ALEAL,
13213 scale: 8,
13214 reg: regInfo{
13215 inputs: []inputInfo{
13216 {1, 49151},
13217 {0, 4295032831},
13218 },
13219 outputs: []outputInfo{
13220 {0, 49135},
13221 },
13222 },
13223 },
13224 {
13225 name: "LEAW8",
13226 auxType: auxSymOff,
13227 argLen: 2,
13228 symEffect: SymAddr,
13229 asm: x86.ALEAW,
13230 scale: 8,
13231 reg: regInfo{
13232 inputs: []inputInfo{
13233 {1, 49151},
13234 {0, 4295032831},
13235 },
13236 outputs: []outputInfo{
13237 {0, 49135},
13238 },
13239 },
13240 },
13241 {
13242 name: "MOVBload",
13243 auxType: auxSymOff,
13244 argLen: 2,
13245 faultOnNilArg0: true,
13246 symEffect: SymRead,
13247 asm: x86.AMOVBLZX,
13248 reg: regInfo{
13249 inputs: []inputInfo{
13250 {0, 4295032831},
13251 },
13252 outputs: []outputInfo{
13253 {0, 49135},
13254 },
13255 },
13256 },
13257 {
13258 name: "MOVBQSXload",
13259 auxType: auxSymOff,
13260 argLen: 2,
13261 faultOnNilArg0: true,
13262 symEffect: SymRead,
13263 asm: x86.AMOVBQSX,
13264 reg: regInfo{
13265 inputs: []inputInfo{
13266 {0, 4295032831},
13267 },
13268 outputs: []outputInfo{
13269 {0, 49135},
13270 },
13271 },
13272 },
13273 {
13274 name: "MOVWload",
13275 auxType: auxSymOff,
13276 argLen: 2,
13277 faultOnNilArg0: true,
13278 symEffect: SymRead,
13279 asm: x86.AMOVWLZX,
13280 reg: regInfo{
13281 inputs: []inputInfo{
13282 {0, 4295032831},
13283 },
13284 outputs: []outputInfo{
13285 {0, 49135},
13286 },
13287 },
13288 },
13289 {
13290 name: "MOVWQSXload",
13291 auxType: auxSymOff,
13292 argLen: 2,
13293 faultOnNilArg0: true,
13294 symEffect: SymRead,
13295 asm: x86.AMOVWQSX,
13296 reg: regInfo{
13297 inputs: []inputInfo{
13298 {0, 4295032831},
13299 },
13300 outputs: []outputInfo{
13301 {0, 49135},
13302 },
13303 },
13304 },
13305 {
13306 name: "MOVLload",
13307 auxType: auxSymOff,
13308 argLen: 2,
13309 faultOnNilArg0: true,
13310 symEffect: SymRead,
13311 asm: x86.AMOVL,
13312 reg: regInfo{
13313 inputs: []inputInfo{
13314 {0, 4295032831},
13315 },
13316 outputs: []outputInfo{
13317 {0, 49135},
13318 },
13319 },
13320 },
13321 {
13322 name: "MOVLQSXload",
13323 auxType: auxSymOff,
13324 argLen: 2,
13325 faultOnNilArg0: true,
13326 symEffect: SymRead,
13327 asm: x86.AMOVLQSX,
13328 reg: regInfo{
13329 inputs: []inputInfo{
13330 {0, 4295032831},
13331 },
13332 outputs: []outputInfo{
13333 {0, 49135},
13334 },
13335 },
13336 },
13337 {
13338 name: "MOVQload",
13339 auxType: auxSymOff,
13340 argLen: 2,
13341 faultOnNilArg0: true,
13342 symEffect: SymRead,
13343 asm: x86.AMOVQ,
13344 reg: regInfo{
13345 inputs: []inputInfo{
13346 {0, 4295032831},
13347 },
13348 outputs: []outputInfo{
13349 {0, 49135},
13350 },
13351 },
13352 },
13353 {
13354 name: "MOVBstore",
13355 auxType: auxSymOff,
13356 argLen: 3,
13357 faultOnNilArg0: true,
13358 symEffect: SymWrite,
13359 asm: x86.AMOVB,
13360 reg: regInfo{
13361 inputs: []inputInfo{
13362 {1, 49151},
13363 {0, 4295032831},
13364 },
13365 },
13366 },
13367 {
13368 name: "MOVWstore",
13369 auxType: auxSymOff,
13370 argLen: 3,
13371 faultOnNilArg0: true,
13372 symEffect: SymWrite,
13373 asm: x86.AMOVW,
13374 reg: regInfo{
13375 inputs: []inputInfo{
13376 {1, 49151},
13377 {0, 4295032831},
13378 },
13379 },
13380 },
13381 {
13382 name: "MOVLstore",
13383 auxType: auxSymOff,
13384 argLen: 3,
13385 faultOnNilArg0: true,
13386 symEffect: SymWrite,
13387 asm: x86.AMOVL,
13388 reg: regInfo{
13389 inputs: []inputInfo{
13390 {1, 49151},
13391 {0, 4295032831},
13392 },
13393 },
13394 },
13395 {
13396 name: "MOVQstore",
13397 auxType: auxSymOff,
13398 argLen: 3,
13399 faultOnNilArg0: true,
13400 symEffect: SymWrite,
13401 asm: x86.AMOVQ,
13402 reg: regInfo{
13403 inputs: []inputInfo{
13404 {1, 49151},
13405 {0, 4295032831},
13406 },
13407 },
13408 },
13409 {
13410 name: "MOVOload",
13411 auxType: auxSymOff,
13412 argLen: 2,
13413 faultOnNilArg0: true,
13414 symEffect: SymRead,
13415 asm: x86.AMOVUPS,
13416 reg: regInfo{
13417 inputs: []inputInfo{
13418 {0, 4295016447},
13419 },
13420 outputs: []outputInfo{
13421 {0, 2147418112},
13422 },
13423 },
13424 },
13425 {
13426 name: "MOVOstore",
13427 auxType: auxSymOff,
13428 argLen: 3,
13429 faultOnNilArg0: true,
13430 symEffect: SymWrite,
13431 asm: x86.AMOVUPS,
13432 reg: regInfo{
13433 inputs: []inputInfo{
13434 {1, 2147418112},
13435 {0, 4295016447},
13436 },
13437 },
13438 },
13439 {
13440 name: "MOVBloadidx1",
13441 auxType: auxSymOff,
13442 argLen: 3,
13443 commutative: true,
13444 symEffect: SymRead,
13445 asm: x86.AMOVBLZX,
13446 scale: 1,
13447 reg: regInfo{
13448 inputs: []inputInfo{
13449 {1, 49151},
13450 {0, 4295032831},
13451 },
13452 outputs: []outputInfo{
13453 {0, 49135},
13454 },
13455 },
13456 },
13457 {
13458 name: "MOVWloadidx1",
13459 auxType: auxSymOff,
13460 argLen: 3,
13461 commutative: true,
13462 symEffect: SymRead,
13463 asm: x86.AMOVWLZX,
13464 scale: 1,
13465 reg: regInfo{
13466 inputs: []inputInfo{
13467 {1, 49151},
13468 {0, 4295032831},
13469 },
13470 outputs: []outputInfo{
13471 {0, 49135},
13472 },
13473 },
13474 },
13475 {
13476 name: "MOVWloadidx2",
13477 auxType: auxSymOff,
13478 argLen: 3,
13479 symEffect: SymRead,
13480 asm: x86.AMOVWLZX,
13481 scale: 2,
13482 reg: regInfo{
13483 inputs: []inputInfo{
13484 {1, 49151},
13485 {0, 4295032831},
13486 },
13487 outputs: []outputInfo{
13488 {0, 49135},
13489 },
13490 },
13491 },
13492 {
13493 name: "MOVLloadidx1",
13494 auxType: auxSymOff,
13495 argLen: 3,
13496 commutative: true,
13497 symEffect: SymRead,
13498 asm: x86.AMOVL,
13499 scale: 1,
13500 reg: regInfo{
13501 inputs: []inputInfo{
13502 {1, 49151},
13503 {0, 4295032831},
13504 },
13505 outputs: []outputInfo{
13506 {0, 49135},
13507 },
13508 },
13509 },
13510 {
13511 name: "MOVLloadidx4",
13512 auxType: auxSymOff,
13513 argLen: 3,
13514 symEffect: SymRead,
13515 asm: x86.AMOVL,
13516 scale: 4,
13517 reg: regInfo{
13518 inputs: []inputInfo{
13519 {1, 49151},
13520 {0, 4295032831},
13521 },
13522 outputs: []outputInfo{
13523 {0, 49135},
13524 },
13525 },
13526 },
13527 {
13528 name: "MOVLloadidx8",
13529 auxType: auxSymOff,
13530 argLen: 3,
13531 symEffect: SymRead,
13532 asm: x86.AMOVL,
13533 scale: 8,
13534 reg: regInfo{
13535 inputs: []inputInfo{
13536 {1, 49151},
13537 {0, 4295032831},
13538 },
13539 outputs: []outputInfo{
13540 {0, 49135},
13541 },
13542 },
13543 },
13544 {
13545 name: "MOVQloadidx1",
13546 auxType: auxSymOff,
13547 argLen: 3,
13548 commutative: true,
13549 symEffect: SymRead,
13550 asm: x86.AMOVQ,
13551 scale: 1,
13552 reg: regInfo{
13553 inputs: []inputInfo{
13554 {1, 49151},
13555 {0, 4295032831},
13556 },
13557 outputs: []outputInfo{
13558 {0, 49135},
13559 },
13560 },
13561 },
13562 {
13563 name: "MOVQloadidx8",
13564 auxType: auxSymOff,
13565 argLen: 3,
13566 symEffect: SymRead,
13567 asm: x86.AMOVQ,
13568 scale: 8,
13569 reg: regInfo{
13570 inputs: []inputInfo{
13571 {1, 49151},
13572 {0, 4295032831},
13573 },
13574 outputs: []outputInfo{
13575 {0, 49135},
13576 },
13577 },
13578 },
13579 {
13580 name: "MOVBstoreidx1",
13581 auxType: auxSymOff,
13582 argLen: 4,
13583 commutative: true,
13584 symEffect: SymWrite,
13585 asm: x86.AMOVB,
13586 scale: 1,
13587 reg: regInfo{
13588 inputs: []inputInfo{
13589 {1, 49151},
13590 {2, 49151},
13591 {0, 4295032831},
13592 },
13593 },
13594 },
13595 {
13596 name: "MOVWstoreidx1",
13597 auxType: auxSymOff,
13598 argLen: 4,
13599 commutative: true,
13600 symEffect: SymWrite,
13601 asm: x86.AMOVW,
13602 scale: 1,
13603 reg: regInfo{
13604 inputs: []inputInfo{
13605 {1, 49151},
13606 {2, 49151},
13607 {0, 4295032831},
13608 },
13609 },
13610 },
13611 {
13612 name: "MOVWstoreidx2",
13613 auxType: auxSymOff,
13614 argLen: 4,
13615 symEffect: SymWrite,
13616 asm: x86.AMOVW,
13617 scale: 2,
13618 reg: regInfo{
13619 inputs: []inputInfo{
13620 {1, 49151},
13621 {2, 49151},
13622 {0, 4295032831},
13623 },
13624 },
13625 },
13626 {
13627 name: "MOVLstoreidx1",
13628 auxType: auxSymOff,
13629 argLen: 4,
13630 commutative: true,
13631 symEffect: SymWrite,
13632 asm: x86.AMOVL,
13633 scale: 1,
13634 reg: regInfo{
13635 inputs: []inputInfo{
13636 {1, 49151},
13637 {2, 49151},
13638 {0, 4295032831},
13639 },
13640 },
13641 },
13642 {
13643 name: "MOVLstoreidx4",
13644 auxType: auxSymOff,
13645 argLen: 4,
13646 symEffect: SymWrite,
13647 asm: x86.AMOVL,
13648 scale: 4,
13649 reg: regInfo{
13650 inputs: []inputInfo{
13651 {1, 49151},
13652 {2, 49151},
13653 {0, 4295032831},
13654 },
13655 },
13656 },
13657 {
13658 name: "MOVLstoreidx8",
13659 auxType: auxSymOff,
13660 argLen: 4,
13661 symEffect: SymWrite,
13662 asm: x86.AMOVL,
13663 scale: 8,
13664 reg: regInfo{
13665 inputs: []inputInfo{
13666 {1, 49151},
13667 {2, 49151},
13668 {0, 4295032831},
13669 },
13670 },
13671 },
13672 {
13673 name: "MOVQstoreidx1",
13674 auxType: auxSymOff,
13675 argLen: 4,
13676 commutative: true,
13677 symEffect: SymWrite,
13678 asm: x86.AMOVQ,
13679 scale: 1,
13680 reg: regInfo{
13681 inputs: []inputInfo{
13682 {1, 49151},
13683 {2, 49151},
13684 {0, 4295032831},
13685 },
13686 },
13687 },
13688 {
13689 name: "MOVQstoreidx8",
13690 auxType: auxSymOff,
13691 argLen: 4,
13692 symEffect: SymWrite,
13693 asm: x86.AMOVQ,
13694 scale: 8,
13695 reg: regInfo{
13696 inputs: []inputInfo{
13697 {1, 49151},
13698 {2, 49151},
13699 {0, 4295032831},
13700 },
13701 },
13702 },
13703 {
13704 name: "MOVBstoreconst",
13705 auxType: auxSymValAndOff,
13706 argLen: 2,
13707 faultOnNilArg0: true,
13708 symEffect: SymWrite,
13709 asm: x86.AMOVB,
13710 reg: regInfo{
13711 inputs: []inputInfo{
13712 {0, 4295032831},
13713 },
13714 },
13715 },
13716 {
13717 name: "MOVWstoreconst",
13718 auxType: auxSymValAndOff,
13719 argLen: 2,
13720 faultOnNilArg0: true,
13721 symEffect: SymWrite,
13722 asm: x86.AMOVW,
13723 reg: regInfo{
13724 inputs: []inputInfo{
13725 {0, 4295032831},
13726 },
13727 },
13728 },
13729 {
13730 name: "MOVLstoreconst",
13731 auxType: auxSymValAndOff,
13732 argLen: 2,
13733 faultOnNilArg0: true,
13734 symEffect: SymWrite,
13735 asm: x86.AMOVL,
13736 reg: regInfo{
13737 inputs: []inputInfo{
13738 {0, 4295032831},
13739 },
13740 },
13741 },
13742 {
13743 name: "MOVQstoreconst",
13744 auxType: auxSymValAndOff,
13745 argLen: 2,
13746 faultOnNilArg0: true,
13747 symEffect: SymWrite,
13748 asm: x86.AMOVQ,
13749 reg: regInfo{
13750 inputs: []inputInfo{
13751 {0, 4295032831},
13752 },
13753 },
13754 },
13755 {
13756 name: "MOVOstoreconst",
13757 auxType: auxSymValAndOff,
13758 argLen: 2,
13759 faultOnNilArg0: true,
13760 symEffect: SymWrite,
13761 asm: x86.AMOVUPS,
13762 reg: regInfo{
13763 inputs: []inputInfo{
13764 {0, 4295032831},
13765 },
13766 },
13767 },
13768 {
13769 name: "MOVBstoreconstidx1",
13770 auxType: auxSymValAndOff,
13771 argLen: 3,
13772 commutative: true,
13773 symEffect: SymWrite,
13774 asm: x86.AMOVB,
13775 scale: 1,
13776 reg: regInfo{
13777 inputs: []inputInfo{
13778 {1, 49151},
13779 {0, 4295032831},
13780 },
13781 },
13782 },
13783 {
13784 name: "MOVWstoreconstidx1",
13785 auxType: auxSymValAndOff,
13786 argLen: 3,
13787 commutative: true,
13788 symEffect: SymWrite,
13789 asm: x86.AMOVW,
13790 scale: 1,
13791 reg: regInfo{
13792 inputs: []inputInfo{
13793 {1, 49151},
13794 {0, 4295032831},
13795 },
13796 },
13797 },
13798 {
13799 name: "MOVWstoreconstidx2",
13800 auxType: auxSymValAndOff,
13801 argLen: 3,
13802 symEffect: SymWrite,
13803 asm: x86.AMOVW,
13804 scale: 2,
13805 reg: regInfo{
13806 inputs: []inputInfo{
13807 {1, 49151},
13808 {0, 4295032831},
13809 },
13810 },
13811 },
13812 {
13813 name: "MOVLstoreconstidx1",
13814 auxType: auxSymValAndOff,
13815 argLen: 3,
13816 commutative: true,
13817 symEffect: SymWrite,
13818 asm: x86.AMOVL,
13819 scale: 1,
13820 reg: regInfo{
13821 inputs: []inputInfo{
13822 {1, 49151},
13823 {0, 4295032831},
13824 },
13825 },
13826 },
13827 {
13828 name: "MOVLstoreconstidx4",
13829 auxType: auxSymValAndOff,
13830 argLen: 3,
13831 symEffect: SymWrite,
13832 asm: x86.AMOVL,
13833 scale: 4,
13834 reg: regInfo{
13835 inputs: []inputInfo{
13836 {1, 49151},
13837 {0, 4295032831},
13838 },
13839 },
13840 },
13841 {
13842 name: "MOVQstoreconstidx1",
13843 auxType: auxSymValAndOff,
13844 argLen: 3,
13845 commutative: true,
13846 symEffect: SymWrite,
13847 asm: x86.AMOVQ,
13848 scale: 1,
13849 reg: regInfo{
13850 inputs: []inputInfo{
13851 {1, 49151},
13852 {0, 4295032831},
13853 },
13854 },
13855 },
13856 {
13857 name: "MOVQstoreconstidx8",
13858 auxType: auxSymValAndOff,
13859 argLen: 3,
13860 symEffect: SymWrite,
13861 asm: x86.AMOVQ,
13862 scale: 8,
13863 reg: regInfo{
13864 inputs: []inputInfo{
13865 {1, 49151},
13866 {0, 4295032831},
13867 },
13868 },
13869 },
13870 {
13871 name: "DUFFZERO",
13872 auxType: auxInt64,
13873 argLen: 2,
13874 faultOnNilArg0: true,
13875 unsafePoint: true,
13876 reg: regInfo{
13877 inputs: []inputInfo{
13878 {0, 128},
13879 },
13880 clobbers: 128,
13881 },
13882 },
13883 {
13884 name: "REPSTOSQ",
13885 argLen: 4,
13886 faultOnNilArg0: true,
13887 reg: regInfo{
13888 inputs: []inputInfo{
13889 {0, 128},
13890 {1, 2},
13891 {2, 1},
13892 },
13893 clobbers: 130,
13894 },
13895 },
13896 {
13897 name: "CALLstatic",
13898 auxType: auxCallOff,
13899 argLen: -1,
13900 clobberFlags: true,
13901 call: true,
13902 reg: regInfo{
13903 clobbers: 2147483631,
13904 },
13905 },
13906 {
13907 name: "CALLtail",
13908 auxType: auxCallOff,
13909 argLen: -1,
13910 clobberFlags: true,
13911 call: true,
13912 tailCall: true,
13913 reg: regInfo{
13914 clobbers: 2147483631,
13915 },
13916 },
13917 {
13918 name: "CALLclosure",
13919 auxType: auxCallOff,
13920 argLen: -1,
13921 clobberFlags: true,
13922 call: true,
13923 reg: regInfo{
13924 inputs: []inputInfo{
13925 {1, 4},
13926 {0, 49151},
13927 },
13928 clobbers: 2147483631,
13929 },
13930 },
13931 {
13932 name: "CALLinter",
13933 auxType: auxCallOff,
13934 argLen: -1,
13935 clobberFlags: true,
13936 call: true,
13937 reg: regInfo{
13938 inputs: []inputInfo{
13939 {0, 49135},
13940 },
13941 clobbers: 2147483631,
13942 },
13943 },
13944 {
13945 name: "DUFFCOPY",
13946 auxType: auxInt64,
13947 argLen: 3,
13948 clobberFlags: true,
13949 faultOnNilArg0: true,
13950 faultOnNilArg1: true,
13951 unsafePoint: true,
13952 reg: regInfo{
13953 inputs: []inputInfo{
13954 {0, 128},
13955 {1, 64},
13956 },
13957 clobbers: 65728,
13958 },
13959 },
13960 {
13961 name: "REPMOVSQ",
13962 argLen: 4,
13963 faultOnNilArg0: true,
13964 faultOnNilArg1: true,
13965 reg: regInfo{
13966 inputs: []inputInfo{
13967 {0, 128},
13968 {1, 64},
13969 {2, 2},
13970 },
13971 clobbers: 194,
13972 },
13973 },
13974 {
13975 name: "InvertFlags",
13976 argLen: 1,
13977 reg: regInfo{},
13978 },
13979 {
13980 name: "LoweredGetG",
13981 argLen: 1,
13982 reg: regInfo{
13983 outputs: []outputInfo{
13984 {0, 49135},
13985 },
13986 },
13987 },
13988 {
13989 name: "LoweredGetClosurePtr",
13990 argLen: 0,
13991 zeroWidth: true,
13992 reg: regInfo{
13993 outputs: []outputInfo{
13994 {0, 4},
13995 },
13996 },
13997 },
13998 {
13999 name: "LoweredGetCallerPC",
14000 argLen: 0,
14001 rematerializeable: true,
14002 reg: regInfo{
14003 outputs: []outputInfo{
14004 {0, 49135},
14005 },
14006 },
14007 },
14008 {
14009 name: "LoweredGetCallerSP",
14010 argLen: 1,
14011 rematerializeable: true,
14012 reg: regInfo{
14013 outputs: []outputInfo{
14014 {0, 49135},
14015 },
14016 },
14017 },
14018 {
14019 name: "LoweredNilCheck",
14020 argLen: 2,
14021 clobberFlags: true,
14022 nilCheck: true,
14023 faultOnNilArg0: true,
14024 reg: regInfo{
14025 inputs: []inputInfo{
14026 {0, 49151},
14027 },
14028 },
14029 },
14030 {
14031 name: "LoweredWB",
14032 auxType: auxInt64,
14033 argLen: 1,
14034 clobberFlags: true,
14035 reg: regInfo{
14036 clobbers: 2147418112,
14037 outputs: []outputInfo{
14038 {0, 2048},
14039 },
14040 },
14041 },
14042 {
14043 name: "LoweredHasCPUFeature",
14044 auxType: auxSym,
14045 argLen: 0,
14046 rematerializeable: true,
14047 symEffect: SymNone,
14048 reg: regInfo{
14049 outputs: []outputInfo{
14050 {0, 49135},
14051 },
14052 },
14053 },
14054 {
14055 name: "LoweredPanicBoundsA",
14056 auxType: auxInt64,
14057 argLen: 3,
14058 call: true,
14059 reg: regInfo{
14060 inputs: []inputInfo{
14061 {0, 4},
14062 {1, 8},
14063 },
14064 },
14065 },
14066 {
14067 name: "LoweredPanicBoundsB",
14068 auxType: auxInt64,
14069 argLen: 3,
14070 call: true,
14071 reg: regInfo{
14072 inputs: []inputInfo{
14073 {0, 2},
14074 {1, 4},
14075 },
14076 },
14077 },
14078 {
14079 name: "LoweredPanicBoundsC",
14080 auxType: auxInt64,
14081 argLen: 3,
14082 call: true,
14083 reg: regInfo{
14084 inputs: []inputInfo{
14085 {0, 1},
14086 {1, 2},
14087 },
14088 },
14089 },
14090 {
14091 name: "FlagEQ",
14092 argLen: 0,
14093 reg: regInfo{},
14094 },
14095 {
14096 name: "FlagLT_ULT",
14097 argLen: 0,
14098 reg: regInfo{},
14099 },
14100 {
14101 name: "FlagLT_UGT",
14102 argLen: 0,
14103 reg: regInfo{},
14104 },
14105 {
14106 name: "FlagGT_UGT",
14107 argLen: 0,
14108 reg: regInfo{},
14109 },
14110 {
14111 name: "FlagGT_ULT",
14112 argLen: 0,
14113 reg: regInfo{},
14114 },
14115 {
14116 name: "MOVBatomicload",
14117 auxType: auxSymOff,
14118 argLen: 2,
14119 faultOnNilArg0: true,
14120 symEffect: SymRead,
14121 asm: x86.AMOVB,
14122 reg: regInfo{
14123 inputs: []inputInfo{
14124 {0, 4295032831},
14125 },
14126 outputs: []outputInfo{
14127 {0, 49135},
14128 },
14129 },
14130 },
14131 {
14132 name: "MOVLatomicload",
14133 auxType: auxSymOff,
14134 argLen: 2,
14135 faultOnNilArg0: true,
14136 symEffect: SymRead,
14137 asm: x86.AMOVL,
14138 reg: regInfo{
14139 inputs: []inputInfo{
14140 {0, 4295032831},
14141 },
14142 outputs: []outputInfo{
14143 {0, 49135},
14144 },
14145 },
14146 },
14147 {
14148 name: "MOVQatomicload",
14149 auxType: auxSymOff,
14150 argLen: 2,
14151 faultOnNilArg0: true,
14152 symEffect: SymRead,
14153 asm: x86.AMOVQ,
14154 reg: regInfo{
14155 inputs: []inputInfo{
14156 {0, 4295032831},
14157 },
14158 outputs: []outputInfo{
14159 {0, 49135},
14160 },
14161 },
14162 },
14163 {
14164 name: "XCHGB",
14165 auxType: auxSymOff,
14166 argLen: 3,
14167 resultInArg0: true,
14168 faultOnNilArg1: true,
14169 hasSideEffects: true,
14170 symEffect: SymRdWr,
14171 asm: x86.AXCHGB,
14172 reg: regInfo{
14173 inputs: []inputInfo{
14174 {0, 49135},
14175 {1, 4295032831},
14176 },
14177 outputs: []outputInfo{
14178 {0, 49135},
14179 },
14180 },
14181 },
14182 {
14183 name: "XCHGL",
14184 auxType: auxSymOff,
14185 argLen: 3,
14186 resultInArg0: true,
14187 faultOnNilArg1: true,
14188 hasSideEffects: true,
14189 symEffect: SymRdWr,
14190 asm: x86.AXCHGL,
14191 reg: regInfo{
14192 inputs: []inputInfo{
14193 {0, 49135},
14194 {1, 4295032831},
14195 },
14196 outputs: []outputInfo{
14197 {0, 49135},
14198 },
14199 },
14200 },
14201 {
14202 name: "XCHGQ",
14203 auxType: auxSymOff,
14204 argLen: 3,
14205 resultInArg0: true,
14206 faultOnNilArg1: true,
14207 hasSideEffects: true,
14208 symEffect: SymRdWr,
14209 asm: x86.AXCHGQ,
14210 reg: regInfo{
14211 inputs: []inputInfo{
14212 {0, 49135},
14213 {1, 4295032831},
14214 },
14215 outputs: []outputInfo{
14216 {0, 49135},
14217 },
14218 },
14219 },
14220 {
14221 name: "XADDLlock",
14222 auxType: auxSymOff,
14223 argLen: 3,
14224 resultInArg0: true,
14225 clobberFlags: true,
14226 faultOnNilArg1: true,
14227 hasSideEffects: true,
14228 symEffect: SymRdWr,
14229 asm: x86.AXADDL,
14230 reg: regInfo{
14231 inputs: []inputInfo{
14232 {0, 49135},
14233 {1, 4295032831},
14234 },
14235 outputs: []outputInfo{
14236 {0, 49135},
14237 },
14238 },
14239 },
14240 {
14241 name: "XADDQlock",
14242 auxType: auxSymOff,
14243 argLen: 3,
14244 resultInArg0: true,
14245 clobberFlags: true,
14246 faultOnNilArg1: true,
14247 hasSideEffects: true,
14248 symEffect: SymRdWr,
14249 asm: x86.AXADDQ,
14250 reg: regInfo{
14251 inputs: []inputInfo{
14252 {0, 49135},
14253 {1, 4295032831},
14254 },
14255 outputs: []outputInfo{
14256 {0, 49135},
14257 },
14258 },
14259 },
14260 {
14261 name: "AddTupleFirst32",
14262 argLen: 2,
14263 reg: regInfo{},
14264 },
14265 {
14266 name: "AddTupleFirst64",
14267 argLen: 2,
14268 reg: regInfo{},
14269 },
14270 {
14271 name: "CMPXCHGLlock",
14272 auxType: auxSymOff,
14273 argLen: 4,
14274 clobberFlags: true,
14275 faultOnNilArg0: true,
14276 hasSideEffects: true,
14277 symEffect: SymRdWr,
14278 asm: x86.ACMPXCHGL,
14279 reg: regInfo{
14280 inputs: []inputInfo{
14281 {1, 1},
14282 {0, 49135},
14283 {2, 49135},
14284 },
14285 clobbers: 1,
14286 outputs: []outputInfo{
14287 {1, 0},
14288 {0, 49135},
14289 },
14290 },
14291 },
14292 {
14293 name: "CMPXCHGQlock",
14294 auxType: auxSymOff,
14295 argLen: 4,
14296 clobberFlags: true,
14297 faultOnNilArg0: true,
14298 hasSideEffects: true,
14299 symEffect: SymRdWr,
14300 asm: x86.ACMPXCHGQ,
14301 reg: regInfo{
14302 inputs: []inputInfo{
14303 {1, 1},
14304 {0, 49135},
14305 {2, 49135},
14306 },
14307 clobbers: 1,
14308 outputs: []outputInfo{
14309 {1, 0},
14310 {0, 49135},
14311 },
14312 },
14313 },
14314 {
14315 name: "ANDBlock",
14316 auxType: auxSymOff,
14317 argLen: 3,
14318 clobberFlags: true,
14319 faultOnNilArg0: true,
14320 hasSideEffects: true,
14321 symEffect: SymRdWr,
14322 asm: x86.AANDB,
14323 reg: regInfo{
14324 inputs: []inputInfo{
14325 {1, 49151},
14326 {0, 4295032831},
14327 },
14328 },
14329 },
14330 {
14331 name: "ANDLlock",
14332 auxType: auxSymOff,
14333 argLen: 3,
14334 clobberFlags: true,
14335 faultOnNilArg0: true,
14336 hasSideEffects: true,
14337 symEffect: SymRdWr,
14338 asm: x86.AANDL,
14339 reg: regInfo{
14340 inputs: []inputInfo{
14341 {1, 49151},
14342 {0, 4295032831},
14343 },
14344 },
14345 },
14346 {
14347 name: "ANDQlock",
14348 auxType: auxSymOff,
14349 argLen: 3,
14350 clobberFlags: true,
14351 faultOnNilArg0: true,
14352 hasSideEffects: true,
14353 symEffect: SymRdWr,
14354 asm: x86.AANDQ,
14355 reg: regInfo{
14356 inputs: []inputInfo{
14357 {1, 49151},
14358 {0, 4295032831},
14359 },
14360 },
14361 },
14362 {
14363 name: "ORBlock",
14364 auxType: auxSymOff,
14365 argLen: 3,
14366 clobberFlags: true,
14367 faultOnNilArg0: true,
14368 hasSideEffects: true,
14369 symEffect: SymRdWr,
14370 asm: x86.AORB,
14371 reg: regInfo{
14372 inputs: []inputInfo{
14373 {1, 49151},
14374 {0, 4295032831},
14375 },
14376 },
14377 },
14378 {
14379 name: "ORLlock",
14380 auxType: auxSymOff,
14381 argLen: 3,
14382 clobberFlags: true,
14383 faultOnNilArg0: true,
14384 hasSideEffects: true,
14385 symEffect: SymRdWr,
14386 asm: x86.AORL,
14387 reg: regInfo{
14388 inputs: []inputInfo{
14389 {1, 49151},
14390 {0, 4295032831},
14391 },
14392 },
14393 },
14394 {
14395 name: "ORQlock",
14396 auxType: auxSymOff,
14397 argLen: 3,
14398 clobberFlags: true,
14399 faultOnNilArg0: true,
14400 hasSideEffects: true,
14401 symEffect: SymRdWr,
14402 asm: x86.AORQ,
14403 reg: regInfo{
14404 inputs: []inputInfo{
14405 {1, 49151},
14406 {0, 4295032831},
14407 },
14408 },
14409 },
14410 {
14411 name: "LoweredAtomicAnd64",
14412 auxType: auxSymOff,
14413 argLen: 3,
14414 resultNotInArgs: true,
14415 clobberFlags: true,
14416 needIntTemp: true,
14417 faultOnNilArg0: true,
14418 hasSideEffects: true,
14419 unsafePoint: true,
14420 symEffect: SymRdWr,
14421 asm: x86.AANDQ,
14422 reg: regInfo{
14423 inputs: []inputInfo{
14424 {0, 49134},
14425 {1, 49134},
14426 },
14427 outputs: []outputInfo{
14428 {1, 0},
14429 {0, 1},
14430 },
14431 },
14432 },
14433 {
14434 name: "LoweredAtomicAnd32",
14435 auxType: auxSymOff,
14436 argLen: 3,
14437 resultNotInArgs: true,
14438 clobberFlags: true,
14439 needIntTemp: true,
14440 faultOnNilArg0: true,
14441 hasSideEffects: true,
14442 unsafePoint: true,
14443 symEffect: SymRdWr,
14444 asm: x86.AANDL,
14445 reg: regInfo{
14446 inputs: []inputInfo{
14447 {0, 49134},
14448 {1, 49134},
14449 },
14450 outputs: []outputInfo{
14451 {1, 0},
14452 {0, 1},
14453 },
14454 },
14455 },
14456 {
14457 name: "LoweredAtomicOr64",
14458 auxType: auxSymOff,
14459 argLen: 3,
14460 resultNotInArgs: true,
14461 clobberFlags: true,
14462 needIntTemp: true,
14463 faultOnNilArg0: true,
14464 hasSideEffects: true,
14465 unsafePoint: true,
14466 symEffect: SymRdWr,
14467 asm: x86.AORQ,
14468 reg: regInfo{
14469 inputs: []inputInfo{
14470 {0, 49134},
14471 {1, 49134},
14472 },
14473 outputs: []outputInfo{
14474 {1, 0},
14475 {0, 1},
14476 },
14477 },
14478 },
14479 {
14480 name: "LoweredAtomicOr32",
14481 auxType: auxSymOff,
14482 argLen: 3,
14483 resultNotInArgs: true,
14484 clobberFlags: true,
14485 needIntTemp: true,
14486 faultOnNilArg0: true,
14487 hasSideEffects: true,
14488 unsafePoint: true,
14489 symEffect: SymRdWr,
14490 asm: x86.AORL,
14491 reg: regInfo{
14492 inputs: []inputInfo{
14493 {0, 49134},
14494 {1, 49134},
14495 },
14496 outputs: []outputInfo{
14497 {1, 0},
14498 {0, 1},
14499 },
14500 },
14501 },
14502 {
14503 name: "PrefetchT0",
14504 argLen: 2,
14505 hasSideEffects: true,
14506 asm: x86.APREFETCHT0,
14507 reg: regInfo{
14508 inputs: []inputInfo{
14509 {0, 4295032831},
14510 },
14511 },
14512 },
14513 {
14514 name: "PrefetchNTA",
14515 argLen: 2,
14516 hasSideEffects: true,
14517 asm: x86.APREFETCHNTA,
14518 reg: regInfo{
14519 inputs: []inputInfo{
14520 {0, 4295032831},
14521 },
14522 },
14523 },
14524 {
14525 name: "ANDNQ",
14526 argLen: 2,
14527 clobberFlags: true,
14528 asm: x86.AANDNQ,
14529 reg: regInfo{
14530 inputs: []inputInfo{
14531 {0, 49135},
14532 {1, 49135},
14533 },
14534 outputs: []outputInfo{
14535 {0, 49135},
14536 },
14537 },
14538 },
14539 {
14540 name: "ANDNL",
14541 argLen: 2,
14542 clobberFlags: true,
14543 asm: x86.AANDNL,
14544 reg: regInfo{
14545 inputs: []inputInfo{
14546 {0, 49135},
14547 {1, 49135},
14548 },
14549 outputs: []outputInfo{
14550 {0, 49135},
14551 },
14552 },
14553 },
14554 {
14555 name: "BLSIQ",
14556 argLen: 1,
14557 clobberFlags: true,
14558 asm: x86.ABLSIQ,
14559 reg: regInfo{
14560 inputs: []inputInfo{
14561 {0, 49135},
14562 },
14563 outputs: []outputInfo{
14564 {0, 49135},
14565 },
14566 },
14567 },
14568 {
14569 name: "BLSIL",
14570 argLen: 1,
14571 clobberFlags: true,
14572 asm: x86.ABLSIL,
14573 reg: regInfo{
14574 inputs: []inputInfo{
14575 {0, 49135},
14576 },
14577 outputs: []outputInfo{
14578 {0, 49135},
14579 },
14580 },
14581 },
14582 {
14583 name: "BLSMSKQ",
14584 argLen: 1,
14585 clobberFlags: true,
14586 asm: x86.ABLSMSKQ,
14587 reg: regInfo{
14588 inputs: []inputInfo{
14589 {0, 49135},
14590 },
14591 outputs: []outputInfo{
14592 {0, 49135},
14593 },
14594 },
14595 },
14596 {
14597 name: "BLSMSKL",
14598 argLen: 1,
14599 clobberFlags: true,
14600 asm: x86.ABLSMSKL,
14601 reg: regInfo{
14602 inputs: []inputInfo{
14603 {0, 49135},
14604 },
14605 outputs: []outputInfo{
14606 {0, 49135},
14607 },
14608 },
14609 },
14610 {
14611 name: "BLSRQ",
14612 argLen: 1,
14613 asm: x86.ABLSRQ,
14614 reg: regInfo{
14615 inputs: []inputInfo{
14616 {0, 49135},
14617 },
14618 outputs: []outputInfo{
14619 {1, 0},
14620 {0, 49135},
14621 },
14622 },
14623 },
14624 {
14625 name: "BLSRL",
14626 argLen: 1,
14627 asm: x86.ABLSRL,
14628 reg: regInfo{
14629 inputs: []inputInfo{
14630 {0, 49135},
14631 },
14632 outputs: []outputInfo{
14633 {1, 0},
14634 {0, 49135},
14635 },
14636 },
14637 },
14638 {
14639 name: "TZCNTQ",
14640 argLen: 1,
14641 clobberFlags: true,
14642 asm: x86.ATZCNTQ,
14643 reg: regInfo{
14644 inputs: []inputInfo{
14645 {0, 49135},
14646 },
14647 outputs: []outputInfo{
14648 {0, 49135},
14649 },
14650 },
14651 },
14652 {
14653 name: "TZCNTL",
14654 argLen: 1,
14655 clobberFlags: true,
14656 asm: x86.ATZCNTL,
14657 reg: regInfo{
14658 inputs: []inputInfo{
14659 {0, 49135},
14660 },
14661 outputs: []outputInfo{
14662 {0, 49135},
14663 },
14664 },
14665 },
14666 {
14667 name: "LZCNTQ",
14668 argLen: 1,
14669 clobberFlags: true,
14670 asm: x86.ALZCNTQ,
14671 reg: regInfo{
14672 inputs: []inputInfo{
14673 {0, 49135},
14674 },
14675 outputs: []outputInfo{
14676 {0, 49135},
14677 },
14678 },
14679 },
14680 {
14681 name: "LZCNTL",
14682 argLen: 1,
14683 clobberFlags: true,
14684 asm: x86.ALZCNTL,
14685 reg: regInfo{
14686 inputs: []inputInfo{
14687 {0, 49135},
14688 },
14689 outputs: []outputInfo{
14690 {0, 49135},
14691 },
14692 },
14693 },
14694 {
14695 name: "MOVBEWstore",
14696 auxType: auxSymOff,
14697 argLen: 3,
14698 faultOnNilArg0: true,
14699 symEffect: SymWrite,
14700 asm: x86.AMOVBEW,
14701 reg: regInfo{
14702 inputs: []inputInfo{
14703 {1, 49151},
14704 {0, 4295032831},
14705 },
14706 },
14707 },
14708 {
14709 name: "MOVBELload",
14710 auxType: auxSymOff,
14711 argLen: 2,
14712 faultOnNilArg0: true,
14713 symEffect: SymRead,
14714 asm: x86.AMOVBEL,
14715 reg: regInfo{
14716 inputs: []inputInfo{
14717 {0, 4295032831},
14718 },
14719 outputs: []outputInfo{
14720 {0, 49135},
14721 },
14722 },
14723 },
14724 {
14725 name: "MOVBELstore",
14726 auxType: auxSymOff,
14727 argLen: 3,
14728 faultOnNilArg0: true,
14729 symEffect: SymWrite,
14730 asm: x86.AMOVBEL,
14731 reg: regInfo{
14732 inputs: []inputInfo{
14733 {1, 49151},
14734 {0, 4295032831},
14735 },
14736 },
14737 },
14738 {
14739 name: "MOVBEQload",
14740 auxType: auxSymOff,
14741 argLen: 2,
14742 faultOnNilArg0: true,
14743 symEffect: SymRead,
14744 asm: x86.AMOVBEQ,
14745 reg: regInfo{
14746 inputs: []inputInfo{
14747 {0, 4295032831},
14748 },
14749 outputs: []outputInfo{
14750 {0, 49135},
14751 },
14752 },
14753 },
14754 {
14755 name: "MOVBEQstore",
14756 auxType: auxSymOff,
14757 argLen: 3,
14758 faultOnNilArg0: true,
14759 symEffect: SymWrite,
14760 asm: x86.AMOVBEQ,
14761 reg: regInfo{
14762 inputs: []inputInfo{
14763 {1, 49151},
14764 {0, 4295032831},
14765 },
14766 },
14767 },
14768 {
14769 name: "MOVBELloadidx1",
14770 auxType: auxSymOff,
14771 argLen: 3,
14772 commutative: true,
14773 symEffect: SymRead,
14774 asm: x86.AMOVBEL,
14775 scale: 1,
14776 reg: regInfo{
14777 inputs: []inputInfo{
14778 {1, 49151},
14779 {0, 4295032831},
14780 },
14781 outputs: []outputInfo{
14782 {0, 49135},
14783 },
14784 },
14785 },
14786 {
14787 name: "MOVBELloadidx4",
14788 auxType: auxSymOff,
14789 argLen: 3,
14790 symEffect: SymRead,
14791 asm: x86.AMOVBEL,
14792 scale: 4,
14793 reg: regInfo{
14794 inputs: []inputInfo{
14795 {1, 49151},
14796 {0, 4295032831},
14797 },
14798 outputs: []outputInfo{
14799 {0, 49135},
14800 },
14801 },
14802 },
14803 {
14804 name: "MOVBELloadidx8",
14805 auxType: auxSymOff,
14806 argLen: 3,
14807 symEffect: SymRead,
14808 asm: x86.AMOVBEL,
14809 scale: 8,
14810 reg: regInfo{
14811 inputs: []inputInfo{
14812 {1, 49151},
14813 {0, 4295032831},
14814 },
14815 outputs: []outputInfo{
14816 {0, 49135},
14817 },
14818 },
14819 },
14820 {
14821 name: "MOVBEQloadidx1",
14822 auxType: auxSymOff,
14823 argLen: 3,
14824 commutative: true,
14825 symEffect: SymRead,
14826 asm: x86.AMOVBEQ,
14827 scale: 1,
14828 reg: regInfo{
14829 inputs: []inputInfo{
14830 {1, 49151},
14831 {0, 4295032831},
14832 },
14833 outputs: []outputInfo{
14834 {0, 49135},
14835 },
14836 },
14837 },
14838 {
14839 name: "MOVBEQloadidx8",
14840 auxType: auxSymOff,
14841 argLen: 3,
14842 symEffect: SymRead,
14843 asm: x86.AMOVBEQ,
14844 scale: 8,
14845 reg: regInfo{
14846 inputs: []inputInfo{
14847 {1, 49151},
14848 {0, 4295032831},
14849 },
14850 outputs: []outputInfo{
14851 {0, 49135},
14852 },
14853 },
14854 },
14855 {
14856 name: "MOVBEWstoreidx1",
14857 auxType: auxSymOff,
14858 argLen: 4,
14859 commutative: true,
14860 symEffect: SymWrite,
14861 asm: x86.AMOVBEW,
14862 scale: 1,
14863 reg: regInfo{
14864 inputs: []inputInfo{
14865 {1, 49151},
14866 {2, 49151},
14867 {0, 4295032831},
14868 },
14869 },
14870 },
14871 {
14872 name: "MOVBEWstoreidx2",
14873 auxType: auxSymOff,
14874 argLen: 4,
14875 symEffect: SymWrite,
14876 asm: x86.AMOVBEW,
14877 scale: 2,
14878 reg: regInfo{
14879 inputs: []inputInfo{
14880 {1, 49151},
14881 {2, 49151},
14882 {0, 4295032831},
14883 },
14884 },
14885 },
14886 {
14887 name: "MOVBELstoreidx1",
14888 auxType: auxSymOff,
14889 argLen: 4,
14890 commutative: true,
14891 symEffect: SymWrite,
14892 asm: x86.AMOVBEL,
14893 scale: 1,
14894 reg: regInfo{
14895 inputs: []inputInfo{
14896 {1, 49151},
14897 {2, 49151},
14898 {0, 4295032831},
14899 },
14900 },
14901 },
14902 {
14903 name: "MOVBELstoreidx4",
14904 auxType: auxSymOff,
14905 argLen: 4,
14906 symEffect: SymWrite,
14907 asm: x86.AMOVBEL,
14908 scale: 4,
14909 reg: regInfo{
14910 inputs: []inputInfo{
14911 {1, 49151},
14912 {2, 49151},
14913 {0, 4295032831},
14914 },
14915 },
14916 },
14917 {
14918 name: "MOVBELstoreidx8",
14919 auxType: auxSymOff,
14920 argLen: 4,
14921 symEffect: SymWrite,
14922 asm: x86.AMOVBEL,
14923 scale: 8,
14924 reg: regInfo{
14925 inputs: []inputInfo{
14926 {1, 49151},
14927 {2, 49151},
14928 {0, 4295032831},
14929 },
14930 },
14931 },
14932 {
14933 name: "MOVBEQstoreidx1",
14934 auxType: auxSymOff,
14935 argLen: 4,
14936 commutative: true,
14937 symEffect: SymWrite,
14938 asm: x86.AMOVBEQ,
14939 scale: 1,
14940 reg: regInfo{
14941 inputs: []inputInfo{
14942 {1, 49151},
14943 {2, 49151},
14944 {0, 4295032831},
14945 },
14946 },
14947 },
14948 {
14949 name: "MOVBEQstoreidx8",
14950 auxType: auxSymOff,
14951 argLen: 4,
14952 symEffect: SymWrite,
14953 asm: x86.AMOVBEQ,
14954 scale: 8,
14955 reg: regInfo{
14956 inputs: []inputInfo{
14957 {1, 49151},
14958 {2, 49151},
14959 {0, 4295032831},
14960 },
14961 },
14962 },
14963 {
14964 name: "SARXQ",
14965 argLen: 2,
14966 asm: x86.ASARXQ,
14967 reg: regInfo{
14968 inputs: []inputInfo{
14969 {0, 49135},
14970 {1, 49135},
14971 },
14972 outputs: []outputInfo{
14973 {0, 49135},
14974 },
14975 },
14976 },
14977 {
14978 name: "SARXL",
14979 argLen: 2,
14980 asm: x86.ASARXL,
14981 reg: regInfo{
14982 inputs: []inputInfo{
14983 {0, 49135},
14984 {1, 49135},
14985 },
14986 outputs: []outputInfo{
14987 {0, 49135},
14988 },
14989 },
14990 },
14991 {
14992 name: "SHLXQ",
14993 argLen: 2,
14994 asm: x86.ASHLXQ,
14995 reg: regInfo{
14996 inputs: []inputInfo{
14997 {0, 49135},
14998 {1, 49135},
14999 },
15000 outputs: []outputInfo{
15001 {0, 49135},
15002 },
15003 },
15004 },
15005 {
15006 name: "SHLXL",
15007 argLen: 2,
15008 asm: x86.ASHLXL,
15009 reg: regInfo{
15010 inputs: []inputInfo{
15011 {0, 49135},
15012 {1, 49135},
15013 },
15014 outputs: []outputInfo{
15015 {0, 49135},
15016 },
15017 },
15018 },
15019 {
15020 name: "SHRXQ",
15021 argLen: 2,
15022 asm: x86.ASHRXQ,
15023 reg: regInfo{
15024 inputs: []inputInfo{
15025 {0, 49135},
15026 {1, 49135},
15027 },
15028 outputs: []outputInfo{
15029 {0, 49135},
15030 },
15031 },
15032 },
15033 {
15034 name: "SHRXL",
15035 argLen: 2,
15036 asm: x86.ASHRXL,
15037 reg: regInfo{
15038 inputs: []inputInfo{
15039 {0, 49135},
15040 {1, 49135},
15041 },
15042 outputs: []outputInfo{
15043 {0, 49135},
15044 },
15045 },
15046 },
15047 {
15048 name: "SARXLload",
15049 auxType: auxSymOff,
15050 argLen: 3,
15051 faultOnNilArg0: true,
15052 symEffect: SymRead,
15053 asm: x86.ASARXL,
15054 reg: regInfo{
15055 inputs: []inputInfo{
15056 {1, 49135},
15057 {0, 4295032831},
15058 },
15059 outputs: []outputInfo{
15060 {0, 49135},
15061 },
15062 },
15063 },
15064 {
15065 name: "SARXQload",
15066 auxType: auxSymOff,
15067 argLen: 3,
15068 faultOnNilArg0: true,
15069 symEffect: SymRead,
15070 asm: x86.ASARXQ,
15071 reg: regInfo{
15072 inputs: []inputInfo{
15073 {1, 49135},
15074 {0, 4295032831},
15075 },
15076 outputs: []outputInfo{
15077 {0, 49135},
15078 },
15079 },
15080 },
15081 {
15082 name: "SHLXLload",
15083 auxType: auxSymOff,
15084 argLen: 3,
15085 faultOnNilArg0: true,
15086 symEffect: SymRead,
15087 asm: x86.ASHLXL,
15088 reg: regInfo{
15089 inputs: []inputInfo{
15090 {1, 49135},
15091 {0, 4295032831},
15092 },
15093 outputs: []outputInfo{
15094 {0, 49135},
15095 },
15096 },
15097 },
15098 {
15099 name: "SHLXQload",
15100 auxType: auxSymOff,
15101 argLen: 3,
15102 faultOnNilArg0: true,
15103 symEffect: SymRead,
15104 asm: x86.ASHLXQ,
15105 reg: regInfo{
15106 inputs: []inputInfo{
15107 {1, 49135},
15108 {0, 4295032831},
15109 },
15110 outputs: []outputInfo{
15111 {0, 49135},
15112 },
15113 },
15114 },
15115 {
15116 name: "SHRXLload",
15117 auxType: auxSymOff,
15118 argLen: 3,
15119 faultOnNilArg0: true,
15120 symEffect: SymRead,
15121 asm: x86.ASHRXL,
15122 reg: regInfo{
15123 inputs: []inputInfo{
15124 {1, 49135},
15125 {0, 4295032831},
15126 },
15127 outputs: []outputInfo{
15128 {0, 49135},
15129 },
15130 },
15131 },
15132 {
15133 name: "SHRXQload",
15134 auxType: auxSymOff,
15135 argLen: 3,
15136 faultOnNilArg0: true,
15137 symEffect: SymRead,
15138 asm: x86.ASHRXQ,
15139 reg: regInfo{
15140 inputs: []inputInfo{
15141 {1, 49135},
15142 {0, 4295032831},
15143 },
15144 outputs: []outputInfo{
15145 {0, 49135},
15146 },
15147 },
15148 },
15149 {
15150 name: "SARXLloadidx1",
15151 auxType: auxSymOff,
15152 argLen: 4,
15153 faultOnNilArg0: true,
15154 symEffect: SymRead,
15155 asm: x86.ASARXL,
15156 scale: 1,
15157 reg: regInfo{
15158 inputs: []inputInfo{
15159 {2, 49135},
15160 {1, 49151},
15161 {0, 4295032831},
15162 },
15163 outputs: []outputInfo{
15164 {0, 49135},
15165 },
15166 },
15167 },
15168 {
15169 name: "SARXLloadidx4",
15170 auxType: auxSymOff,
15171 argLen: 4,
15172 faultOnNilArg0: true,
15173 symEffect: SymRead,
15174 asm: x86.ASARXL,
15175 scale: 4,
15176 reg: regInfo{
15177 inputs: []inputInfo{
15178 {2, 49135},
15179 {1, 49151},
15180 {0, 4295032831},
15181 },
15182 outputs: []outputInfo{
15183 {0, 49135},
15184 },
15185 },
15186 },
15187 {
15188 name: "SARXLloadidx8",
15189 auxType: auxSymOff,
15190 argLen: 4,
15191 faultOnNilArg0: true,
15192 symEffect: SymRead,
15193 asm: x86.ASARXL,
15194 scale: 8,
15195 reg: regInfo{
15196 inputs: []inputInfo{
15197 {2, 49135},
15198 {1, 49151},
15199 {0, 4295032831},
15200 },
15201 outputs: []outputInfo{
15202 {0, 49135},
15203 },
15204 },
15205 },
15206 {
15207 name: "SARXQloadidx1",
15208 auxType: auxSymOff,
15209 argLen: 4,
15210 faultOnNilArg0: true,
15211 symEffect: SymRead,
15212 asm: x86.ASARXQ,
15213 scale: 1,
15214 reg: regInfo{
15215 inputs: []inputInfo{
15216 {2, 49135},
15217 {1, 49151},
15218 {0, 4295032831},
15219 },
15220 outputs: []outputInfo{
15221 {0, 49135},
15222 },
15223 },
15224 },
15225 {
15226 name: "SARXQloadidx8",
15227 auxType: auxSymOff,
15228 argLen: 4,
15229 faultOnNilArg0: true,
15230 symEffect: SymRead,
15231 asm: x86.ASARXQ,
15232 scale: 8,
15233 reg: regInfo{
15234 inputs: []inputInfo{
15235 {2, 49135},
15236 {1, 49151},
15237 {0, 4295032831},
15238 },
15239 outputs: []outputInfo{
15240 {0, 49135},
15241 },
15242 },
15243 },
15244 {
15245 name: "SHLXLloadidx1",
15246 auxType: auxSymOff,
15247 argLen: 4,
15248 faultOnNilArg0: true,
15249 symEffect: SymRead,
15250 asm: x86.ASHLXL,
15251 scale: 1,
15252 reg: regInfo{
15253 inputs: []inputInfo{
15254 {2, 49135},
15255 {1, 49151},
15256 {0, 4295032831},
15257 },
15258 outputs: []outputInfo{
15259 {0, 49135},
15260 },
15261 },
15262 },
15263 {
15264 name: "SHLXLloadidx4",
15265 auxType: auxSymOff,
15266 argLen: 4,
15267 faultOnNilArg0: true,
15268 symEffect: SymRead,
15269 asm: x86.ASHLXL,
15270 scale: 4,
15271 reg: regInfo{
15272 inputs: []inputInfo{
15273 {2, 49135},
15274 {1, 49151},
15275 {0, 4295032831},
15276 },
15277 outputs: []outputInfo{
15278 {0, 49135},
15279 },
15280 },
15281 },
15282 {
15283 name: "SHLXLloadidx8",
15284 auxType: auxSymOff,
15285 argLen: 4,
15286 faultOnNilArg0: true,
15287 symEffect: SymRead,
15288 asm: x86.ASHLXL,
15289 scale: 8,
15290 reg: regInfo{
15291 inputs: []inputInfo{
15292 {2, 49135},
15293 {1, 49151},
15294 {0, 4295032831},
15295 },
15296 outputs: []outputInfo{
15297 {0, 49135},
15298 },
15299 },
15300 },
15301 {
15302 name: "SHLXQloadidx1",
15303 auxType: auxSymOff,
15304 argLen: 4,
15305 faultOnNilArg0: true,
15306 symEffect: SymRead,
15307 asm: x86.ASHLXQ,
15308 scale: 1,
15309 reg: regInfo{
15310 inputs: []inputInfo{
15311 {2, 49135},
15312 {1, 49151},
15313 {0, 4295032831},
15314 },
15315 outputs: []outputInfo{
15316 {0, 49135},
15317 },
15318 },
15319 },
15320 {
15321 name: "SHLXQloadidx8",
15322 auxType: auxSymOff,
15323 argLen: 4,
15324 faultOnNilArg0: true,
15325 symEffect: SymRead,
15326 asm: x86.ASHLXQ,
15327 scale: 8,
15328 reg: regInfo{
15329 inputs: []inputInfo{
15330 {2, 49135},
15331 {1, 49151},
15332 {0, 4295032831},
15333 },
15334 outputs: []outputInfo{
15335 {0, 49135},
15336 },
15337 },
15338 },
15339 {
15340 name: "SHRXLloadidx1",
15341 auxType: auxSymOff,
15342 argLen: 4,
15343 faultOnNilArg0: true,
15344 symEffect: SymRead,
15345 asm: x86.ASHRXL,
15346 scale: 1,
15347 reg: regInfo{
15348 inputs: []inputInfo{
15349 {2, 49135},
15350 {1, 49151},
15351 {0, 4295032831},
15352 },
15353 outputs: []outputInfo{
15354 {0, 49135},
15355 },
15356 },
15357 },
15358 {
15359 name: "SHRXLloadidx4",
15360 auxType: auxSymOff,
15361 argLen: 4,
15362 faultOnNilArg0: true,
15363 symEffect: SymRead,
15364 asm: x86.ASHRXL,
15365 scale: 4,
15366 reg: regInfo{
15367 inputs: []inputInfo{
15368 {2, 49135},
15369 {1, 49151},
15370 {0, 4295032831},
15371 },
15372 outputs: []outputInfo{
15373 {0, 49135},
15374 },
15375 },
15376 },
15377 {
15378 name: "SHRXLloadidx8",
15379 auxType: auxSymOff,
15380 argLen: 4,
15381 faultOnNilArg0: true,
15382 symEffect: SymRead,
15383 asm: x86.ASHRXL,
15384 scale: 8,
15385 reg: regInfo{
15386 inputs: []inputInfo{
15387 {2, 49135},
15388 {1, 49151},
15389 {0, 4295032831},
15390 },
15391 outputs: []outputInfo{
15392 {0, 49135},
15393 },
15394 },
15395 },
15396 {
15397 name: "SHRXQloadidx1",
15398 auxType: auxSymOff,
15399 argLen: 4,
15400 faultOnNilArg0: true,
15401 symEffect: SymRead,
15402 asm: x86.ASHRXQ,
15403 scale: 1,
15404 reg: regInfo{
15405 inputs: []inputInfo{
15406 {2, 49135},
15407 {1, 49151},
15408 {0, 4295032831},
15409 },
15410 outputs: []outputInfo{
15411 {0, 49135},
15412 },
15413 },
15414 },
15415 {
15416 name: "SHRXQloadidx8",
15417 auxType: auxSymOff,
15418 argLen: 4,
15419 faultOnNilArg0: true,
15420 symEffect: SymRead,
15421 asm: x86.ASHRXQ,
15422 scale: 8,
15423 reg: regInfo{
15424 inputs: []inputInfo{
15425 {2, 49135},
15426 {1, 49151},
15427 {0, 4295032831},
15428 },
15429 outputs: []outputInfo{
15430 {0, 49135},
15431 },
15432 },
15433 },
15434 {
15435 name: "PUNPCKLBW",
15436 argLen: 2,
15437 resultInArg0: true,
15438 asm: x86.APUNPCKLBW,
15439 reg: regInfo{
15440 inputs: []inputInfo{
15441 {0, 2147418112},
15442 {1, 2147418112},
15443 },
15444 outputs: []outputInfo{
15445 {0, 2147418112},
15446 },
15447 },
15448 },
15449 {
15450 name: "PSHUFLW",
15451 auxType: auxInt8,
15452 argLen: 1,
15453 asm: x86.APSHUFLW,
15454 reg: regInfo{
15455 inputs: []inputInfo{
15456 {0, 2147418112},
15457 },
15458 outputs: []outputInfo{
15459 {0, 2147418112},
15460 },
15461 },
15462 },
15463 {
15464 name: "PSHUFBbroadcast",
15465 argLen: 1,
15466 resultInArg0: true,
15467 asm: x86.APSHUFB,
15468 reg: regInfo{
15469 inputs: []inputInfo{
15470 {0, 2147418112},
15471 },
15472 outputs: []outputInfo{
15473 {0, 2147418112},
15474 },
15475 },
15476 },
15477 {
15478 name: "VPBROADCASTB",
15479 argLen: 1,
15480 asm: x86.AVPBROADCASTB,
15481 reg: regInfo{
15482 inputs: []inputInfo{
15483 {0, 49135},
15484 },
15485 outputs: []outputInfo{
15486 {0, 2147418112},
15487 },
15488 },
15489 },
15490 {
15491 name: "PSIGNB",
15492 argLen: 2,
15493 resultInArg0: true,
15494 asm: x86.APSIGNB,
15495 reg: regInfo{
15496 inputs: []inputInfo{
15497 {0, 2147418112},
15498 {1, 2147418112},
15499 },
15500 outputs: []outputInfo{
15501 {0, 2147418112},
15502 },
15503 },
15504 },
15505 {
15506 name: "PCMPEQB",
15507 argLen: 2,
15508 commutative: true,
15509 resultInArg0: true,
15510 asm: x86.APCMPEQB,
15511 reg: regInfo{
15512 inputs: []inputInfo{
15513 {0, 2147418112},
15514 {1, 2147418112},
15515 },
15516 outputs: []outputInfo{
15517 {0, 2147418112},
15518 },
15519 },
15520 },
15521 {
15522 name: "PMOVMSKB",
15523 argLen: 1,
15524 asm: x86.APMOVMSKB,
15525 reg: regInfo{
15526 inputs: []inputInfo{
15527 {0, 2147418112},
15528 },
15529 outputs: []outputInfo{
15530 {0, 49135},
15531 },
15532 },
15533 },
15534
15535 {
15536 name: "ADD",
15537 argLen: 2,
15538 commutative: true,
15539 asm: arm.AADD,
15540 reg: regInfo{
15541 inputs: []inputInfo{
15542 {0, 22527},
15543 {1, 22527},
15544 },
15545 outputs: []outputInfo{
15546 {0, 21503},
15547 },
15548 },
15549 },
15550 {
15551 name: "ADDconst",
15552 auxType: auxInt32,
15553 argLen: 1,
15554 asm: arm.AADD,
15555 reg: regInfo{
15556 inputs: []inputInfo{
15557 {0, 30719},
15558 },
15559 outputs: []outputInfo{
15560 {0, 21503},
15561 },
15562 },
15563 },
15564 {
15565 name: "SUB",
15566 argLen: 2,
15567 asm: arm.ASUB,
15568 reg: regInfo{
15569 inputs: []inputInfo{
15570 {0, 22527},
15571 {1, 22527},
15572 },
15573 outputs: []outputInfo{
15574 {0, 21503},
15575 },
15576 },
15577 },
15578 {
15579 name: "SUBconst",
15580 auxType: auxInt32,
15581 argLen: 1,
15582 asm: arm.ASUB,
15583 reg: regInfo{
15584 inputs: []inputInfo{
15585 {0, 22527},
15586 },
15587 outputs: []outputInfo{
15588 {0, 21503},
15589 },
15590 },
15591 },
15592 {
15593 name: "RSB",
15594 argLen: 2,
15595 asm: arm.ARSB,
15596 reg: regInfo{
15597 inputs: []inputInfo{
15598 {0, 22527},
15599 {1, 22527},
15600 },
15601 outputs: []outputInfo{
15602 {0, 21503},
15603 },
15604 },
15605 },
15606 {
15607 name: "RSBconst",
15608 auxType: auxInt32,
15609 argLen: 1,
15610 asm: arm.ARSB,
15611 reg: regInfo{
15612 inputs: []inputInfo{
15613 {0, 22527},
15614 },
15615 outputs: []outputInfo{
15616 {0, 21503},
15617 },
15618 },
15619 },
15620 {
15621 name: "MUL",
15622 argLen: 2,
15623 commutative: true,
15624 asm: arm.AMUL,
15625 reg: regInfo{
15626 inputs: []inputInfo{
15627 {0, 22527},
15628 {1, 22527},
15629 },
15630 outputs: []outputInfo{
15631 {0, 21503},
15632 },
15633 },
15634 },
15635 {
15636 name: "HMUL",
15637 argLen: 2,
15638 commutative: true,
15639 asm: arm.AMULL,
15640 reg: regInfo{
15641 inputs: []inputInfo{
15642 {0, 22527},
15643 {1, 22527},
15644 },
15645 outputs: []outputInfo{
15646 {0, 21503},
15647 },
15648 },
15649 },
15650 {
15651 name: "HMULU",
15652 argLen: 2,
15653 commutative: true,
15654 asm: arm.AMULLU,
15655 reg: regInfo{
15656 inputs: []inputInfo{
15657 {0, 22527},
15658 {1, 22527},
15659 },
15660 outputs: []outputInfo{
15661 {0, 21503},
15662 },
15663 },
15664 },
15665 {
15666 name: "CALLudiv",
15667 argLen: 2,
15668 clobberFlags: true,
15669 reg: regInfo{
15670 inputs: []inputInfo{
15671 {0, 2},
15672 {1, 1},
15673 },
15674 clobbers: 20492,
15675 outputs: []outputInfo{
15676 {0, 1},
15677 {1, 2},
15678 },
15679 },
15680 },
15681 {
15682 name: "ADDS",
15683 argLen: 2,
15684 commutative: true,
15685 asm: arm.AADD,
15686 reg: regInfo{
15687 inputs: []inputInfo{
15688 {0, 22527},
15689 {1, 22527},
15690 },
15691 outputs: []outputInfo{
15692 {1, 0},
15693 {0, 21503},
15694 },
15695 },
15696 },
15697 {
15698 name: "ADDSconst",
15699 auxType: auxInt32,
15700 argLen: 1,
15701 asm: arm.AADD,
15702 reg: regInfo{
15703 inputs: []inputInfo{
15704 {0, 22527},
15705 },
15706 outputs: []outputInfo{
15707 {1, 0},
15708 {0, 21503},
15709 },
15710 },
15711 },
15712 {
15713 name: "ADC",
15714 argLen: 3,
15715 commutative: true,
15716 asm: arm.AADC,
15717 reg: regInfo{
15718 inputs: []inputInfo{
15719 {0, 21503},
15720 {1, 21503},
15721 },
15722 outputs: []outputInfo{
15723 {0, 21503},
15724 },
15725 },
15726 },
15727 {
15728 name: "ADCconst",
15729 auxType: auxInt32,
15730 argLen: 2,
15731 asm: arm.AADC,
15732 reg: regInfo{
15733 inputs: []inputInfo{
15734 {0, 21503},
15735 },
15736 outputs: []outputInfo{
15737 {0, 21503},
15738 },
15739 },
15740 },
15741 {
15742 name: "SUBS",
15743 argLen: 2,
15744 asm: arm.ASUB,
15745 reg: regInfo{
15746 inputs: []inputInfo{
15747 {0, 22527},
15748 {1, 22527},
15749 },
15750 outputs: []outputInfo{
15751 {1, 0},
15752 {0, 21503},
15753 },
15754 },
15755 },
15756 {
15757 name: "SUBSconst",
15758 auxType: auxInt32,
15759 argLen: 1,
15760 asm: arm.ASUB,
15761 reg: regInfo{
15762 inputs: []inputInfo{
15763 {0, 22527},
15764 },
15765 outputs: []outputInfo{
15766 {1, 0},
15767 {0, 21503},
15768 },
15769 },
15770 },
15771 {
15772 name: "RSBSconst",
15773 auxType: auxInt32,
15774 argLen: 1,
15775 asm: arm.ARSB,
15776 reg: regInfo{
15777 inputs: []inputInfo{
15778 {0, 22527},
15779 },
15780 outputs: []outputInfo{
15781 {1, 0},
15782 {0, 21503},
15783 },
15784 },
15785 },
15786 {
15787 name: "SBC",
15788 argLen: 3,
15789 asm: arm.ASBC,
15790 reg: regInfo{
15791 inputs: []inputInfo{
15792 {0, 21503},
15793 {1, 21503},
15794 },
15795 outputs: []outputInfo{
15796 {0, 21503},
15797 },
15798 },
15799 },
15800 {
15801 name: "SBCconst",
15802 auxType: auxInt32,
15803 argLen: 2,
15804 asm: arm.ASBC,
15805 reg: regInfo{
15806 inputs: []inputInfo{
15807 {0, 21503},
15808 },
15809 outputs: []outputInfo{
15810 {0, 21503},
15811 },
15812 },
15813 },
15814 {
15815 name: "RSCconst",
15816 auxType: auxInt32,
15817 argLen: 2,
15818 asm: arm.ARSC,
15819 reg: regInfo{
15820 inputs: []inputInfo{
15821 {0, 21503},
15822 },
15823 outputs: []outputInfo{
15824 {0, 21503},
15825 },
15826 },
15827 },
15828 {
15829 name: "MULLU",
15830 argLen: 2,
15831 commutative: true,
15832 asm: arm.AMULLU,
15833 reg: regInfo{
15834 inputs: []inputInfo{
15835 {0, 22527},
15836 {1, 22527},
15837 },
15838 outputs: []outputInfo{
15839 {0, 21503},
15840 {1, 21503},
15841 },
15842 },
15843 },
15844 {
15845 name: "MULA",
15846 argLen: 3,
15847 asm: arm.AMULA,
15848 reg: regInfo{
15849 inputs: []inputInfo{
15850 {0, 21503},
15851 {1, 21503},
15852 {2, 21503},
15853 },
15854 outputs: []outputInfo{
15855 {0, 21503},
15856 },
15857 },
15858 },
15859 {
15860 name: "MULS",
15861 argLen: 3,
15862 asm: arm.AMULS,
15863 reg: regInfo{
15864 inputs: []inputInfo{
15865 {0, 21503},
15866 {1, 21503},
15867 {2, 21503},
15868 },
15869 outputs: []outputInfo{
15870 {0, 21503},
15871 },
15872 },
15873 },
15874 {
15875 name: "ADDF",
15876 argLen: 2,
15877 commutative: true,
15878 asm: arm.AADDF,
15879 reg: regInfo{
15880 inputs: []inputInfo{
15881 {0, 4294901760},
15882 {1, 4294901760},
15883 },
15884 outputs: []outputInfo{
15885 {0, 4294901760},
15886 },
15887 },
15888 },
15889 {
15890 name: "ADDD",
15891 argLen: 2,
15892 commutative: true,
15893 asm: arm.AADDD,
15894 reg: regInfo{
15895 inputs: []inputInfo{
15896 {0, 4294901760},
15897 {1, 4294901760},
15898 },
15899 outputs: []outputInfo{
15900 {0, 4294901760},
15901 },
15902 },
15903 },
15904 {
15905 name: "SUBF",
15906 argLen: 2,
15907 asm: arm.ASUBF,
15908 reg: regInfo{
15909 inputs: []inputInfo{
15910 {0, 4294901760},
15911 {1, 4294901760},
15912 },
15913 outputs: []outputInfo{
15914 {0, 4294901760},
15915 },
15916 },
15917 },
15918 {
15919 name: "SUBD",
15920 argLen: 2,
15921 asm: arm.ASUBD,
15922 reg: regInfo{
15923 inputs: []inputInfo{
15924 {0, 4294901760},
15925 {1, 4294901760},
15926 },
15927 outputs: []outputInfo{
15928 {0, 4294901760},
15929 },
15930 },
15931 },
15932 {
15933 name: "MULF",
15934 argLen: 2,
15935 commutative: true,
15936 asm: arm.AMULF,
15937 reg: regInfo{
15938 inputs: []inputInfo{
15939 {0, 4294901760},
15940 {1, 4294901760},
15941 },
15942 outputs: []outputInfo{
15943 {0, 4294901760},
15944 },
15945 },
15946 },
15947 {
15948 name: "MULD",
15949 argLen: 2,
15950 commutative: true,
15951 asm: arm.AMULD,
15952 reg: regInfo{
15953 inputs: []inputInfo{
15954 {0, 4294901760},
15955 {1, 4294901760},
15956 },
15957 outputs: []outputInfo{
15958 {0, 4294901760},
15959 },
15960 },
15961 },
15962 {
15963 name: "NMULF",
15964 argLen: 2,
15965 commutative: true,
15966 asm: arm.ANMULF,
15967 reg: regInfo{
15968 inputs: []inputInfo{
15969 {0, 4294901760},
15970 {1, 4294901760},
15971 },
15972 outputs: []outputInfo{
15973 {0, 4294901760},
15974 },
15975 },
15976 },
15977 {
15978 name: "NMULD",
15979 argLen: 2,
15980 commutative: true,
15981 asm: arm.ANMULD,
15982 reg: regInfo{
15983 inputs: []inputInfo{
15984 {0, 4294901760},
15985 {1, 4294901760},
15986 },
15987 outputs: []outputInfo{
15988 {0, 4294901760},
15989 },
15990 },
15991 },
15992 {
15993 name: "DIVF",
15994 argLen: 2,
15995 asm: arm.ADIVF,
15996 reg: regInfo{
15997 inputs: []inputInfo{
15998 {0, 4294901760},
15999 {1, 4294901760},
16000 },
16001 outputs: []outputInfo{
16002 {0, 4294901760},
16003 },
16004 },
16005 },
16006 {
16007 name: "DIVD",
16008 argLen: 2,
16009 asm: arm.ADIVD,
16010 reg: regInfo{
16011 inputs: []inputInfo{
16012 {0, 4294901760},
16013 {1, 4294901760},
16014 },
16015 outputs: []outputInfo{
16016 {0, 4294901760},
16017 },
16018 },
16019 },
16020 {
16021 name: "MULAF",
16022 argLen: 3,
16023 resultInArg0: true,
16024 asm: arm.AMULAF,
16025 reg: regInfo{
16026 inputs: []inputInfo{
16027 {0, 4294901760},
16028 {1, 4294901760},
16029 {2, 4294901760},
16030 },
16031 outputs: []outputInfo{
16032 {0, 4294901760},
16033 },
16034 },
16035 },
16036 {
16037 name: "MULAD",
16038 argLen: 3,
16039 resultInArg0: true,
16040 asm: arm.AMULAD,
16041 reg: regInfo{
16042 inputs: []inputInfo{
16043 {0, 4294901760},
16044 {1, 4294901760},
16045 {2, 4294901760},
16046 },
16047 outputs: []outputInfo{
16048 {0, 4294901760},
16049 },
16050 },
16051 },
16052 {
16053 name: "MULSF",
16054 argLen: 3,
16055 resultInArg0: true,
16056 asm: arm.AMULSF,
16057 reg: regInfo{
16058 inputs: []inputInfo{
16059 {0, 4294901760},
16060 {1, 4294901760},
16061 {2, 4294901760},
16062 },
16063 outputs: []outputInfo{
16064 {0, 4294901760},
16065 },
16066 },
16067 },
16068 {
16069 name: "MULSD",
16070 argLen: 3,
16071 resultInArg0: true,
16072 asm: arm.AMULSD,
16073 reg: regInfo{
16074 inputs: []inputInfo{
16075 {0, 4294901760},
16076 {1, 4294901760},
16077 {2, 4294901760},
16078 },
16079 outputs: []outputInfo{
16080 {0, 4294901760},
16081 },
16082 },
16083 },
16084 {
16085 name: "FMULAD",
16086 argLen: 3,
16087 resultInArg0: true,
16088 asm: arm.AFMULAD,
16089 reg: regInfo{
16090 inputs: []inputInfo{
16091 {0, 4294901760},
16092 {1, 4294901760},
16093 {2, 4294901760},
16094 },
16095 outputs: []outputInfo{
16096 {0, 4294901760},
16097 },
16098 },
16099 },
16100 {
16101 name: "AND",
16102 argLen: 2,
16103 commutative: true,
16104 asm: arm.AAND,
16105 reg: regInfo{
16106 inputs: []inputInfo{
16107 {0, 22527},
16108 {1, 22527},
16109 },
16110 outputs: []outputInfo{
16111 {0, 21503},
16112 },
16113 },
16114 },
16115 {
16116 name: "ANDconst",
16117 auxType: auxInt32,
16118 argLen: 1,
16119 asm: arm.AAND,
16120 reg: regInfo{
16121 inputs: []inputInfo{
16122 {0, 22527},
16123 },
16124 outputs: []outputInfo{
16125 {0, 21503},
16126 },
16127 },
16128 },
16129 {
16130 name: "OR",
16131 argLen: 2,
16132 commutative: true,
16133 asm: arm.AORR,
16134 reg: regInfo{
16135 inputs: []inputInfo{
16136 {0, 22527},
16137 {1, 22527},
16138 },
16139 outputs: []outputInfo{
16140 {0, 21503},
16141 },
16142 },
16143 },
16144 {
16145 name: "ORconst",
16146 auxType: auxInt32,
16147 argLen: 1,
16148 asm: arm.AORR,
16149 reg: regInfo{
16150 inputs: []inputInfo{
16151 {0, 22527},
16152 },
16153 outputs: []outputInfo{
16154 {0, 21503},
16155 },
16156 },
16157 },
16158 {
16159 name: "XOR",
16160 argLen: 2,
16161 commutative: true,
16162 asm: arm.AEOR,
16163 reg: regInfo{
16164 inputs: []inputInfo{
16165 {0, 22527},
16166 {1, 22527},
16167 },
16168 outputs: []outputInfo{
16169 {0, 21503},
16170 },
16171 },
16172 },
16173 {
16174 name: "XORconst",
16175 auxType: auxInt32,
16176 argLen: 1,
16177 asm: arm.AEOR,
16178 reg: regInfo{
16179 inputs: []inputInfo{
16180 {0, 22527},
16181 },
16182 outputs: []outputInfo{
16183 {0, 21503},
16184 },
16185 },
16186 },
16187 {
16188 name: "BIC",
16189 argLen: 2,
16190 asm: arm.ABIC,
16191 reg: regInfo{
16192 inputs: []inputInfo{
16193 {0, 22527},
16194 {1, 22527},
16195 },
16196 outputs: []outputInfo{
16197 {0, 21503},
16198 },
16199 },
16200 },
16201 {
16202 name: "BICconst",
16203 auxType: auxInt32,
16204 argLen: 1,
16205 asm: arm.ABIC,
16206 reg: regInfo{
16207 inputs: []inputInfo{
16208 {0, 22527},
16209 },
16210 outputs: []outputInfo{
16211 {0, 21503},
16212 },
16213 },
16214 },
16215 {
16216 name: "BFX",
16217 auxType: auxInt32,
16218 argLen: 1,
16219 asm: arm.ABFX,
16220 reg: regInfo{
16221 inputs: []inputInfo{
16222 {0, 22527},
16223 },
16224 outputs: []outputInfo{
16225 {0, 21503},
16226 },
16227 },
16228 },
16229 {
16230 name: "BFXU",
16231 auxType: auxInt32,
16232 argLen: 1,
16233 asm: arm.ABFXU,
16234 reg: regInfo{
16235 inputs: []inputInfo{
16236 {0, 22527},
16237 },
16238 outputs: []outputInfo{
16239 {0, 21503},
16240 },
16241 },
16242 },
16243 {
16244 name: "MVN",
16245 argLen: 1,
16246 asm: arm.AMVN,
16247 reg: regInfo{
16248 inputs: []inputInfo{
16249 {0, 22527},
16250 },
16251 outputs: []outputInfo{
16252 {0, 21503},
16253 },
16254 },
16255 },
16256 {
16257 name: "NEGF",
16258 argLen: 1,
16259 asm: arm.ANEGF,
16260 reg: regInfo{
16261 inputs: []inputInfo{
16262 {0, 4294901760},
16263 },
16264 outputs: []outputInfo{
16265 {0, 4294901760},
16266 },
16267 },
16268 },
16269 {
16270 name: "NEGD",
16271 argLen: 1,
16272 asm: arm.ANEGD,
16273 reg: regInfo{
16274 inputs: []inputInfo{
16275 {0, 4294901760},
16276 },
16277 outputs: []outputInfo{
16278 {0, 4294901760},
16279 },
16280 },
16281 },
16282 {
16283 name: "SQRTD",
16284 argLen: 1,
16285 asm: arm.ASQRTD,
16286 reg: regInfo{
16287 inputs: []inputInfo{
16288 {0, 4294901760},
16289 },
16290 outputs: []outputInfo{
16291 {0, 4294901760},
16292 },
16293 },
16294 },
16295 {
16296 name: "SQRTF",
16297 argLen: 1,
16298 asm: arm.ASQRTF,
16299 reg: regInfo{
16300 inputs: []inputInfo{
16301 {0, 4294901760},
16302 },
16303 outputs: []outputInfo{
16304 {0, 4294901760},
16305 },
16306 },
16307 },
16308 {
16309 name: "ABSD",
16310 argLen: 1,
16311 asm: arm.AABSD,
16312 reg: regInfo{
16313 inputs: []inputInfo{
16314 {0, 4294901760},
16315 },
16316 outputs: []outputInfo{
16317 {0, 4294901760},
16318 },
16319 },
16320 },
16321 {
16322 name: "CLZ",
16323 argLen: 1,
16324 asm: arm.ACLZ,
16325 reg: regInfo{
16326 inputs: []inputInfo{
16327 {0, 22527},
16328 },
16329 outputs: []outputInfo{
16330 {0, 21503},
16331 },
16332 },
16333 },
16334 {
16335 name: "REV",
16336 argLen: 1,
16337 asm: arm.AREV,
16338 reg: regInfo{
16339 inputs: []inputInfo{
16340 {0, 22527},
16341 },
16342 outputs: []outputInfo{
16343 {0, 21503},
16344 },
16345 },
16346 },
16347 {
16348 name: "REV16",
16349 argLen: 1,
16350 asm: arm.AREV16,
16351 reg: regInfo{
16352 inputs: []inputInfo{
16353 {0, 22527},
16354 },
16355 outputs: []outputInfo{
16356 {0, 21503},
16357 },
16358 },
16359 },
16360 {
16361 name: "RBIT",
16362 argLen: 1,
16363 asm: arm.ARBIT,
16364 reg: regInfo{
16365 inputs: []inputInfo{
16366 {0, 22527},
16367 },
16368 outputs: []outputInfo{
16369 {0, 21503},
16370 },
16371 },
16372 },
16373 {
16374 name: "SLL",
16375 argLen: 2,
16376 asm: arm.ASLL,
16377 reg: regInfo{
16378 inputs: []inputInfo{
16379 {0, 22527},
16380 {1, 22527},
16381 },
16382 outputs: []outputInfo{
16383 {0, 21503},
16384 },
16385 },
16386 },
16387 {
16388 name: "SLLconst",
16389 auxType: auxInt32,
16390 argLen: 1,
16391 asm: arm.ASLL,
16392 reg: regInfo{
16393 inputs: []inputInfo{
16394 {0, 22527},
16395 },
16396 outputs: []outputInfo{
16397 {0, 21503},
16398 },
16399 },
16400 },
16401 {
16402 name: "SRL",
16403 argLen: 2,
16404 asm: arm.ASRL,
16405 reg: regInfo{
16406 inputs: []inputInfo{
16407 {0, 22527},
16408 {1, 22527},
16409 },
16410 outputs: []outputInfo{
16411 {0, 21503},
16412 },
16413 },
16414 },
16415 {
16416 name: "SRLconst",
16417 auxType: auxInt32,
16418 argLen: 1,
16419 asm: arm.ASRL,
16420 reg: regInfo{
16421 inputs: []inputInfo{
16422 {0, 22527},
16423 },
16424 outputs: []outputInfo{
16425 {0, 21503},
16426 },
16427 },
16428 },
16429 {
16430 name: "SRA",
16431 argLen: 2,
16432 asm: arm.ASRA,
16433 reg: regInfo{
16434 inputs: []inputInfo{
16435 {0, 22527},
16436 {1, 22527},
16437 },
16438 outputs: []outputInfo{
16439 {0, 21503},
16440 },
16441 },
16442 },
16443 {
16444 name: "SRAconst",
16445 auxType: auxInt32,
16446 argLen: 1,
16447 asm: arm.ASRA,
16448 reg: regInfo{
16449 inputs: []inputInfo{
16450 {0, 22527},
16451 },
16452 outputs: []outputInfo{
16453 {0, 21503},
16454 },
16455 },
16456 },
16457 {
16458 name: "SRR",
16459 argLen: 2,
16460 reg: regInfo{
16461 inputs: []inputInfo{
16462 {0, 22527},
16463 {1, 22527},
16464 },
16465 outputs: []outputInfo{
16466 {0, 21503},
16467 },
16468 },
16469 },
16470 {
16471 name: "SRRconst",
16472 auxType: auxInt32,
16473 argLen: 1,
16474 reg: regInfo{
16475 inputs: []inputInfo{
16476 {0, 22527},
16477 },
16478 outputs: []outputInfo{
16479 {0, 21503},
16480 },
16481 },
16482 },
16483 {
16484 name: "ADDshiftLL",
16485 auxType: auxInt32,
16486 argLen: 2,
16487 asm: arm.AADD,
16488 reg: regInfo{
16489 inputs: []inputInfo{
16490 {0, 22527},
16491 {1, 22527},
16492 },
16493 outputs: []outputInfo{
16494 {0, 21503},
16495 },
16496 },
16497 },
16498 {
16499 name: "ADDshiftRL",
16500 auxType: auxInt32,
16501 argLen: 2,
16502 asm: arm.AADD,
16503 reg: regInfo{
16504 inputs: []inputInfo{
16505 {0, 22527},
16506 {1, 22527},
16507 },
16508 outputs: []outputInfo{
16509 {0, 21503},
16510 },
16511 },
16512 },
16513 {
16514 name: "ADDshiftRA",
16515 auxType: auxInt32,
16516 argLen: 2,
16517 asm: arm.AADD,
16518 reg: regInfo{
16519 inputs: []inputInfo{
16520 {0, 22527},
16521 {1, 22527},
16522 },
16523 outputs: []outputInfo{
16524 {0, 21503},
16525 },
16526 },
16527 },
16528 {
16529 name: "SUBshiftLL",
16530 auxType: auxInt32,
16531 argLen: 2,
16532 asm: arm.ASUB,
16533 reg: regInfo{
16534 inputs: []inputInfo{
16535 {0, 22527},
16536 {1, 22527},
16537 },
16538 outputs: []outputInfo{
16539 {0, 21503},
16540 },
16541 },
16542 },
16543 {
16544 name: "SUBshiftRL",
16545 auxType: auxInt32,
16546 argLen: 2,
16547 asm: arm.ASUB,
16548 reg: regInfo{
16549 inputs: []inputInfo{
16550 {0, 22527},
16551 {1, 22527},
16552 },
16553 outputs: []outputInfo{
16554 {0, 21503},
16555 },
16556 },
16557 },
16558 {
16559 name: "SUBshiftRA",
16560 auxType: auxInt32,
16561 argLen: 2,
16562 asm: arm.ASUB,
16563 reg: regInfo{
16564 inputs: []inputInfo{
16565 {0, 22527},
16566 {1, 22527},
16567 },
16568 outputs: []outputInfo{
16569 {0, 21503},
16570 },
16571 },
16572 },
16573 {
16574 name: "RSBshiftLL",
16575 auxType: auxInt32,
16576 argLen: 2,
16577 asm: arm.ARSB,
16578 reg: regInfo{
16579 inputs: []inputInfo{
16580 {0, 22527},
16581 {1, 22527},
16582 },
16583 outputs: []outputInfo{
16584 {0, 21503},
16585 },
16586 },
16587 },
16588 {
16589 name: "RSBshiftRL",
16590 auxType: auxInt32,
16591 argLen: 2,
16592 asm: arm.ARSB,
16593 reg: regInfo{
16594 inputs: []inputInfo{
16595 {0, 22527},
16596 {1, 22527},
16597 },
16598 outputs: []outputInfo{
16599 {0, 21503},
16600 },
16601 },
16602 },
16603 {
16604 name: "RSBshiftRA",
16605 auxType: auxInt32,
16606 argLen: 2,
16607 asm: arm.ARSB,
16608 reg: regInfo{
16609 inputs: []inputInfo{
16610 {0, 22527},
16611 {1, 22527},
16612 },
16613 outputs: []outputInfo{
16614 {0, 21503},
16615 },
16616 },
16617 },
16618 {
16619 name: "ANDshiftLL",
16620 auxType: auxInt32,
16621 argLen: 2,
16622 asm: arm.AAND,
16623 reg: regInfo{
16624 inputs: []inputInfo{
16625 {0, 22527},
16626 {1, 22527},
16627 },
16628 outputs: []outputInfo{
16629 {0, 21503},
16630 },
16631 },
16632 },
16633 {
16634 name: "ANDshiftRL",
16635 auxType: auxInt32,
16636 argLen: 2,
16637 asm: arm.AAND,
16638 reg: regInfo{
16639 inputs: []inputInfo{
16640 {0, 22527},
16641 {1, 22527},
16642 },
16643 outputs: []outputInfo{
16644 {0, 21503},
16645 },
16646 },
16647 },
16648 {
16649 name: "ANDshiftRA",
16650 auxType: auxInt32,
16651 argLen: 2,
16652 asm: arm.AAND,
16653 reg: regInfo{
16654 inputs: []inputInfo{
16655 {0, 22527},
16656 {1, 22527},
16657 },
16658 outputs: []outputInfo{
16659 {0, 21503},
16660 },
16661 },
16662 },
16663 {
16664 name: "ORshiftLL",
16665 auxType: auxInt32,
16666 argLen: 2,
16667 asm: arm.AORR,
16668 reg: regInfo{
16669 inputs: []inputInfo{
16670 {0, 22527},
16671 {1, 22527},
16672 },
16673 outputs: []outputInfo{
16674 {0, 21503},
16675 },
16676 },
16677 },
16678 {
16679 name: "ORshiftRL",
16680 auxType: auxInt32,
16681 argLen: 2,
16682 asm: arm.AORR,
16683 reg: regInfo{
16684 inputs: []inputInfo{
16685 {0, 22527},
16686 {1, 22527},
16687 },
16688 outputs: []outputInfo{
16689 {0, 21503},
16690 },
16691 },
16692 },
16693 {
16694 name: "ORshiftRA",
16695 auxType: auxInt32,
16696 argLen: 2,
16697 asm: arm.AORR,
16698 reg: regInfo{
16699 inputs: []inputInfo{
16700 {0, 22527},
16701 {1, 22527},
16702 },
16703 outputs: []outputInfo{
16704 {0, 21503},
16705 },
16706 },
16707 },
16708 {
16709 name: "XORshiftLL",
16710 auxType: auxInt32,
16711 argLen: 2,
16712 asm: arm.AEOR,
16713 reg: regInfo{
16714 inputs: []inputInfo{
16715 {0, 22527},
16716 {1, 22527},
16717 },
16718 outputs: []outputInfo{
16719 {0, 21503},
16720 },
16721 },
16722 },
16723 {
16724 name: "XORshiftRL",
16725 auxType: auxInt32,
16726 argLen: 2,
16727 asm: arm.AEOR,
16728 reg: regInfo{
16729 inputs: []inputInfo{
16730 {0, 22527},
16731 {1, 22527},
16732 },
16733 outputs: []outputInfo{
16734 {0, 21503},
16735 },
16736 },
16737 },
16738 {
16739 name: "XORshiftRA",
16740 auxType: auxInt32,
16741 argLen: 2,
16742 asm: arm.AEOR,
16743 reg: regInfo{
16744 inputs: []inputInfo{
16745 {0, 22527},
16746 {1, 22527},
16747 },
16748 outputs: []outputInfo{
16749 {0, 21503},
16750 },
16751 },
16752 },
16753 {
16754 name: "XORshiftRR",
16755 auxType: auxInt32,
16756 argLen: 2,
16757 asm: arm.AEOR,
16758 reg: regInfo{
16759 inputs: []inputInfo{
16760 {0, 22527},
16761 {1, 22527},
16762 },
16763 outputs: []outputInfo{
16764 {0, 21503},
16765 },
16766 },
16767 },
16768 {
16769 name: "BICshiftLL",
16770 auxType: auxInt32,
16771 argLen: 2,
16772 asm: arm.ABIC,
16773 reg: regInfo{
16774 inputs: []inputInfo{
16775 {0, 22527},
16776 {1, 22527},
16777 },
16778 outputs: []outputInfo{
16779 {0, 21503},
16780 },
16781 },
16782 },
16783 {
16784 name: "BICshiftRL",
16785 auxType: auxInt32,
16786 argLen: 2,
16787 asm: arm.ABIC,
16788 reg: regInfo{
16789 inputs: []inputInfo{
16790 {0, 22527},
16791 {1, 22527},
16792 },
16793 outputs: []outputInfo{
16794 {0, 21503},
16795 },
16796 },
16797 },
16798 {
16799 name: "BICshiftRA",
16800 auxType: auxInt32,
16801 argLen: 2,
16802 asm: arm.ABIC,
16803 reg: regInfo{
16804 inputs: []inputInfo{
16805 {0, 22527},
16806 {1, 22527},
16807 },
16808 outputs: []outputInfo{
16809 {0, 21503},
16810 },
16811 },
16812 },
16813 {
16814 name: "MVNshiftLL",
16815 auxType: auxInt32,
16816 argLen: 1,
16817 asm: arm.AMVN,
16818 reg: regInfo{
16819 inputs: []inputInfo{
16820 {0, 22527},
16821 },
16822 outputs: []outputInfo{
16823 {0, 21503},
16824 },
16825 },
16826 },
16827 {
16828 name: "MVNshiftRL",
16829 auxType: auxInt32,
16830 argLen: 1,
16831 asm: arm.AMVN,
16832 reg: regInfo{
16833 inputs: []inputInfo{
16834 {0, 22527},
16835 },
16836 outputs: []outputInfo{
16837 {0, 21503},
16838 },
16839 },
16840 },
16841 {
16842 name: "MVNshiftRA",
16843 auxType: auxInt32,
16844 argLen: 1,
16845 asm: arm.AMVN,
16846 reg: regInfo{
16847 inputs: []inputInfo{
16848 {0, 22527},
16849 },
16850 outputs: []outputInfo{
16851 {0, 21503},
16852 },
16853 },
16854 },
16855 {
16856 name: "ADCshiftLL",
16857 auxType: auxInt32,
16858 argLen: 3,
16859 asm: arm.AADC,
16860 reg: regInfo{
16861 inputs: []inputInfo{
16862 {0, 21503},
16863 {1, 21503},
16864 },
16865 outputs: []outputInfo{
16866 {0, 21503},
16867 },
16868 },
16869 },
16870 {
16871 name: "ADCshiftRL",
16872 auxType: auxInt32,
16873 argLen: 3,
16874 asm: arm.AADC,
16875 reg: regInfo{
16876 inputs: []inputInfo{
16877 {0, 21503},
16878 {1, 21503},
16879 },
16880 outputs: []outputInfo{
16881 {0, 21503},
16882 },
16883 },
16884 },
16885 {
16886 name: "ADCshiftRA",
16887 auxType: auxInt32,
16888 argLen: 3,
16889 asm: arm.AADC,
16890 reg: regInfo{
16891 inputs: []inputInfo{
16892 {0, 21503},
16893 {1, 21503},
16894 },
16895 outputs: []outputInfo{
16896 {0, 21503},
16897 },
16898 },
16899 },
16900 {
16901 name: "SBCshiftLL",
16902 auxType: auxInt32,
16903 argLen: 3,
16904 asm: arm.ASBC,
16905 reg: regInfo{
16906 inputs: []inputInfo{
16907 {0, 21503},
16908 {1, 21503},
16909 },
16910 outputs: []outputInfo{
16911 {0, 21503},
16912 },
16913 },
16914 },
16915 {
16916 name: "SBCshiftRL",
16917 auxType: auxInt32,
16918 argLen: 3,
16919 asm: arm.ASBC,
16920 reg: regInfo{
16921 inputs: []inputInfo{
16922 {0, 21503},
16923 {1, 21503},
16924 },
16925 outputs: []outputInfo{
16926 {0, 21503},
16927 },
16928 },
16929 },
16930 {
16931 name: "SBCshiftRA",
16932 auxType: auxInt32,
16933 argLen: 3,
16934 asm: arm.ASBC,
16935 reg: regInfo{
16936 inputs: []inputInfo{
16937 {0, 21503},
16938 {1, 21503},
16939 },
16940 outputs: []outputInfo{
16941 {0, 21503},
16942 },
16943 },
16944 },
16945 {
16946 name: "RSCshiftLL",
16947 auxType: auxInt32,
16948 argLen: 3,
16949 asm: arm.ARSC,
16950 reg: regInfo{
16951 inputs: []inputInfo{
16952 {0, 21503},
16953 {1, 21503},
16954 },
16955 outputs: []outputInfo{
16956 {0, 21503},
16957 },
16958 },
16959 },
16960 {
16961 name: "RSCshiftRL",
16962 auxType: auxInt32,
16963 argLen: 3,
16964 asm: arm.ARSC,
16965 reg: regInfo{
16966 inputs: []inputInfo{
16967 {0, 21503},
16968 {1, 21503},
16969 },
16970 outputs: []outputInfo{
16971 {0, 21503},
16972 },
16973 },
16974 },
16975 {
16976 name: "RSCshiftRA",
16977 auxType: auxInt32,
16978 argLen: 3,
16979 asm: arm.ARSC,
16980 reg: regInfo{
16981 inputs: []inputInfo{
16982 {0, 21503},
16983 {1, 21503},
16984 },
16985 outputs: []outputInfo{
16986 {0, 21503},
16987 },
16988 },
16989 },
16990 {
16991 name: "ADDSshiftLL",
16992 auxType: auxInt32,
16993 argLen: 2,
16994 asm: arm.AADD,
16995 reg: regInfo{
16996 inputs: []inputInfo{
16997 {0, 22527},
16998 {1, 22527},
16999 },
17000 outputs: []outputInfo{
17001 {1, 0},
17002 {0, 21503},
17003 },
17004 },
17005 },
17006 {
17007 name: "ADDSshiftRL",
17008 auxType: auxInt32,
17009 argLen: 2,
17010 asm: arm.AADD,
17011 reg: regInfo{
17012 inputs: []inputInfo{
17013 {0, 22527},
17014 {1, 22527},
17015 },
17016 outputs: []outputInfo{
17017 {1, 0},
17018 {0, 21503},
17019 },
17020 },
17021 },
17022 {
17023 name: "ADDSshiftRA",
17024 auxType: auxInt32,
17025 argLen: 2,
17026 asm: arm.AADD,
17027 reg: regInfo{
17028 inputs: []inputInfo{
17029 {0, 22527},
17030 {1, 22527},
17031 },
17032 outputs: []outputInfo{
17033 {1, 0},
17034 {0, 21503},
17035 },
17036 },
17037 },
17038 {
17039 name: "SUBSshiftLL",
17040 auxType: auxInt32,
17041 argLen: 2,
17042 asm: arm.ASUB,
17043 reg: regInfo{
17044 inputs: []inputInfo{
17045 {0, 22527},
17046 {1, 22527},
17047 },
17048 outputs: []outputInfo{
17049 {1, 0},
17050 {0, 21503},
17051 },
17052 },
17053 },
17054 {
17055 name: "SUBSshiftRL",
17056 auxType: auxInt32,
17057 argLen: 2,
17058 asm: arm.ASUB,
17059 reg: regInfo{
17060 inputs: []inputInfo{
17061 {0, 22527},
17062 {1, 22527},
17063 },
17064 outputs: []outputInfo{
17065 {1, 0},
17066 {0, 21503},
17067 },
17068 },
17069 },
17070 {
17071 name: "SUBSshiftRA",
17072 auxType: auxInt32,
17073 argLen: 2,
17074 asm: arm.ASUB,
17075 reg: regInfo{
17076 inputs: []inputInfo{
17077 {0, 22527},
17078 {1, 22527},
17079 },
17080 outputs: []outputInfo{
17081 {1, 0},
17082 {0, 21503},
17083 },
17084 },
17085 },
17086 {
17087 name: "RSBSshiftLL",
17088 auxType: auxInt32,
17089 argLen: 2,
17090 asm: arm.ARSB,
17091 reg: regInfo{
17092 inputs: []inputInfo{
17093 {0, 22527},
17094 {1, 22527},
17095 },
17096 outputs: []outputInfo{
17097 {1, 0},
17098 {0, 21503},
17099 },
17100 },
17101 },
17102 {
17103 name: "RSBSshiftRL",
17104 auxType: auxInt32,
17105 argLen: 2,
17106 asm: arm.ARSB,
17107 reg: regInfo{
17108 inputs: []inputInfo{
17109 {0, 22527},
17110 {1, 22527},
17111 },
17112 outputs: []outputInfo{
17113 {1, 0},
17114 {0, 21503},
17115 },
17116 },
17117 },
17118 {
17119 name: "RSBSshiftRA",
17120 auxType: auxInt32,
17121 argLen: 2,
17122 asm: arm.ARSB,
17123 reg: regInfo{
17124 inputs: []inputInfo{
17125 {0, 22527},
17126 {1, 22527},
17127 },
17128 outputs: []outputInfo{
17129 {1, 0},
17130 {0, 21503},
17131 },
17132 },
17133 },
17134 {
17135 name: "ADDshiftLLreg",
17136 argLen: 3,
17137 asm: arm.AADD,
17138 reg: regInfo{
17139 inputs: []inputInfo{
17140 {0, 21503},
17141 {1, 21503},
17142 {2, 21503},
17143 },
17144 outputs: []outputInfo{
17145 {0, 21503},
17146 },
17147 },
17148 },
17149 {
17150 name: "ADDshiftRLreg",
17151 argLen: 3,
17152 asm: arm.AADD,
17153 reg: regInfo{
17154 inputs: []inputInfo{
17155 {0, 21503},
17156 {1, 21503},
17157 {2, 21503},
17158 },
17159 outputs: []outputInfo{
17160 {0, 21503},
17161 },
17162 },
17163 },
17164 {
17165 name: "ADDshiftRAreg",
17166 argLen: 3,
17167 asm: arm.AADD,
17168 reg: regInfo{
17169 inputs: []inputInfo{
17170 {0, 21503},
17171 {1, 21503},
17172 {2, 21503},
17173 },
17174 outputs: []outputInfo{
17175 {0, 21503},
17176 },
17177 },
17178 },
17179 {
17180 name: "SUBshiftLLreg",
17181 argLen: 3,
17182 asm: arm.ASUB,
17183 reg: regInfo{
17184 inputs: []inputInfo{
17185 {0, 21503},
17186 {1, 21503},
17187 {2, 21503},
17188 },
17189 outputs: []outputInfo{
17190 {0, 21503},
17191 },
17192 },
17193 },
17194 {
17195 name: "SUBshiftRLreg",
17196 argLen: 3,
17197 asm: arm.ASUB,
17198 reg: regInfo{
17199 inputs: []inputInfo{
17200 {0, 21503},
17201 {1, 21503},
17202 {2, 21503},
17203 },
17204 outputs: []outputInfo{
17205 {0, 21503},
17206 },
17207 },
17208 },
17209 {
17210 name: "SUBshiftRAreg",
17211 argLen: 3,
17212 asm: arm.ASUB,
17213 reg: regInfo{
17214 inputs: []inputInfo{
17215 {0, 21503},
17216 {1, 21503},
17217 {2, 21503},
17218 },
17219 outputs: []outputInfo{
17220 {0, 21503},
17221 },
17222 },
17223 },
17224 {
17225 name: "RSBshiftLLreg",
17226 argLen: 3,
17227 asm: arm.ARSB,
17228 reg: regInfo{
17229 inputs: []inputInfo{
17230 {0, 21503},
17231 {1, 21503},
17232 {2, 21503},
17233 },
17234 outputs: []outputInfo{
17235 {0, 21503},
17236 },
17237 },
17238 },
17239 {
17240 name: "RSBshiftRLreg",
17241 argLen: 3,
17242 asm: arm.ARSB,
17243 reg: regInfo{
17244 inputs: []inputInfo{
17245 {0, 21503},
17246 {1, 21503},
17247 {2, 21503},
17248 },
17249 outputs: []outputInfo{
17250 {0, 21503},
17251 },
17252 },
17253 },
17254 {
17255 name: "RSBshiftRAreg",
17256 argLen: 3,
17257 asm: arm.ARSB,
17258 reg: regInfo{
17259 inputs: []inputInfo{
17260 {0, 21503},
17261 {1, 21503},
17262 {2, 21503},
17263 },
17264 outputs: []outputInfo{
17265 {0, 21503},
17266 },
17267 },
17268 },
17269 {
17270 name: "ANDshiftLLreg",
17271 argLen: 3,
17272 asm: arm.AAND,
17273 reg: regInfo{
17274 inputs: []inputInfo{
17275 {0, 21503},
17276 {1, 21503},
17277 {2, 21503},
17278 },
17279 outputs: []outputInfo{
17280 {0, 21503},
17281 },
17282 },
17283 },
17284 {
17285 name: "ANDshiftRLreg",
17286 argLen: 3,
17287 asm: arm.AAND,
17288 reg: regInfo{
17289 inputs: []inputInfo{
17290 {0, 21503},
17291 {1, 21503},
17292 {2, 21503},
17293 },
17294 outputs: []outputInfo{
17295 {0, 21503},
17296 },
17297 },
17298 },
17299 {
17300 name: "ANDshiftRAreg",
17301 argLen: 3,
17302 asm: arm.AAND,
17303 reg: regInfo{
17304 inputs: []inputInfo{
17305 {0, 21503},
17306 {1, 21503},
17307 {2, 21503},
17308 },
17309 outputs: []outputInfo{
17310 {0, 21503},
17311 },
17312 },
17313 },
17314 {
17315 name: "ORshiftLLreg",
17316 argLen: 3,
17317 asm: arm.AORR,
17318 reg: regInfo{
17319 inputs: []inputInfo{
17320 {0, 21503},
17321 {1, 21503},
17322 {2, 21503},
17323 },
17324 outputs: []outputInfo{
17325 {0, 21503},
17326 },
17327 },
17328 },
17329 {
17330 name: "ORshiftRLreg",
17331 argLen: 3,
17332 asm: arm.AORR,
17333 reg: regInfo{
17334 inputs: []inputInfo{
17335 {0, 21503},
17336 {1, 21503},
17337 {2, 21503},
17338 },
17339 outputs: []outputInfo{
17340 {0, 21503},
17341 },
17342 },
17343 },
17344 {
17345 name: "ORshiftRAreg",
17346 argLen: 3,
17347 asm: arm.AORR,
17348 reg: regInfo{
17349 inputs: []inputInfo{
17350 {0, 21503},
17351 {1, 21503},
17352 {2, 21503},
17353 },
17354 outputs: []outputInfo{
17355 {0, 21503},
17356 },
17357 },
17358 },
17359 {
17360 name: "XORshiftLLreg",
17361 argLen: 3,
17362 asm: arm.AEOR,
17363 reg: regInfo{
17364 inputs: []inputInfo{
17365 {0, 21503},
17366 {1, 21503},
17367 {2, 21503},
17368 },
17369 outputs: []outputInfo{
17370 {0, 21503},
17371 },
17372 },
17373 },
17374 {
17375 name: "XORshiftRLreg",
17376 argLen: 3,
17377 asm: arm.AEOR,
17378 reg: regInfo{
17379 inputs: []inputInfo{
17380 {0, 21503},
17381 {1, 21503},
17382 {2, 21503},
17383 },
17384 outputs: []outputInfo{
17385 {0, 21503},
17386 },
17387 },
17388 },
17389 {
17390 name: "XORshiftRAreg",
17391 argLen: 3,
17392 asm: arm.AEOR,
17393 reg: regInfo{
17394 inputs: []inputInfo{
17395 {0, 21503},
17396 {1, 21503},
17397 {2, 21503},
17398 },
17399 outputs: []outputInfo{
17400 {0, 21503},
17401 },
17402 },
17403 },
17404 {
17405 name: "BICshiftLLreg",
17406 argLen: 3,
17407 asm: arm.ABIC,
17408 reg: regInfo{
17409 inputs: []inputInfo{
17410 {0, 21503},
17411 {1, 21503},
17412 {2, 21503},
17413 },
17414 outputs: []outputInfo{
17415 {0, 21503},
17416 },
17417 },
17418 },
17419 {
17420 name: "BICshiftRLreg",
17421 argLen: 3,
17422 asm: arm.ABIC,
17423 reg: regInfo{
17424 inputs: []inputInfo{
17425 {0, 21503},
17426 {1, 21503},
17427 {2, 21503},
17428 },
17429 outputs: []outputInfo{
17430 {0, 21503},
17431 },
17432 },
17433 },
17434 {
17435 name: "BICshiftRAreg",
17436 argLen: 3,
17437 asm: arm.ABIC,
17438 reg: regInfo{
17439 inputs: []inputInfo{
17440 {0, 21503},
17441 {1, 21503},
17442 {2, 21503},
17443 },
17444 outputs: []outputInfo{
17445 {0, 21503},
17446 },
17447 },
17448 },
17449 {
17450 name: "MVNshiftLLreg",
17451 argLen: 2,
17452 asm: arm.AMVN,
17453 reg: regInfo{
17454 inputs: []inputInfo{
17455 {0, 22527},
17456 {1, 22527},
17457 },
17458 outputs: []outputInfo{
17459 {0, 21503},
17460 },
17461 },
17462 },
17463 {
17464 name: "MVNshiftRLreg",
17465 argLen: 2,
17466 asm: arm.AMVN,
17467 reg: regInfo{
17468 inputs: []inputInfo{
17469 {0, 22527},
17470 {1, 22527},
17471 },
17472 outputs: []outputInfo{
17473 {0, 21503},
17474 },
17475 },
17476 },
17477 {
17478 name: "MVNshiftRAreg",
17479 argLen: 2,
17480 asm: arm.AMVN,
17481 reg: regInfo{
17482 inputs: []inputInfo{
17483 {0, 22527},
17484 {1, 22527},
17485 },
17486 outputs: []outputInfo{
17487 {0, 21503},
17488 },
17489 },
17490 },
17491 {
17492 name: "ADCshiftLLreg",
17493 argLen: 4,
17494 asm: arm.AADC,
17495 reg: regInfo{
17496 inputs: []inputInfo{
17497 {0, 21503},
17498 {1, 21503},
17499 {2, 21503},
17500 },
17501 outputs: []outputInfo{
17502 {0, 21503},
17503 },
17504 },
17505 },
17506 {
17507 name: "ADCshiftRLreg",
17508 argLen: 4,
17509 asm: arm.AADC,
17510 reg: regInfo{
17511 inputs: []inputInfo{
17512 {0, 21503},
17513 {1, 21503},
17514 {2, 21503},
17515 },
17516 outputs: []outputInfo{
17517 {0, 21503},
17518 },
17519 },
17520 },
17521 {
17522 name: "ADCshiftRAreg",
17523 argLen: 4,
17524 asm: arm.AADC,
17525 reg: regInfo{
17526 inputs: []inputInfo{
17527 {0, 21503},
17528 {1, 21503},
17529 {2, 21503},
17530 },
17531 outputs: []outputInfo{
17532 {0, 21503},
17533 },
17534 },
17535 },
17536 {
17537 name: "SBCshiftLLreg",
17538 argLen: 4,
17539 asm: arm.ASBC,
17540 reg: regInfo{
17541 inputs: []inputInfo{
17542 {0, 21503},
17543 {1, 21503},
17544 {2, 21503},
17545 },
17546 outputs: []outputInfo{
17547 {0, 21503},
17548 },
17549 },
17550 },
17551 {
17552 name: "SBCshiftRLreg",
17553 argLen: 4,
17554 asm: arm.ASBC,
17555 reg: regInfo{
17556 inputs: []inputInfo{
17557 {0, 21503},
17558 {1, 21503},
17559 {2, 21503},
17560 },
17561 outputs: []outputInfo{
17562 {0, 21503},
17563 },
17564 },
17565 },
17566 {
17567 name: "SBCshiftRAreg",
17568 argLen: 4,
17569 asm: arm.ASBC,
17570 reg: regInfo{
17571 inputs: []inputInfo{
17572 {0, 21503},
17573 {1, 21503},
17574 {2, 21503},
17575 },
17576 outputs: []outputInfo{
17577 {0, 21503},
17578 },
17579 },
17580 },
17581 {
17582 name: "RSCshiftLLreg",
17583 argLen: 4,
17584 asm: arm.ARSC,
17585 reg: regInfo{
17586 inputs: []inputInfo{
17587 {0, 21503},
17588 {1, 21503},
17589 {2, 21503},
17590 },
17591 outputs: []outputInfo{
17592 {0, 21503},
17593 },
17594 },
17595 },
17596 {
17597 name: "RSCshiftRLreg",
17598 argLen: 4,
17599 asm: arm.ARSC,
17600 reg: regInfo{
17601 inputs: []inputInfo{
17602 {0, 21503},
17603 {1, 21503},
17604 {2, 21503},
17605 },
17606 outputs: []outputInfo{
17607 {0, 21503},
17608 },
17609 },
17610 },
17611 {
17612 name: "RSCshiftRAreg",
17613 argLen: 4,
17614 asm: arm.ARSC,
17615 reg: regInfo{
17616 inputs: []inputInfo{
17617 {0, 21503},
17618 {1, 21503},
17619 {2, 21503},
17620 },
17621 outputs: []outputInfo{
17622 {0, 21503},
17623 },
17624 },
17625 },
17626 {
17627 name: "ADDSshiftLLreg",
17628 argLen: 3,
17629 asm: arm.AADD,
17630 reg: regInfo{
17631 inputs: []inputInfo{
17632 {0, 21503},
17633 {1, 21503},
17634 {2, 21503},
17635 },
17636 outputs: []outputInfo{
17637 {1, 0},
17638 {0, 21503},
17639 },
17640 },
17641 },
17642 {
17643 name: "ADDSshiftRLreg",
17644 argLen: 3,
17645 asm: arm.AADD,
17646 reg: regInfo{
17647 inputs: []inputInfo{
17648 {0, 21503},
17649 {1, 21503},
17650 {2, 21503},
17651 },
17652 outputs: []outputInfo{
17653 {1, 0},
17654 {0, 21503},
17655 },
17656 },
17657 },
17658 {
17659 name: "ADDSshiftRAreg",
17660 argLen: 3,
17661 asm: arm.AADD,
17662 reg: regInfo{
17663 inputs: []inputInfo{
17664 {0, 21503},
17665 {1, 21503},
17666 {2, 21503},
17667 },
17668 outputs: []outputInfo{
17669 {1, 0},
17670 {0, 21503},
17671 },
17672 },
17673 },
17674 {
17675 name: "SUBSshiftLLreg",
17676 argLen: 3,
17677 asm: arm.ASUB,
17678 reg: regInfo{
17679 inputs: []inputInfo{
17680 {0, 21503},
17681 {1, 21503},
17682 {2, 21503},
17683 },
17684 outputs: []outputInfo{
17685 {1, 0},
17686 {0, 21503},
17687 },
17688 },
17689 },
17690 {
17691 name: "SUBSshiftRLreg",
17692 argLen: 3,
17693 asm: arm.ASUB,
17694 reg: regInfo{
17695 inputs: []inputInfo{
17696 {0, 21503},
17697 {1, 21503},
17698 {2, 21503},
17699 },
17700 outputs: []outputInfo{
17701 {1, 0},
17702 {0, 21503},
17703 },
17704 },
17705 },
17706 {
17707 name: "SUBSshiftRAreg",
17708 argLen: 3,
17709 asm: arm.ASUB,
17710 reg: regInfo{
17711 inputs: []inputInfo{
17712 {0, 21503},
17713 {1, 21503},
17714 {2, 21503},
17715 },
17716 outputs: []outputInfo{
17717 {1, 0},
17718 {0, 21503},
17719 },
17720 },
17721 },
17722 {
17723 name: "RSBSshiftLLreg",
17724 argLen: 3,
17725 asm: arm.ARSB,
17726 reg: regInfo{
17727 inputs: []inputInfo{
17728 {0, 21503},
17729 {1, 21503},
17730 {2, 21503},
17731 },
17732 outputs: []outputInfo{
17733 {1, 0},
17734 {0, 21503},
17735 },
17736 },
17737 },
17738 {
17739 name: "RSBSshiftRLreg",
17740 argLen: 3,
17741 asm: arm.ARSB,
17742 reg: regInfo{
17743 inputs: []inputInfo{
17744 {0, 21503},
17745 {1, 21503},
17746 {2, 21503},
17747 },
17748 outputs: []outputInfo{
17749 {1, 0},
17750 {0, 21503},
17751 },
17752 },
17753 },
17754 {
17755 name: "RSBSshiftRAreg",
17756 argLen: 3,
17757 asm: arm.ARSB,
17758 reg: regInfo{
17759 inputs: []inputInfo{
17760 {0, 21503},
17761 {1, 21503},
17762 {2, 21503},
17763 },
17764 outputs: []outputInfo{
17765 {1, 0},
17766 {0, 21503},
17767 },
17768 },
17769 },
17770 {
17771 name: "CMP",
17772 argLen: 2,
17773 asm: arm.ACMP,
17774 reg: regInfo{
17775 inputs: []inputInfo{
17776 {0, 22527},
17777 {1, 22527},
17778 },
17779 },
17780 },
17781 {
17782 name: "CMPconst",
17783 auxType: auxInt32,
17784 argLen: 1,
17785 asm: arm.ACMP,
17786 reg: regInfo{
17787 inputs: []inputInfo{
17788 {0, 22527},
17789 },
17790 },
17791 },
17792 {
17793 name: "CMN",
17794 argLen: 2,
17795 commutative: true,
17796 asm: arm.ACMN,
17797 reg: regInfo{
17798 inputs: []inputInfo{
17799 {0, 22527},
17800 {1, 22527},
17801 },
17802 },
17803 },
17804 {
17805 name: "CMNconst",
17806 auxType: auxInt32,
17807 argLen: 1,
17808 asm: arm.ACMN,
17809 reg: regInfo{
17810 inputs: []inputInfo{
17811 {0, 22527},
17812 },
17813 },
17814 },
17815 {
17816 name: "TST",
17817 argLen: 2,
17818 commutative: true,
17819 asm: arm.ATST,
17820 reg: regInfo{
17821 inputs: []inputInfo{
17822 {0, 22527},
17823 {1, 22527},
17824 },
17825 },
17826 },
17827 {
17828 name: "TSTconst",
17829 auxType: auxInt32,
17830 argLen: 1,
17831 asm: arm.ATST,
17832 reg: regInfo{
17833 inputs: []inputInfo{
17834 {0, 22527},
17835 },
17836 },
17837 },
17838 {
17839 name: "TEQ",
17840 argLen: 2,
17841 commutative: true,
17842 asm: arm.ATEQ,
17843 reg: regInfo{
17844 inputs: []inputInfo{
17845 {0, 22527},
17846 {1, 22527},
17847 },
17848 },
17849 },
17850 {
17851 name: "TEQconst",
17852 auxType: auxInt32,
17853 argLen: 1,
17854 asm: arm.ATEQ,
17855 reg: regInfo{
17856 inputs: []inputInfo{
17857 {0, 22527},
17858 },
17859 },
17860 },
17861 {
17862 name: "CMPF",
17863 argLen: 2,
17864 asm: arm.ACMPF,
17865 reg: regInfo{
17866 inputs: []inputInfo{
17867 {0, 4294901760},
17868 {1, 4294901760},
17869 },
17870 },
17871 },
17872 {
17873 name: "CMPD",
17874 argLen: 2,
17875 asm: arm.ACMPD,
17876 reg: regInfo{
17877 inputs: []inputInfo{
17878 {0, 4294901760},
17879 {1, 4294901760},
17880 },
17881 },
17882 },
17883 {
17884 name: "CMPshiftLL",
17885 auxType: auxInt32,
17886 argLen: 2,
17887 asm: arm.ACMP,
17888 reg: regInfo{
17889 inputs: []inputInfo{
17890 {0, 22527},
17891 {1, 22527},
17892 },
17893 },
17894 },
17895 {
17896 name: "CMPshiftRL",
17897 auxType: auxInt32,
17898 argLen: 2,
17899 asm: arm.ACMP,
17900 reg: regInfo{
17901 inputs: []inputInfo{
17902 {0, 22527},
17903 {1, 22527},
17904 },
17905 },
17906 },
17907 {
17908 name: "CMPshiftRA",
17909 auxType: auxInt32,
17910 argLen: 2,
17911 asm: arm.ACMP,
17912 reg: regInfo{
17913 inputs: []inputInfo{
17914 {0, 22527},
17915 {1, 22527},
17916 },
17917 },
17918 },
17919 {
17920 name: "CMNshiftLL",
17921 auxType: auxInt32,
17922 argLen: 2,
17923 asm: arm.ACMN,
17924 reg: regInfo{
17925 inputs: []inputInfo{
17926 {0, 22527},
17927 {1, 22527},
17928 },
17929 },
17930 },
17931 {
17932 name: "CMNshiftRL",
17933 auxType: auxInt32,
17934 argLen: 2,
17935 asm: arm.ACMN,
17936 reg: regInfo{
17937 inputs: []inputInfo{
17938 {0, 22527},
17939 {1, 22527},
17940 },
17941 },
17942 },
17943 {
17944 name: "CMNshiftRA",
17945 auxType: auxInt32,
17946 argLen: 2,
17947 asm: arm.ACMN,
17948 reg: regInfo{
17949 inputs: []inputInfo{
17950 {0, 22527},
17951 {1, 22527},
17952 },
17953 },
17954 },
17955 {
17956 name: "TSTshiftLL",
17957 auxType: auxInt32,
17958 argLen: 2,
17959 asm: arm.ATST,
17960 reg: regInfo{
17961 inputs: []inputInfo{
17962 {0, 22527},
17963 {1, 22527},
17964 },
17965 },
17966 },
17967 {
17968 name: "TSTshiftRL",
17969 auxType: auxInt32,
17970 argLen: 2,
17971 asm: arm.ATST,
17972 reg: regInfo{
17973 inputs: []inputInfo{
17974 {0, 22527},
17975 {1, 22527},
17976 },
17977 },
17978 },
17979 {
17980 name: "TSTshiftRA",
17981 auxType: auxInt32,
17982 argLen: 2,
17983 asm: arm.ATST,
17984 reg: regInfo{
17985 inputs: []inputInfo{
17986 {0, 22527},
17987 {1, 22527},
17988 },
17989 },
17990 },
17991 {
17992 name: "TEQshiftLL",
17993 auxType: auxInt32,
17994 argLen: 2,
17995 asm: arm.ATEQ,
17996 reg: regInfo{
17997 inputs: []inputInfo{
17998 {0, 22527},
17999 {1, 22527},
18000 },
18001 },
18002 },
18003 {
18004 name: "TEQshiftRL",
18005 auxType: auxInt32,
18006 argLen: 2,
18007 asm: arm.ATEQ,
18008 reg: regInfo{
18009 inputs: []inputInfo{
18010 {0, 22527},
18011 {1, 22527},
18012 },
18013 },
18014 },
18015 {
18016 name: "TEQshiftRA",
18017 auxType: auxInt32,
18018 argLen: 2,
18019 asm: arm.ATEQ,
18020 reg: regInfo{
18021 inputs: []inputInfo{
18022 {0, 22527},
18023 {1, 22527},
18024 },
18025 },
18026 },
18027 {
18028 name: "CMPshiftLLreg",
18029 argLen: 3,
18030 asm: arm.ACMP,
18031 reg: regInfo{
18032 inputs: []inputInfo{
18033 {0, 21503},
18034 {1, 21503},
18035 {2, 21503},
18036 },
18037 },
18038 },
18039 {
18040 name: "CMPshiftRLreg",
18041 argLen: 3,
18042 asm: arm.ACMP,
18043 reg: regInfo{
18044 inputs: []inputInfo{
18045 {0, 21503},
18046 {1, 21503},
18047 {2, 21503},
18048 },
18049 },
18050 },
18051 {
18052 name: "CMPshiftRAreg",
18053 argLen: 3,
18054 asm: arm.ACMP,
18055 reg: regInfo{
18056 inputs: []inputInfo{
18057 {0, 21503},
18058 {1, 21503},
18059 {2, 21503},
18060 },
18061 },
18062 },
18063 {
18064 name: "CMNshiftLLreg",
18065 argLen: 3,
18066 asm: arm.ACMN,
18067 reg: regInfo{
18068 inputs: []inputInfo{
18069 {0, 21503},
18070 {1, 21503},
18071 {2, 21503},
18072 },
18073 },
18074 },
18075 {
18076 name: "CMNshiftRLreg",
18077 argLen: 3,
18078 asm: arm.ACMN,
18079 reg: regInfo{
18080 inputs: []inputInfo{
18081 {0, 21503},
18082 {1, 21503},
18083 {2, 21503},
18084 },
18085 },
18086 },
18087 {
18088 name: "CMNshiftRAreg",
18089 argLen: 3,
18090 asm: arm.ACMN,
18091 reg: regInfo{
18092 inputs: []inputInfo{
18093 {0, 21503},
18094 {1, 21503},
18095 {2, 21503},
18096 },
18097 },
18098 },
18099 {
18100 name: "TSTshiftLLreg",
18101 argLen: 3,
18102 asm: arm.ATST,
18103 reg: regInfo{
18104 inputs: []inputInfo{
18105 {0, 21503},
18106 {1, 21503},
18107 {2, 21503},
18108 },
18109 },
18110 },
18111 {
18112 name: "TSTshiftRLreg",
18113 argLen: 3,
18114 asm: arm.ATST,
18115 reg: regInfo{
18116 inputs: []inputInfo{
18117 {0, 21503},
18118 {1, 21503},
18119 {2, 21503},
18120 },
18121 },
18122 },
18123 {
18124 name: "TSTshiftRAreg",
18125 argLen: 3,
18126 asm: arm.ATST,
18127 reg: regInfo{
18128 inputs: []inputInfo{
18129 {0, 21503},
18130 {1, 21503},
18131 {2, 21503},
18132 },
18133 },
18134 },
18135 {
18136 name: "TEQshiftLLreg",
18137 argLen: 3,
18138 asm: arm.ATEQ,
18139 reg: regInfo{
18140 inputs: []inputInfo{
18141 {0, 21503},
18142 {1, 21503},
18143 {2, 21503},
18144 },
18145 },
18146 },
18147 {
18148 name: "TEQshiftRLreg",
18149 argLen: 3,
18150 asm: arm.ATEQ,
18151 reg: regInfo{
18152 inputs: []inputInfo{
18153 {0, 21503},
18154 {1, 21503},
18155 {2, 21503},
18156 },
18157 },
18158 },
18159 {
18160 name: "TEQshiftRAreg",
18161 argLen: 3,
18162 asm: arm.ATEQ,
18163 reg: regInfo{
18164 inputs: []inputInfo{
18165 {0, 21503},
18166 {1, 21503},
18167 {2, 21503},
18168 },
18169 },
18170 },
18171 {
18172 name: "CMPF0",
18173 argLen: 1,
18174 asm: arm.ACMPF,
18175 reg: regInfo{
18176 inputs: []inputInfo{
18177 {0, 4294901760},
18178 },
18179 },
18180 },
18181 {
18182 name: "CMPD0",
18183 argLen: 1,
18184 asm: arm.ACMPD,
18185 reg: regInfo{
18186 inputs: []inputInfo{
18187 {0, 4294901760},
18188 },
18189 },
18190 },
18191 {
18192 name: "MOVWconst",
18193 auxType: auxInt32,
18194 argLen: 0,
18195 rematerializeable: true,
18196 asm: arm.AMOVW,
18197 reg: regInfo{
18198 outputs: []outputInfo{
18199 {0, 21503},
18200 },
18201 },
18202 },
18203 {
18204 name: "MOVFconst",
18205 auxType: auxFloat64,
18206 argLen: 0,
18207 rematerializeable: true,
18208 asm: arm.AMOVF,
18209 reg: regInfo{
18210 outputs: []outputInfo{
18211 {0, 4294901760},
18212 },
18213 },
18214 },
18215 {
18216 name: "MOVDconst",
18217 auxType: auxFloat64,
18218 argLen: 0,
18219 rematerializeable: true,
18220 asm: arm.AMOVD,
18221 reg: regInfo{
18222 outputs: []outputInfo{
18223 {0, 4294901760},
18224 },
18225 },
18226 },
18227 {
18228 name: "MOVWaddr",
18229 auxType: auxSymOff,
18230 argLen: 1,
18231 rematerializeable: true,
18232 symEffect: SymAddr,
18233 asm: arm.AMOVW,
18234 reg: regInfo{
18235 inputs: []inputInfo{
18236 {0, 4294975488},
18237 },
18238 outputs: []outputInfo{
18239 {0, 21503},
18240 },
18241 },
18242 },
18243 {
18244 name: "MOVBload",
18245 auxType: auxSymOff,
18246 argLen: 2,
18247 faultOnNilArg0: true,
18248 symEffect: SymRead,
18249 asm: arm.AMOVB,
18250 reg: regInfo{
18251 inputs: []inputInfo{
18252 {0, 4294998015},
18253 },
18254 outputs: []outputInfo{
18255 {0, 21503},
18256 },
18257 },
18258 },
18259 {
18260 name: "MOVBUload",
18261 auxType: auxSymOff,
18262 argLen: 2,
18263 faultOnNilArg0: true,
18264 symEffect: SymRead,
18265 asm: arm.AMOVBU,
18266 reg: regInfo{
18267 inputs: []inputInfo{
18268 {0, 4294998015},
18269 },
18270 outputs: []outputInfo{
18271 {0, 21503},
18272 },
18273 },
18274 },
18275 {
18276 name: "MOVHload",
18277 auxType: auxSymOff,
18278 argLen: 2,
18279 faultOnNilArg0: true,
18280 symEffect: SymRead,
18281 asm: arm.AMOVH,
18282 reg: regInfo{
18283 inputs: []inputInfo{
18284 {0, 4294998015},
18285 },
18286 outputs: []outputInfo{
18287 {0, 21503},
18288 },
18289 },
18290 },
18291 {
18292 name: "MOVHUload",
18293 auxType: auxSymOff,
18294 argLen: 2,
18295 faultOnNilArg0: true,
18296 symEffect: SymRead,
18297 asm: arm.AMOVHU,
18298 reg: regInfo{
18299 inputs: []inputInfo{
18300 {0, 4294998015},
18301 },
18302 outputs: []outputInfo{
18303 {0, 21503},
18304 },
18305 },
18306 },
18307 {
18308 name: "MOVWload",
18309 auxType: auxSymOff,
18310 argLen: 2,
18311 faultOnNilArg0: true,
18312 symEffect: SymRead,
18313 asm: arm.AMOVW,
18314 reg: regInfo{
18315 inputs: []inputInfo{
18316 {0, 4294998015},
18317 },
18318 outputs: []outputInfo{
18319 {0, 21503},
18320 },
18321 },
18322 },
18323 {
18324 name: "MOVFload",
18325 auxType: auxSymOff,
18326 argLen: 2,
18327 faultOnNilArg0: true,
18328 symEffect: SymRead,
18329 asm: arm.AMOVF,
18330 reg: regInfo{
18331 inputs: []inputInfo{
18332 {0, 4294998015},
18333 },
18334 outputs: []outputInfo{
18335 {0, 4294901760},
18336 },
18337 },
18338 },
18339 {
18340 name: "MOVDload",
18341 auxType: auxSymOff,
18342 argLen: 2,
18343 faultOnNilArg0: true,
18344 symEffect: SymRead,
18345 asm: arm.AMOVD,
18346 reg: regInfo{
18347 inputs: []inputInfo{
18348 {0, 4294998015},
18349 },
18350 outputs: []outputInfo{
18351 {0, 4294901760},
18352 },
18353 },
18354 },
18355 {
18356 name: "MOVBstore",
18357 auxType: auxSymOff,
18358 argLen: 3,
18359 faultOnNilArg0: true,
18360 symEffect: SymWrite,
18361 asm: arm.AMOVB,
18362 reg: regInfo{
18363 inputs: []inputInfo{
18364 {1, 22527},
18365 {0, 4294998015},
18366 },
18367 },
18368 },
18369 {
18370 name: "MOVHstore",
18371 auxType: auxSymOff,
18372 argLen: 3,
18373 faultOnNilArg0: true,
18374 symEffect: SymWrite,
18375 asm: arm.AMOVH,
18376 reg: regInfo{
18377 inputs: []inputInfo{
18378 {1, 22527},
18379 {0, 4294998015},
18380 },
18381 },
18382 },
18383 {
18384 name: "MOVWstore",
18385 auxType: auxSymOff,
18386 argLen: 3,
18387 faultOnNilArg0: true,
18388 symEffect: SymWrite,
18389 asm: arm.AMOVW,
18390 reg: regInfo{
18391 inputs: []inputInfo{
18392 {1, 22527},
18393 {0, 4294998015},
18394 },
18395 },
18396 },
18397 {
18398 name: "MOVFstore",
18399 auxType: auxSymOff,
18400 argLen: 3,
18401 faultOnNilArg0: true,
18402 symEffect: SymWrite,
18403 asm: arm.AMOVF,
18404 reg: regInfo{
18405 inputs: []inputInfo{
18406 {0, 4294998015},
18407 {1, 4294901760},
18408 },
18409 },
18410 },
18411 {
18412 name: "MOVDstore",
18413 auxType: auxSymOff,
18414 argLen: 3,
18415 faultOnNilArg0: true,
18416 symEffect: SymWrite,
18417 asm: arm.AMOVD,
18418 reg: regInfo{
18419 inputs: []inputInfo{
18420 {0, 4294998015},
18421 {1, 4294901760},
18422 },
18423 },
18424 },
18425 {
18426 name: "MOVWloadidx",
18427 argLen: 3,
18428 asm: arm.AMOVW,
18429 reg: regInfo{
18430 inputs: []inputInfo{
18431 {1, 22527},
18432 {0, 4294998015},
18433 },
18434 outputs: []outputInfo{
18435 {0, 21503},
18436 },
18437 },
18438 },
18439 {
18440 name: "MOVWloadshiftLL",
18441 auxType: auxInt32,
18442 argLen: 3,
18443 asm: arm.AMOVW,
18444 reg: regInfo{
18445 inputs: []inputInfo{
18446 {1, 22527},
18447 {0, 4294998015},
18448 },
18449 outputs: []outputInfo{
18450 {0, 21503},
18451 },
18452 },
18453 },
18454 {
18455 name: "MOVWloadshiftRL",
18456 auxType: auxInt32,
18457 argLen: 3,
18458 asm: arm.AMOVW,
18459 reg: regInfo{
18460 inputs: []inputInfo{
18461 {1, 22527},
18462 {0, 4294998015},
18463 },
18464 outputs: []outputInfo{
18465 {0, 21503},
18466 },
18467 },
18468 },
18469 {
18470 name: "MOVWloadshiftRA",
18471 auxType: auxInt32,
18472 argLen: 3,
18473 asm: arm.AMOVW,
18474 reg: regInfo{
18475 inputs: []inputInfo{
18476 {1, 22527},
18477 {0, 4294998015},
18478 },
18479 outputs: []outputInfo{
18480 {0, 21503},
18481 },
18482 },
18483 },
18484 {
18485 name: "MOVBUloadidx",
18486 argLen: 3,
18487 asm: arm.AMOVBU,
18488 reg: regInfo{
18489 inputs: []inputInfo{
18490 {1, 22527},
18491 {0, 4294998015},
18492 },
18493 outputs: []outputInfo{
18494 {0, 21503},
18495 },
18496 },
18497 },
18498 {
18499 name: "MOVBloadidx",
18500 argLen: 3,
18501 asm: arm.AMOVB,
18502 reg: regInfo{
18503 inputs: []inputInfo{
18504 {1, 22527},
18505 {0, 4294998015},
18506 },
18507 outputs: []outputInfo{
18508 {0, 21503},
18509 },
18510 },
18511 },
18512 {
18513 name: "MOVHUloadidx",
18514 argLen: 3,
18515 asm: arm.AMOVHU,
18516 reg: regInfo{
18517 inputs: []inputInfo{
18518 {1, 22527},
18519 {0, 4294998015},
18520 },
18521 outputs: []outputInfo{
18522 {0, 21503},
18523 },
18524 },
18525 },
18526 {
18527 name: "MOVHloadidx",
18528 argLen: 3,
18529 asm: arm.AMOVH,
18530 reg: regInfo{
18531 inputs: []inputInfo{
18532 {1, 22527},
18533 {0, 4294998015},
18534 },
18535 outputs: []outputInfo{
18536 {0, 21503},
18537 },
18538 },
18539 },
18540 {
18541 name: "MOVWstoreidx",
18542 argLen: 4,
18543 asm: arm.AMOVW,
18544 reg: regInfo{
18545 inputs: []inputInfo{
18546 {1, 22527},
18547 {2, 22527},
18548 {0, 4294998015},
18549 },
18550 },
18551 },
18552 {
18553 name: "MOVWstoreshiftLL",
18554 auxType: auxInt32,
18555 argLen: 4,
18556 asm: arm.AMOVW,
18557 reg: regInfo{
18558 inputs: []inputInfo{
18559 {1, 22527},
18560 {2, 22527},
18561 {0, 4294998015},
18562 },
18563 },
18564 },
18565 {
18566 name: "MOVWstoreshiftRL",
18567 auxType: auxInt32,
18568 argLen: 4,
18569 asm: arm.AMOVW,
18570 reg: regInfo{
18571 inputs: []inputInfo{
18572 {1, 22527},
18573 {2, 22527},
18574 {0, 4294998015},
18575 },
18576 },
18577 },
18578 {
18579 name: "MOVWstoreshiftRA",
18580 auxType: auxInt32,
18581 argLen: 4,
18582 asm: arm.AMOVW,
18583 reg: regInfo{
18584 inputs: []inputInfo{
18585 {1, 22527},
18586 {2, 22527},
18587 {0, 4294998015},
18588 },
18589 },
18590 },
18591 {
18592 name: "MOVBstoreidx",
18593 argLen: 4,
18594 asm: arm.AMOVB,
18595 reg: regInfo{
18596 inputs: []inputInfo{
18597 {1, 22527},
18598 {2, 22527},
18599 {0, 4294998015},
18600 },
18601 },
18602 },
18603 {
18604 name: "MOVHstoreidx",
18605 argLen: 4,
18606 asm: arm.AMOVH,
18607 reg: regInfo{
18608 inputs: []inputInfo{
18609 {1, 22527},
18610 {2, 22527},
18611 {0, 4294998015},
18612 },
18613 },
18614 },
18615 {
18616 name: "MOVBreg",
18617 argLen: 1,
18618 asm: arm.AMOVBS,
18619 reg: regInfo{
18620 inputs: []inputInfo{
18621 {0, 22527},
18622 },
18623 outputs: []outputInfo{
18624 {0, 21503},
18625 },
18626 },
18627 },
18628 {
18629 name: "MOVBUreg",
18630 argLen: 1,
18631 asm: arm.AMOVBU,
18632 reg: regInfo{
18633 inputs: []inputInfo{
18634 {0, 22527},
18635 },
18636 outputs: []outputInfo{
18637 {0, 21503},
18638 },
18639 },
18640 },
18641 {
18642 name: "MOVHreg",
18643 argLen: 1,
18644 asm: arm.AMOVHS,
18645 reg: regInfo{
18646 inputs: []inputInfo{
18647 {0, 22527},
18648 },
18649 outputs: []outputInfo{
18650 {0, 21503},
18651 },
18652 },
18653 },
18654 {
18655 name: "MOVHUreg",
18656 argLen: 1,
18657 asm: arm.AMOVHU,
18658 reg: regInfo{
18659 inputs: []inputInfo{
18660 {0, 22527},
18661 },
18662 outputs: []outputInfo{
18663 {0, 21503},
18664 },
18665 },
18666 },
18667 {
18668 name: "MOVWreg",
18669 argLen: 1,
18670 asm: arm.AMOVW,
18671 reg: regInfo{
18672 inputs: []inputInfo{
18673 {0, 22527},
18674 },
18675 outputs: []outputInfo{
18676 {0, 21503},
18677 },
18678 },
18679 },
18680 {
18681 name: "MOVWnop",
18682 argLen: 1,
18683 resultInArg0: true,
18684 reg: regInfo{
18685 inputs: []inputInfo{
18686 {0, 21503},
18687 },
18688 outputs: []outputInfo{
18689 {0, 21503},
18690 },
18691 },
18692 },
18693 {
18694 name: "MOVWF",
18695 argLen: 1,
18696 asm: arm.AMOVWF,
18697 reg: regInfo{
18698 inputs: []inputInfo{
18699 {0, 21503},
18700 },
18701 clobbers: 2147483648,
18702 outputs: []outputInfo{
18703 {0, 4294901760},
18704 },
18705 },
18706 },
18707 {
18708 name: "MOVWD",
18709 argLen: 1,
18710 asm: arm.AMOVWD,
18711 reg: regInfo{
18712 inputs: []inputInfo{
18713 {0, 21503},
18714 },
18715 clobbers: 2147483648,
18716 outputs: []outputInfo{
18717 {0, 4294901760},
18718 },
18719 },
18720 },
18721 {
18722 name: "MOVWUF",
18723 argLen: 1,
18724 asm: arm.AMOVWF,
18725 reg: regInfo{
18726 inputs: []inputInfo{
18727 {0, 21503},
18728 },
18729 clobbers: 2147483648,
18730 outputs: []outputInfo{
18731 {0, 4294901760},
18732 },
18733 },
18734 },
18735 {
18736 name: "MOVWUD",
18737 argLen: 1,
18738 asm: arm.AMOVWD,
18739 reg: regInfo{
18740 inputs: []inputInfo{
18741 {0, 21503},
18742 },
18743 clobbers: 2147483648,
18744 outputs: []outputInfo{
18745 {0, 4294901760},
18746 },
18747 },
18748 },
18749 {
18750 name: "MOVFW",
18751 argLen: 1,
18752 asm: arm.AMOVFW,
18753 reg: regInfo{
18754 inputs: []inputInfo{
18755 {0, 4294901760},
18756 },
18757 clobbers: 2147483648,
18758 outputs: []outputInfo{
18759 {0, 21503},
18760 },
18761 },
18762 },
18763 {
18764 name: "MOVDW",
18765 argLen: 1,
18766 asm: arm.AMOVDW,
18767 reg: regInfo{
18768 inputs: []inputInfo{
18769 {0, 4294901760},
18770 },
18771 clobbers: 2147483648,
18772 outputs: []outputInfo{
18773 {0, 21503},
18774 },
18775 },
18776 },
18777 {
18778 name: "MOVFWU",
18779 argLen: 1,
18780 asm: arm.AMOVFW,
18781 reg: regInfo{
18782 inputs: []inputInfo{
18783 {0, 4294901760},
18784 },
18785 clobbers: 2147483648,
18786 outputs: []outputInfo{
18787 {0, 21503},
18788 },
18789 },
18790 },
18791 {
18792 name: "MOVDWU",
18793 argLen: 1,
18794 asm: arm.AMOVDW,
18795 reg: regInfo{
18796 inputs: []inputInfo{
18797 {0, 4294901760},
18798 },
18799 clobbers: 2147483648,
18800 outputs: []outputInfo{
18801 {0, 21503},
18802 },
18803 },
18804 },
18805 {
18806 name: "MOVFD",
18807 argLen: 1,
18808 asm: arm.AMOVFD,
18809 reg: regInfo{
18810 inputs: []inputInfo{
18811 {0, 4294901760},
18812 },
18813 outputs: []outputInfo{
18814 {0, 4294901760},
18815 },
18816 },
18817 },
18818 {
18819 name: "MOVDF",
18820 argLen: 1,
18821 asm: arm.AMOVDF,
18822 reg: regInfo{
18823 inputs: []inputInfo{
18824 {0, 4294901760},
18825 },
18826 outputs: []outputInfo{
18827 {0, 4294901760},
18828 },
18829 },
18830 },
18831 {
18832 name: "CMOVWHSconst",
18833 auxType: auxInt32,
18834 argLen: 2,
18835 resultInArg0: true,
18836 asm: arm.AMOVW,
18837 reg: regInfo{
18838 inputs: []inputInfo{
18839 {0, 21503},
18840 },
18841 outputs: []outputInfo{
18842 {0, 21503},
18843 },
18844 },
18845 },
18846 {
18847 name: "CMOVWLSconst",
18848 auxType: auxInt32,
18849 argLen: 2,
18850 resultInArg0: true,
18851 asm: arm.AMOVW,
18852 reg: regInfo{
18853 inputs: []inputInfo{
18854 {0, 21503},
18855 },
18856 outputs: []outputInfo{
18857 {0, 21503},
18858 },
18859 },
18860 },
18861 {
18862 name: "SRAcond",
18863 argLen: 3,
18864 asm: arm.ASRA,
18865 reg: regInfo{
18866 inputs: []inputInfo{
18867 {0, 21503},
18868 {1, 21503},
18869 },
18870 outputs: []outputInfo{
18871 {0, 21503},
18872 },
18873 },
18874 },
18875 {
18876 name: "CALLstatic",
18877 auxType: auxCallOff,
18878 argLen: 1,
18879 clobberFlags: true,
18880 call: true,
18881 reg: regInfo{
18882 clobbers: 4294924287,
18883 },
18884 },
18885 {
18886 name: "CALLtail",
18887 auxType: auxCallOff,
18888 argLen: 1,
18889 clobberFlags: true,
18890 call: true,
18891 tailCall: true,
18892 reg: regInfo{
18893 clobbers: 4294924287,
18894 },
18895 },
18896 {
18897 name: "CALLclosure",
18898 auxType: auxCallOff,
18899 argLen: 3,
18900 clobberFlags: true,
18901 call: true,
18902 reg: regInfo{
18903 inputs: []inputInfo{
18904 {1, 128},
18905 {0, 29695},
18906 },
18907 clobbers: 4294924287,
18908 },
18909 },
18910 {
18911 name: "CALLinter",
18912 auxType: auxCallOff,
18913 argLen: 2,
18914 clobberFlags: true,
18915 call: true,
18916 reg: regInfo{
18917 inputs: []inputInfo{
18918 {0, 21503},
18919 },
18920 clobbers: 4294924287,
18921 },
18922 },
18923 {
18924 name: "LoweredNilCheck",
18925 argLen: 2,
18926 nilCheck: true,
18927 faultOnNilArg0: true,
18928 reg: regInfo{
18929 inputs: []inputInfo{
18930 {0, 22527},
18931 },
18932 },
18933 },
18934 {
18935 name: "Equal",
18936 argLen: 1,
18937 reg: regInfo{
18938 outputs: []outputInfo{
18939 {0, 21503},
18940 },
18941 },
18942 },
18943 {
18944 name: "NotEqual",
18945 argLen: 1,
18946 reg: regInfo{
18947 outputs: []outputInfo{
18948 {0, 21503},
18949 },
18950 },
18951 },
18952 {
18953 name: "LessThan",
18954 argLen: 1,
18955 reg: regInfo{
18956 outputs: []outputInfo{
18957 {0, 21503},
18958 },
18959 },
18960 },
18961 {
18962 name: "LessEqual",
18963 argLen: 1,
18964 reg: regInfo{
18965 outputs: []outputInfo{
18966 {0, 21503},
18967 },
18968 },
18969 },
18970 {
18971 name: "GreaterThan",
18972 argLen: 1,
18973 reg: regInfo{
18974 outputs: []outputInfo{
18975 {0, 21503},
18976 },
18977 },
18978 },
18979 {
18980 name: "GreaterEqual",
18981 argLen: 1,
18982 reg: regInfo{
18983 outputs: []outputInfo{
18984 {0, 21503},
18985 },
18986 },
18987 },
18988 {
18989 name: "LessThanU",
18990 argLen: 1,
18991 reg: regInfo{
18992 outputs: []outputInfo{
18993 {0, 21503},
18994 },
18995 },
18996 },
18997 {
18998 name: "LessEqualU",
18999 argLen: 1,
19000 reg: regInfo{
19001 outputs: []outputInfo{
19002 {0, 21503},
19003 },
19004 },
19005 },
19006 {
19007 name: "GreaterThanU",
19008 argLen: 1,
19009 reg: regInfo{
19010 outputs: []outputInfo{
19011 {0, 21503},
19012 },
19013 },
19014 },
19015 {
19016 name: "GreaterEqualU",
19017 argLen: 1,
19018 reg: regInfo{
19019 outputs: []outputInfo{
19020 {0, 21503},
19021 },
19022 },
19023 },
19024 {
19025 name: "DUFFZERO",
19026 auxType: auxInt64,
19027 argLen: 3,
19028 faultOnNilArg0: true,
19029 reg: regInfo{
19030 inputs: []inputInfo{
19031 {0, 2},
19032 {1, 1},
19033 },
19034 clobbers: 20482,
19035 },
19036 },
19037 {
19038 name: "DUFFCOPY",
19039 auxType: auxInt64,
19040 argLen: 3,
19041 faultOnNilArg0: true,
19042 faultOnNilArg1: true,
19043 reg: regInfo{
19044 inputs: []inputInfo{
19045 {0, 4},
19046 {1, 2},
19047 },
19048 clobbers: 20487,
19049 },
19050 },
19051 {
19052 name: "LoweredZero",
19053 auxType: auxInt64,
19054 argLen: 4,
19055 clobberFlags: true,
19056 faultOnNilArg0: true,
19057 reg: regInfo{
19058 inputs: []inputInfo{
19059 {0, 2},
19060 {1, 21503},
19061 {2, 21503},
19062 },
19063 clobbers: 2,
19064 },
19065 },
19066 {
19067 name: "LoweredMove",
19068 auxType: auxInt64,
19069 argLen: 4,
19070 clobberFlags: true,
19071 faultOnNilArg0: true,
19072 faultOnNilArg1: true,
19073 reg: regInfo{
19074 inputs: []inputInfo{
19075 {0, 4},
19076 {1, 2},
19077 {2, 21503},
19078 },
19079 clobbers: 6,
19080 },
19081 },
19082 {
19083 name: "LoweredGetClosurePtr",
19084 argLen: 0,
19085 zeroWidth: true,
19086 reg: regInfo{
19087 outputs: []outputInfo{
19088 {0, 128},
19089 },
19090 },
19091 },
19092 {
19093 name: "LoweredGetCallerSP",
19094 argLen: 1,
19095 rematerializeable: true,
19096 reg: regInfo{
19097 outputs: []outputInfo{
19098 {0, 21503},
19099 },
19100 },
19101 },
19102 {
19103 name: "LoweredGetCallerPC",
19104 argLen: 0,
19105 rematerializeable: true,
19106 reg: regInfo{
19107 outputs: []outputInfo{
19108 {0, 21503},
19109 },
19110 },
19111 },
19112 {
19113 name: "LoweredPanicBoundsA",
19114 auxType: auxInt64,
19115 argLen: 3,
19116 call: true,
19117 reg: regInfo{
19118 inputs: []inputInfo{
19119 {0, 4},
19120 {1, 8},
19121 },
19122 },
19123 },
19124 {
19125 name: "LoweredPanicBoundsB",
19126 auxType: auxInt64,
19127 argLen: 3,
19128 call: true,
19129 reg: regInfo{
19130 inputs: []inputInfo{
19131 {0, 2},
19132 {1, 4},
19133 },
19134 },
19135 },
19136 {
19137 name: "LoweredPanicBoundsC",
19138 auxType: auxInt64,
19139 argLen: 3,
19140 call: true,
19141 reg: regInfo{
19142 inputs: []inputInfo{
19143 {0, 1},
19144 {1, 2},
19145 },
19146 },
19147 },
19148 {
19149 name: "LoweredPanicExtendA",
19150 auxType: auxInt64,
19151 argLen: 4,
19152 call: true,
19153 reg: regInfo{
19154 inputs: []inputInfo{
19155 {0, 16},
19156 {1, 4},
19157 {2, 8},
19158 },
19159 },
19160 },
19161 {
19162 name: "LoweredPanicExtendB",
19163 auxType: auxInt64,
19164 argLen: 4,
19165 call: true,
19166 reg: regInfo{
19167 inputs: []inputInfo{
19168 {0, 16},
19169 {1, 2},
19170 {2, 4},
19171 },
19172 },
19173 },
19174 {
19175 name: "LoweredPanicExtendC",
19176 auxType: auxInt64,
19177 argLen: 4,
19178 call: true,
19179 reg: regInfo{
19180 inputs: []inputInfo{
19181 {0, 16},
19182 {1, 1},
19183 {2, 2},
19184 },
19185 },
19186 },
19187 {
19188 name: "FlagConstant",
19189 auxType: auxFlagConstant,
19190 argLen: 0,
19191 reg: regInfo{},
19192 },
19193 {
19194 name: "InvertFlags",
19195 argLen: 1,
19196 reg: regInfo{},
19197 },
19198 {
19199 name: "LoweredWB",
19200 auxType: auxInt64,
19201 argLen: 1,
19202 clobberFlags: true,
19203 reg: regInfo{
19204 clobbers: 4294922240,
19205 outputs: []outputInfo{
19206 {0, 256},
19207 },
19208 },
19209 },
19210
19211 {
19212 name: "ADCSflags",
19213 argLen: 3,
19214 commutative: true,
19215 asm: arm64.AADCS,
19216 reg: regInfo{
19217 inputs: []inputInfo{
19218 {0, 335544319},
19219 {1, 335544319},
19220 },
19221 outputs: []outputInfo{
19222 {1, 0},
19223 {0, 335544319},
19224 },
19225 },
19226 },
19227 {
19228 name: "ADCzerocarry",
19229 argLen: 1,
19230 asm: arm64.AADC,
19231 reg: regInfo{
19232 outputs: []outputInfo{
19233 {0, 335544319},
19234 },
19235 },
19236 },
19237 {
19238 name: "ADD",
19239 argLen: 2,
19240 commutative: true,
19241 asm: arm64.AADD,
19242 reg: regInfo{
19243 inputs: []inputInfo{
19244 {0, 402653183},
19245 {1, 402653183},
19246 },
19247 outputs: []outputInfo{
19248 {0, 335544319},
19249 },
19250 },
19251 },
19252 {
19253 name: "ADDconst",
19254 auxType: auxInt64,
19255 argLen: 1,
19256 asm: arm64.AADD,
19257 reg: regInfo{
19258 inputs: []inputInfo{
19259 {0, 1476395007},
19260 },
19261 outputs: []outputInfo{
19262 {0, 335544319},
19263 },
19264 },
19265 },
19266 {
19267 name: "ADDSconstflags",
19268 auxType: auxInt64,
19269 argLen: 1,
19270 asm: arm64.AADDS,
19271 reg: regInfo{
19272 inputs: []inputInfo{
19273 {0, 402653183},
19274 },
19275 outputs: []outputInfo{
19276 {1, 0},
19277 {0, 335544319},
19278 },
19279 },
19280 },
19281 {
19282 name: "ADDSflags",
19283 argLen: 2,
19284 commutative: true,
19285 asm: arm64.AADDS,
19286 reg: regInfo{
19287 inputs: []inputInfo{
19288 {0, 335544319},
19289 {1, 335544319},
19290 },
19291 outputs: []outputInfo{
19292 {1, 0},
19293 {0, 335544319},
19294 },
19295 },
19296 },
19297 {
19298 name: "SUB",
19299 argLen: 2,
19300 asm: arm64.ASUB,
19301 reg: regInfo{
19302 inputs: []inputInfo{
19303 {0, 402653183},
19304 {1, 402653183},
19305 },
19306 outputs: []outputInfo{
19307 {0, 335544319},
19308 },
19309 },
19310 },
19311 {
19312 name: "SUBconst",
19313 auxType: auxInt64,
19314 argLen: 1,
19315 asm: arm64.ASUB,
19316 reg: regInfo{
19317 inputs: []inputInfo{
19318 {0, 402653183},
19319 },
19320 outputs: []outputInfo{
19321 {0, 335544319},
19322 },
19323 },
19324 },
19325 {
19326 name: "SBCSflags",
19327 argLen: 3,
19328 asm: arm64.ASBCS,
19329 reg: regInfo{
19330 inputs: []inputInfo{
19331 {0, 335544319},
19332 {1, 335544319},
19333 },
19334 outputs: []outputInfo{
19335 {1, 0},
19336 {0, 335544319},
19337 },
19338 },
19339 },
19340 {
19341 name: "SUBSflags",
19342 argLen: 2,
19343 asm: arm64.ASUBS,
19344 reg: regInfo{
19345 inputs: []inputInfo{
19346 {0, 335544319},
19347 {1, 335544319},
19348 },
19349 outputs: []outputInfo{
19350 {1, 0},
19351 {0, 335544319},
19352 },
19353 },
19354 },
19355 {
19356 name: "MUL",
19357 argLen: 2,
19358 commutative: true,
19359 asm: arm64.AMUL,
19360 reg: regInfo{
19361 inputs: []inputInfo{
19362 {0, 402653183},
19363 {1, 402653183},
19364 },
19365 outputs: []outputInfo{
19366 {0, 335544319},
19367 },
19368 },
19369 },
19370 {
19371 name: "MULW",
19372 argLen: 2,
19373 commutative: true,
19374 asm: arm64.AMULW,
19375 reg: regInfo{
19376 inputs: []inputInfo{
19377 {0, 402653183},
19378 {1, 402653183},
19379 },
19380 outputs: []outputInfo{
19381 {0, 335544319},
19382 },
19383 },
19384 },
19385 {
19386 name: "MNEG",
19387 argLen: 2,
19388 commutative: true,
19389 asm: arm64.AMNEG,
19390 reg: regInfo{
19391 inputs: []inputInfo{
19392 {0, 402653183},
19393 {1, 402653183},
19394 },
19395 outputs: []outputInfo{
19396 {0, 335544319},
19397 },
19398 },
19399 },
19400 {
19401 name: "MNEGW",
19402 argLen: 2,
19403 commutative: true,
19404 asm: arm64.AMNEGW,
19405 reg: regInfo{
19406 inputs: []inputInfo{
19407 {0, 402653183},
19408 {1, 402653183},
19409 },
19410 outputs: []outputInfo{
19411 {0, 335544319},
19412 },
19413 },
19414 },
19415 {
19416 name: "MULH",
19417 argLen: 2,
19418 commutative: true,
19419 asm: arm64.ASMULH,
19420 reg: regInfo{
19421 inputs: []inputInfo{
19422 {0, 402653183},
19423 {1, 402653183},
19424 },
19425 outputs: []outputInfo{
19426 {0, 335544319},
19427 },
19428 },
19429 },
19430 {
19431 name: "UMULH",
19432 argLen: 2,
19433 commutative: true,
19434 asm: arm64.AUMULH,
19435 reg: regInfo{
19436 inputs: []inputInfo{
19437 {0, 402653183},
19438 {1, 402653183},
19439 },
19440 outputs: []outputInfo{
19441 {0, 335544319},
19442 },
19443 },
19444 },
19445 {
19446 name: "MULL",
19447 argLen: 2,
19448 commutative: true,
19449 asm: arm64.ASMULL,
19450 reg: regInfo{
19451 inputs: []inputInfo{
19452 {0, 402653183},
19453 {1, 402653183},
19454 },
19455 outputs: []outputInfo{
19456 {0, 335544319},
19457 },
19458 },
19459 },
19460 {
19461 name: "UMULL",
19462 argLen: 2,
19463 commutative: true,
19464 asm: arm64.AUMULL,
19465 reg: regInfo{
19466 inputs: []inputInfo{
19467 {0, 402653183},
19468 {1, 402653183},
19469 },
19470 outputs: []outputInfo{
19471 {0, 335544319},
19472 },
19473 },
19474 },
19475 {
19476 name: "DIV",
19477 argLen: 2,
19478 asm: arm64.ASDIV,
19479 reg: regInfo{
19480 inputs: []inputInfo{
19481 {0, 402653183},
19482 {1, 402653183},
19483 },
19484 outputs: []outputInfo{
19485 {0, 335544319},
19486 },
19487 },
19488 },
19489 {
19490 name: "UDIV",
19491 argLen: 2,
19492 asm: arm64.AUDIV,
19493 reg: regInfo{
19494 inputs: []inputInfo{
19495 {0, 402653183},
19496 {1, 402653183},
19497 },
19498 outputs: []outputInfo{
19499 {0, 335544319},
19500 },
19501 },
19502 },
19503 {
19504 name: "DIVW",
19505 argLen: 2,
19506 asm: arm64.ASDIVW,
19507 reg: regInfo{
19508 inputs: []inputInfo{
19509 {0, 402653183},
19510 {1, 402653183},
19511 },
19512 outputs: []outputInfo{
19513 {0, 335544319},
19514 },
19515 },
19516 },
19517 {
19518 name: "UDIVW",
19519 argLen: 2,
19520 asm: arm64.AUDIVW,
19521 reg: regInfo{
19522 inputs: []inputInfo{
19523 {0, 402653183},
19524 {1, 402653183},
19525 },
19526 outputs: []outputInfo{
19527 {0, 335544319},
19528 },
19529 },
19530 },
19531 {
19532 name: "MOD",
19533 argLen: 2,
19534 asm: arm64.AREM,
19535 reg: regInfo{
19536 inputs: []inputInfo{
19537 {0, 402653183},
19538 {1, 402653183},
19539 },
19540 outputs: []outputInfo{
19541 {0, 335544319},
19542 },
19543 },
19544 },
19545 {
19546 name: "UMOD",
19547 argLen: 2,
19548 asm: arm64.AUREM,
19549 reg: regInfo{
19550 inputs: []inputInfo{
19551 {0, 402653183},
19552 {1, 402653183},
19553 },
19554 outputs: []outputInfo{
19555 {0, 335544319},
19556 },
19557 },
19558 },
19559 {
19560 name: "MODW",
19561 argLen: 2,
19562 asm: arm64.AREMW,
19563 reg: regInfo{
19564 inputs: []inputInfo{
19565 {0, 402653183},
19566 {1, 402653183},
19567 },
19568 outputs: []outputInfo{
19569 {0, 335544319},
19570 },
19571 },
19572 },
19573 {
19574 name: "UMODW",
19575 argLen: 2,
19576 asm: arm64.AUREMW,
19577 reg: regInfo{
19578 inputs: []inputInfo{
19579 {0, 402653183},
19580 {1, 402653183},
19581 },
19582 outputs: []outputInfo{
19583 {0, 335544319},
19584 },
19585 },
19586 },
19587 {
19588 name: "FADDS",
19589 argLen: 2,
19590 commutative: true,
19591 asm: arm64.AFADDS,
19592 reg: regInfo{
19593 inputs: []inputInfo{
19594 {0, 9223372034707292160},
19595 {1, 9223372034707292160},
19596 },
19597 outputs: []outputInfo{
19598 {0, 9223372034707292160},
19599 },
19600 },
19601 },
19602 {
19603 name: "FADDD",
19604 argLen: 2,
19605 commutative: true,
19606 asm: arm64.AFADDD,
19607 reg: regInfo{
19608 inputs: []inputInfo{
19609 {0, 9223372034707292160},
19610 {1, 9223372034707292160},
19611 },
19612 outputs: []outputInfo{
19613 {0, 9223372034707292160},
19614 },
19615 },
19616 },
19617 {
19618 name: "FSUBS",
19619 argLen: 2,
19620 asm: arm64.AFSUBS,
19621 reg: regInfo{
19622 inputs: []inputInfo{
19623 {0, 9223372034707292160},
19624 {1, 9223372034707292160},
19625 },
19626 outputs: []outputInfo{
19627 {0, 9223372034707292160},
19628 },
19629 },
19630 },
19631 {
19632 name: "FSUBD",
19633 argLen: 2,
19634 asm: arm64.AFSUBD,
19635 reg: regInfo{
19636 inputs: []inputInfo{
19637 {0, 9223372034707292160},
19638 {1, 9223372034707292160},
19639 },
19640 outputs: []outputInfo{
19641 {0, 9223372034707292160},
19642 },
19643 },
19644 },
19645 {
19646 name: "FMULS",
19647 argLen: 2,
19648 commutative: true,
19649 asm: arm64.AFMULS,
19650 reg: regInfo{
19651 inputs: []inputInfo{
19652 {0, 9223372034707292160},
19653 {1, 9223372034707292160},
19654 },
19655 outputs: []outputInfo{
19656 {0, 9223372034707292160},
19657 },
19658 },
19659 },
19660 {
19661 name: "FMULD",
19662 argLen: 2,
19663 commutative: true,
19664 asm: arm64.AFMULD,
19665 reg: regInfo{
19666 inputs: []inputInfo{
19667 {0, 9223372034707292160},
19668 {1, 9223372034707292160},
19669 },
19670 outputs: []outputInfo{
19671 {0, 9223372034707292160},
19672 },
19673 },
19674 },
19675 {
19676 name: "FNMULS",
19677 argLen: 2,
19678 commutative: true,
19679 asm: arm64.AFNMULS,
19680 reg: regInfo{
19681 inputs: []inputInfo{
19682 {0, 9223372034707292160},
19683 {1, 9223372034707292160},
19684 },
19685 outputs: []outputInfo{
19686 {0, 9223372034707292160},
19687 },
19688 },
19689 },
19690 {
19691 name: "FNMULD",
19692 argLen: 2,
19693 commutative: true,
19694 asm: arm64.AFNMULD,
19695 reg: regInfo{
19696 inputs: []inputInfo{
19697 {0, 9223372034707292160},
19698 {1, 9223372034707292160},
19699 },
19700 outputs: []outputInfo{
19701 {0, 9223372034707292160},
19702 },
19703 },
19704 },
19705 {
19706 name: "FDIVS",
19707 argLen: 2,
19708 asm: arm64.AFDIVS,
19709 reg: regInfo{
19710 inputs: []inputInfo{
19711 {0, 9223372034707292160},
19712 {1, 9223372034707292160},
19713 },
19714 outputs: []outputInfo{
19715 {0, 9223372034707292160},
19716 },
19717 },
19718 },
19719 {
19720 name: "FDIVD",
19721 argLen: 2,
19722 asm: arm64.AFDIVD,
19723 reg: regInfo{
19724 inputs: []inputInfo{
19725 {0, 9223372034707292160},
19726 {1, 9223372034707292160},
19727 },
19728 outputs: []outputInfo{
19729 {0, 9223372034707292160},
19730 },
19731 },
19732 },
19733 {
19734 name: "AND",
19735 argLen: 2,
19736 commutative: true,
19737 asm: arm64.AAND,
19738 reg: regInfo{
19739 inputs: []inputInfo{
19740 {0, 402653183},
19741 {1, 402653183},
19742 },
19743 outputs: []outputInfo{
19744 {0, 335544319},
19745 },
19746 },
19747 },
19748 {
19749 name: "ANDconst",
19750 auxType: auxInt64,
19751 argLen: 1,
19752 asm: arm64.AAND,
19753 reg: regInfo{
19754 inputs: []inputInfo{
19755 {0, 402653183},
19756 },
19757 outputs: []outputInfo{
19758 {0, 335544319},
19759 },
19760 },
19761 },
19762 {
19763 name: "OR",
19764 argLen: 2,
19765 commutative: true,
19766 asm: arm64.AORR,
19767 reg: regInfo{
19768 inputs: []inputInfo{
19769 {0, 402653183},
19770 {1, 402653183},
19771 },
19772 outputs: []outputInfo{
19773 {0, 335544319},
19774 },
19775 },
19776 },
19777 {
19778 name: "ORconst",
19779 auxType: auxInt64,
19780 argLen: 1,
19781 asm: arm64.AORR,
19782 reg: regInfo{
19783 inputs: []inputInfo{
19784 {0, 402653183},
19785 },
19786 outputs: []outputInfo{
19787 {0, 335544319},
19788 },
19789 },
19790 },
19791 {
19792 name: "XOR",
19793 argLen: 2,
19794 commutative: true,
19795 asm: arm64.AEOR,
19796 reg: regInfo{
19797 inputs: []inputInfo{
19798 {0, 402653183},
19799 {1, 402653183},
19800 },
19801 outputs: []outputInfo{
19802 {0, 335544319},
19803 },
19804 },
19805 },
19806 {
19807 name: "XORconst",
19808 auxType: auxInt64,
19809 argLen: 1,
19810 asm: arm64.AEOR,
19811 reg: regInfo{
19812 inputs: []inputInfo{
19813 {0, 402653183},
19814 },
19815 outputs: []outputInfo{
19816 {0, 335544319},
19817 },
19818 },
19819 },
19820 {
19821 name: "BIC",
19822 argLen: 2,
19823 asm: arm64.ABIC,
19824 reg: regInfo{
19825 inputs: []inputInfo{
19826 {0, 402653183},
19827 {1, 402653183},
19828 },
19829 outputs: []outputInfo{
19830 {0, 335544319},
19831 },
19832 },
19833 },
19834 {
19835 name: "EON",
19836 argLen: 2,
19837 asm: arm64.AEON,
19838 reg: regInfo{
19839 inputs: []inputInfo{
19840 {0, 402653183},
19841 {1, 402653183},
19842 },
19843 outputs: []outputInfo{
19844 {0, 335544319},
19845 },
19846 },
19847 },
19848 {
19849 name: "ORN",
19850 argLen: 2,
19851 asm: arm64.AORN,
19852 reg: regInfo{
19853 inputs: []inputInfo{
19854 {0, 402653183},
19855 {1, 402653183},
19856 },
19857 outputs: []outputInfo{
19858 {0, 335544319},
19859 },
19860 },
19861 },
19862 {
19863 name: "MVN",
19864 argLen: 1,
19865 asm: arm64.AMVN,
19866 reg: regInfo{
19867 inputs: []inputInfo{
19868 {0, 402653183},
19869 },
19870 outputs: []outputInfo{
19871 {0, 335544319},
19872 },
19873 },
19874 },
19875 {
19876 name: "NEG",
19877 argLen: 1,
19878 asm: arm64.ANEG,
19879 reg: regInfo{
19880 inputs: []inputInfo{
19881 {0, 402653183},
19882 },
19883 outputs: []outputInfo{
19884 {0, 335544319},
19885 },
19886 },
19887 },
19888 {
19889 name: "NEGSflags",
19890 argLen: 1,
19891 asm: arm64.ANEGS,
19892 reg: regInfo{
19893 inputs: []inputInfo{
19894 {0, 402653183},
19895 },
19896 outputs: []outputInfo{
19897 {1, 0},
19898 {0, 335544319},
19899 },
19900 },
19901 },
19902 {
19903 name: "NGCzerocarry",
19904 argLen: 1,
19905 asm: arm64.ANGC,
19906 reg: regInfo{
19907 outputs: []outputInfo{
19908 {0, 335544319},
19909 },
19910 },
19911 },
19912 {
19913 name: "FABSD",
19914 argLen: 1,
19915 asm: arm64.AFABSD,
19916 reg: regInfo{
19917 inputs: []inputInfo{
19918 {0, 9223372034707292160},
19919 },
19920 outputs: []outputInfo{
19921 {0, 9223372034707292160},
19922 },
19923 },
19924 },
19925 {
19926 name: "FNEGS",
19927 argLen: 1,
19928 asm: arm64.AFNEGS,
19929 reg: regInfo{
19930 inputs: []inputInfo{
19931 {0, 9223372034707292160},
19932 },
19933 outputs: []outputInfo{
19934 {0, 9223372034707292160},
19935 },
19936 },
19937 },
19938 {
19939 name: "FNEGD",
19940 argLen: 1,
19941 asm: arm64.AFNEGD,
19942 reg: regInfo{
19943 inputs: []inputInfo{
19944 {0, 9223372034707292160},
19945 },
19946 outputs: []outputInfo{
19947 {0, 9223372034707292160},
19948 },
19949 },
19950 },
19951 {
19952 name: "FSQRTD",
19953 argLen: 1,
19954 asm: arm64.AFSQRTD,
19955 reg: regInfo{
19956 inputs: []inputInfo{
19957 {0, 9223372034707292160},
19958 },
19959 outputs: []outputInfo{
19960 {0, 9223372034707292160},
19961 },
19962 },
19963 },
19964 {
19965 name: "FSQRTS",
19966 argLen: 1,
19967 asm: arm64.AFSQRTS,
19968 reg: regInfo{
19969 inputs: []inputInfo{
19970 {0, 9223372034707292160},
19971 },
19972 outputs: []outputInfo{
19973 {0, 9223372034707292160},
19974 },
19975 },
19976 },
19977 {
19978 name: "FMIND",
19979 argLen: 2,
19980 asm: arm64.AFMIND,
19981 reg: regInfo{
19982 inputs: []inputInfo{
19983 {0, 9223372034707292160},
19984 {1, 9223372034707292160},
19985 },
19986 outputs: []outputInfo{
19987 {0, 9223372034707292160},
19988 },
19989 },
19990 },
19991 {
19992 name: "FMINS",
19993 argLen: 2,
19994 asm: arm64.AFMINS,
19995 reg: regInfo{
19996 inputs: []inputInfo{
19997 {0, 9223372034707292160},
19998 {1, 9223372034707292160},
19999 },
20000 outputs: []outputInfo{
20001 {0, 9223372034707292160},
20002 },
20003 },
20004 },
20005 {
20006 name: "FMAXD",
20007 argLen: 2,
20008 asm: arm64.AFMAXD,
20009 reg: regInfo{
20010 inputs: []inputInfo{
20011 {0, 9223372034707292160},
20012 {1, 9223372034707292160},
20013 },
20014 outputs: []outputInfo{
20015 {0, 9223372034707292160},
20016 },
20017 },
20018 },
20019 {
20020 name: "FMAXS",
20021 argLen: 2,
20022 asm: arm64.AFMAXS,
20023 reg: regInfo{
20024 inputs: []inputInfo{
20025 {0, 9223372034707292160},
20026 {1, 9223372034707292160},
20027 },
20028 outputs: []outputInfo{
20029 {0, 9223372034707292160},
20030 },
20031 },
20032 },
20033 {
20034 name: "REV",
20035 argLen: 1,
20036 asm: arm64.AREV,
20037 reg: regInfo{
20038 inputs: []inputInfo{
20039 {0, 402653183},
20040 },
20041 outputs: []outputInfo{
20042 {0, 335544319},
20043 },
20044 },
20045 },
20046 {
20047 name: "REVW",
20048 argLen: 1,
20049 asm: arm64.AREVW,
20050 reg: regInfo{
20051 inputs: []inputInfo{
20052 {0, 402653183},
20053 },
20054 outputs: []outputInfo{
20055 {0, 335544319},
20056 },
20057 },
20058 },
20059 {
20060 name: "REV16",
20061 argLen: 1,
20062 asm: arm64.AREV16,
20063 reg: regInfo{
20064 inputs: []inputInfo{
20065 {0, 402653183},
20066 },
20067 outputs: []outputInfo{
20068 {0, 335544319},
20069 },
20070 },
20071 },
20072 {
20073 name: "REV16W",
20074 argLen: 1,
20075 asm: arm64.AREV16W,
20076 reg: regInfo{
20077 inputs: []inputInfo{
20078 {0, 402653183},
20079 },
20080 outputs: []outputInfo{
20081 {0, 335544319},
20082 },
20083 },
20084 },
20085 {
20086 name: "RBIT",
20087 argLen: 1,
20088 asm: arm64.ARBIT,
20089 reg: regInfo{
20090 inputs: []inputInfo{
20091 {0, 402653183},
20092 },
20093 outputs: []outputInfo{
20094 {0, 335544319},
20095 },
20096 },
20097 },
20098 {
20099 name: "RBITW",
20100 argLen: 1,
20101 asm: arm64.ARBITW,
20102 reg: regInfo{
20103 inputs: []inputInfo{
20104 {0, 402653183},
20105 },
20106 outputs: []outputInfo{
20107 {0, 335544319},
20108 },
20109 },
20110 },
20111 {
20112 name: "CLZ",
20113 argLen: 1,
20114 asm: arm64.ACLZ,
20115 reg: regInfo{
20116 inputs: []inputInfo{
20117 {0, 402653183},
20118 },
20119 outputs: []outputInfo{
20120 {0, 335544319},
20121 },
20122 },
20123 },
20124 {
20125 name: "CLZW",
20126 argLen: 1,
20127 asm: arm64.ACLZW,
20128 reg: regInfo{
20129 inputs: []inputInfo{
20130 {0, 402653183},
20131 },
20132 outputs: []outputInfo{
20133 {0, 335544319},
20134 },
20135 },
20136 },
20137 {
20138 name: "VCNT",
20139 argLen: 1,
20140 asm: arm64.AVCNT,
20141 reg: regInfo{
20142 inputs: []inputInfo{
20143 {0, 9223372034707292160},
20144 },
20145 outputs: []outputInfo{
20146 {0, 9223372034707292160},
20147 },
20148 },
20149 },
20150 {
20151 name: "VUADDLV",
20152 argLen: 1,
20153 asm: arm64.AVUADDLV,
20154 reg: regInfo{
20155 inputs: []inputInfo{
20156 {0, 9223372034707292160},
20157 },
20158 outputs: []outputInfo{
20159 {0, 9223372034707292160},
20160 },
20161 },
20162 },
20163 {
20164 name: "LoweredRound32F",
20165 argLen: 1,
20166 resultInArg0: true,
20167 zeroWidth: true,
20168 reg: regInfo{
20169 inputs: []inputInfo{
20170 {0, 9223372034707292160},
20171 },
20172 outputs: []outputInfo{
20173 {0, 9223372034707292160},
20174 },
20175 },
20176 },
20177 {
20178 name: "LoweredRound64F",
20179 argLen: 1,
20180 resultInArg0: true,
20181 zeroWidth: true,
20182 reg: regInfo{
20183 inputs: []inputInfo{
20184 {0, 9223372034707292160},
20185 },
20186 outputs: []outputInfo{
20187 {0, 9223372034707292160},
20188 },
20189 },
20190 },
20191 {
20192 name: "FMADDS",
20193 argLen: 3,
20194 asm: arm64.AFMADDS,
20195 reg: regInfo{
20196 inputs: []inputInfo{
20197 {0, 9223372034707292160},
20198 {1, 9223372034707292160},
20199 {2, 9223372034707292160},
20200 },
20201 outputs: []outputInfo{
20202 {0, 9223372034707292160},
20203 },
20204 },
20205 },
20206 {
20207 name: "FMADDD",
20208 argLen: 3,
20209 asm: arm64.AFMADDD,
20210 reg: regInfo{
20211 inputs: []inputInfo{
20212 {0, 9223372034707292160},
20213 {1, 9223372034707292160},
20214 {2, 9223372034707292160},
20215 },
20216 outputs: []outputInfo{
20217 {0, 9223372034707292160},
20218 },
20219 },
20220 },
20221 {
20222 name: "FNMADDS",
20223 argLen: 3,
20224 asm: arm64.AFNMADDS,
20225 reg: regInfo{
20226 inputs: []inputInfo{
20227 {0, 9223372034707292160},
20228 {1, 9223372034707292160},
20229 {2, 9223372034707292160},
20230 },
20231 outputs: []outputInfo{
20232 {0, 9223372034707292160},
20233 },
20234 },
20235 },
20236 {
20237 name: "FNMADDD",
20238 argLen: 3,
20239 asm: arm64.AFNMADDD,
20240 reg: regInfo{
20241 inputs: []inputInfo{
20242 {0, 9223372034707292160},
20243 {1, 9223372034707292160},
20244 {2, 9223372034707292160},
20245 },
20246 outputs: []outputInfo{
20247 {0, 9223372034707292160},
20248 },
20249 },
20250 },
20251 {
20252 name: "FMSUBS",
20253 argLen: 3,
20254 asm: arm64.AFMSUBS,
20255 reg: regInfo{
20256 inputs: []inputInfo{
20257 {0, 9223372034707292160},
20258 {1, 9223372034707292160},
20259 {2, 9223372034707292160},
20260 },
20261 outputs: []outputInfo{
20262 {0, 9223372034707292160},
20263 },
20264 },
20265 },
20266 {
20267 name: "FMSUBD",
20268 argLen: 3,
20269 asm: arm64.AFMSUBD,
20270 reg: regInfo{
20271 inputs: []inputInfo{
20272 {0, 9223372034707292160},
20273 {1, 9223372034707292160},
20274 {2, 9223372034707292160},
20275 },
20276 outputs: []outputInfo{
20277 {0, 9223372034707292160},
20278 },
20279 },
20280 },
20281 {
20282 name: "FNMSUBS",
20283 argLen: 3,
20284 asm: arm64.AFNMSUBS,
20285 reg: regInfo{
20286 inputs: []inputInfo{
20287 {0, 9223372034707292160},
20288 {1, 9223372034707292160},
20289 {2, 9223372034707292160},
20290 },
20291 outputs: []outputInfo{
20292 {0, 9223372034707292160},
20293 },
20294 },
20295 },
20296 {
20297 name: "FNMSUBD",
20298 argLen: 3,
20299 asm: arm64.AFNMSUBD,
20300 reg: regInfo{
20301 inputs: []inputInfo{
20302 {0, 9223372034707292160},
20303 {1, 9223372034707292160},
20304 {2, 9223372034707292160},
20305 },
20306 outputs: []outputInfo{
20307 {0, 9223372034707292160},
20308 },
20309 },
20310 },
20311 {
20312 name: "MADD",
20313 argLen: 3,
20314 asm: arm64.AMADD,
20315 reg: regInfo{
20316 inputs: []inputInfo{
20317 {0, 402653183},
20318 {1, 402653183},
20319 {2, 402653183},
20320 },
20321 outputs: []outputInfo{
20322 {0, 335544319},
20323 },
20324 },
20325 },
20326 {
20327 name: "MADDW",
20328 argLen: 3,
20329 asm: arm64.AMADDW,
20330 reg: regInfo{
20331 inputs: []inputInfo{
20332 {0, 402653183},
20333 {1, 402653183},
20334 {2, 402653183},
20335 },
20336 outputs: []outputInfo{
20337 {0, 335544319},
20338 },
20339 },
20340 },
20341 {
20342 name: "MSUB",
20343 argLen: 3,
20344 asm: arm64.AMSUB,
20345 reg: regInfo{
20346 inputs: []inputInfo{
20347 {0, 402653183},
20348 {1, 402653183},
20349 {2, 402653183},
20350 },
20351 outputs: []outputInfo{
20352 {0, 335544319},
20353 },
20354 },
20355 },
20356 {
20357 name: "MSUBW",
20358 argLen: 3,
20359 asm: arm64.AMSUBW,
20360 reg: regInfo{
20361 inputs: []inputInfo{
20362 {0, 402653183},
20363 {1, 402653183},
20364 {2, 402653183},
20365 },
20366 outputs: []outputInfo{
20367 {0, 335544319},
20368 },
20369 },
20370 },
20371 {
20372 name: "SLL",
20373 argLen: 2,
20374 asm: arm64.ALSL,
20375 reg: regInfo{
20376 inputs: []inputInfo{
20377 {0, 402653183},
20378 {1, 402653183},
20379 },
20380 outputs: []outputInfo{
20381 {0, 335544319},
20382 },
20383 },
20384 },
20385 {
20386 name: "SLLconst",
20387 auxType: auxInt64,
20388 argLen: 1,
20389 asm: arm64.ALSL,
20390 reg: regInfo{
20391 inputs: []inputInfo{
20392 {0, 402653183},
20393 },
20394 outputs: []outputInfo{
20395 {0, 335544319},
20396 },
20397 },
20398 },
20399 {
20400 name: "SRL",
20401 argLen: 2,
20402 asm: arm64.ALSR,
20403 reg: regInfo{
20404 inputs: []inputInfo{
20405 {0, 402653183},
20406 {1, 402653183},
20407 },
20408 outputs: []outputInfo{
20409 {0, 335544319},
20410 },
20411 },
20412 },
20413 {
20414 name: "SRLconst",
20415 auxType: auxInt64,
20416 argLen: 1,
20417 asm: arm64.ALSR,
20418 reg: regInfo{
20419 inputs: []inputInfo{
20420 {0, 402653183},
20421 },
20422 outputs: []outputInfo{
20423 {0, 335544319},
20424 },
20425 },
20426 },
20427 {
20428 name: "SRA",
20429 argLen: 2,
20430 asm: arm64.AASR,
20431 reg: regInfo{
20432 inputs: []inputInfo{
20433 {0, 402653183},
20434 {1, 402653183},
20435 },
20436 outputs: []outputInfo{
20437 {0, 335544319},
20438 },
20439 },
20440 },
20441 {
20442 name: "SRAconst",
20443 auxType: auxInt64,
20444 argLen: 1,
20445 asm: arm64.AASR,
20446 reg: regInfo{
20447 inputs: []inputInfo{
20448 {0, 402653183},
20449 },
20450 outputs: []outputInfo{
20451 {0, 335544319},
20452 },
20453 },
20454 },
20455 {
20456 name: "ROR",
20457 argLen: 2,
20458 asm: arm64.AROR,
20459 reg: regInfo{
20460 inputs: []inputInfo{
20461 {0, 402653183},
20462 {1, 402653183},
20463 },
20464 outputs: []outputInfo{
20465 {0, 335544319},
20466 },
20467 },
20468 },
20469 {
20470 name: "RORW",
20471 argLen: 2,
20472 asm: arm64.ARORW,
20473 reg: regInfo{
20474 inputs: []inputInfo{
20475 {0, 402653183},
20476 {1, 402653183},
20477 },
20478 outputs: []outputInfo{
20479 {0, 335544319},
20480 },
20481 },
20482 },
20483 {
20484 name: "RORconst",
20485 auxType: auxInt64,
20486 argLen: 1,
20487 asm: arm64.AROR,
20488 reg: regInfo{
20489 inputs: []inputInfo{
20490 {0, 402653183},
20491 },
20492 outputs: []outputInfo{
20493 {0, 335544319},
20494 },
20495 },
20496 },
20497 {
20498 name: "RORWconst",
20499 auxType: auxInt64,
20500 argLen: 1,
20501 asm: arm64.ARORW,
20502 reg: regInfo{
20503 inputs: []inputInfo{
20504 {0, 402653183},
20505 },
20506 outputs: []outputInfo{
20507 {0, 335544319},
20508 },
20509 },
20510 },
20511 {
20512 name: "EXTRconst",
20513 auxType: auxInt64,
20514 argLen: 2,
20515 asm: arm64.AEXTR,
20516 reg: regInfo{
20517 inputs: []inputInfo{
20518 {0, 402653183},
20519 {1, 402653183},
20520 },
20521 outputs: []outputInfo{
20522 {0, 335544319},
20523 },
20524 },
20525 },
20526 {
20527 name: "EXTRWconst",
20528 auxType: auxInt64,
20529 argLen: 2,
20530 asm: arm64.AEXTRW,
20531 reg: regInfo{
20532 inputs: []inputInfo{
20533 {0, 402653183},
20534 {1, 402653183},
20535 },
20536 outputs: []outputInfo{
20537 {0, 335544319},
20538 },
20539 },
20540 },
20541 {
20542 name: "CMP",
20543 argLen: 2,
20544 asm: arm64.ACMP,
20545 reg: regInfo{
20546 inputs: []inputInfo{
20547 {0, 402653183},
20548 {1, 402653183},
20549 },
20550 },
20551 },
20552 {
20553 name: "CMPconst",
20554 auxType: auxInt64,
20555 argLen: 1,
20556 asm: arm64.ACMP,
20557 reg: regInfo{
20558 inputs: []inputInfo{
20559 {0, 402653183},
20560 },
20561 },
20562 },
20563 {
20564 name: "CMPW",
20565 argLen: 2,
20566 asm: arm64.ACMPW,
20567 reg: regInfo{
20568 inputs: []inputInfo{
20569 {0, 402653183},
20570 {1, 402653183},
20571 },
20572 },
20573 },
20574 {
20575 name: "CMPWconst",
20576 auxType: auxInt32,
20577 argLen: 1,
20578 asm: arm64.ACMPW,
20579 reg: regInfo{
20580 inputs: []inputInfo{
20581 {0, 402653183},
20582 },
20583 },
20584 },
20585 {
20586 name: "CMN",
20587 argLen: 2,
20588 commutative: true,
20589 asm: arm64.ACMN,
20590 reg: regInfo{
20591 inputs: []inputInfo{
20592 {0, 402653183},
20593 {1, 402653183},
20594 },
20595 },
20596 },
20597 {
20598 name: "CMNconst",
20599 auxType: auxInt64,
20600 argLen: 1,
20601 asm: arm64.ACMN,
20602 reg: regInfo{
20603 inputs: []inputInfo{
20604 {0, 402653183},
20605 },
20606 },
20607 },
20608 {
20609 name: "CMNW",
20610 argLen: 2,
20611 commutative: true,
20612 asm: arm64.ACMNW,
20613 reg: regInfo{
20614 inputs: []inputInfo{
20615 {0, 402653183},
20616 {1, 402653183},
20617 },
20618 },
20619 },
20620 {
20621 name: "CMNWconst",
20622 auxType: auxInt32,
20623 argLen: 1,
20624 asm: arm64.ACMNW,
20625 reg: regInfo{
20626 inputs: []inputInfo{
20627 {0, 402653183},
20628 },
20629 },
20630 },
20631 {
20632 name: "TST",
20633 argLen: 2,
20634 commutative: true,
20635 asm: arm64.ATST,
20636 reg: regInfo{
20637 inputs: []inputInfo{
20638 {0, 402653183},
20639 {1, 402653183},
20640 },
20641 },
20642 },
20643 {
20644 name: "TSTconst",
20645 auxType: auxInt64,
20646 argLen: 1,
20647 asm: arm64.ATST,
20648 reg: regInfo{
20649 inputs: []inputInfo{
20650 {0, 402653183},
20651 },
20652 },
20653 },
20654 {
20655 name: "TSTW",
20656 argLen: 2,
20657 commutative: true,
20658 asm: arm64.ATSTW,
20659 reg: regInfo{
20660 inputs: []inputInfo{
20661 {0, 402653183},
20662 {1, 402653183},
20663 },
20664 },
20665 },
20666 {
20667 name: "TSTWconst",
20668 auxType: auxInt32,
20669 argLen: 1,
20670 asm: arm64.ATSTW,
20671 reg: regInfo{
20672 inputs: []inputInfo{
20673 {0, 402653183},
20674 },
20675 },
20676 },
20677 {
20678 name: "FCMPS",
20679 argLen: 2,
20680 asm: arm64.AFCMPS,
20681 reg: regInfo{
20682 inputs: []inputInfo{
20683 {0, 9223372034707292160},
20684 {1, 9223372034707292160},
20685 },
20686 },
20687 },
20688 {
20689 name: "FCMPD",
20690 argLen: 2,
20691 asm: arm64.AFCMPD,
20692 reg: regInfo{
20693 inputs: []inputInfo{
20694 {0, 9223372034707292160},
20695 {1, 9223372034707292160},
20696 },
20697 },
20698 },
20699 {
20700 name: "FCMPS0",
20701 argLen: 1,
20702 asm: arm64.AFCMPS,
20703 reg: regInfo{
20704 inputs: []inputInfo{
20705 {0, 9223372034707292160},
20706 },
20707 },
20708 },
20709 {
20710 name: "FCMPD0",
20711 argLen: 1,
20712 asm: arm64.AFCMPD,
20713 reg: regInfo{
20714 inputs: []inputInfo{
20715 {0, 9223372034707292160},
20716 },
20717 },
20718 },
20719 {
20720 name: "MVNshiftLL",
20721 auxType: auxInt64,
20722 argLen: 1,
20723 asm: arm64.AMVN,
20724 reg: regInfo{
20725 inputs: []inputInfo{
20726 {0, 402653183},
20727 },
20728 outputs: []outputInfo{
20729 {0, 335544319},
20730 },
20731 },
20732 },
20733 {
20734 name: "MVNshiftRL",
20735 auxType: auxInt64,
20736 argLen: 1,
20737 asm: arm64.AMVN,
20738 reg: regInfo{
20739 inputs: []inputInfo{
20740 {0, 402653183},
20741 },
20742 outputs: []outputInfo{
20743 {0, 335544319},
20744 },
20745 },
20746 },
20747 {
20748 name: "MVNshiftRA",
20749 auxType: auxInt64,
20750 argLen: 1,
20751 asm: arm64.AMVN,
20752 reg: regInfo{
20753 inputs: []inputInfo{
20754 {0, 402653183},
20755 },
20756 outputs: []outputInfo{
20757 {0, 335544319},
20758 },
20759 },
20760 },
20761 {
20762 name: "MVNshiftRO",
20763 auxType: auxInt64,
20764 argLen: 1,
20765 asm: arm64.AMVN,
20766 reg: regInfo{
20767 inputs: []inputInfo{
20768 {0, 402653183},
20769 },
20770 outputs: []outputInfo{
20771 {0, 335544319},
20772 },
20773 },
20774 },
20775 {
20776 name: "NEGshiftLL",
20777 auxType: auxInt64,
20778 argLen: 1,
20779 asm: arm64.ANEG,
20780 reg: regInfo{
20781 inputs: []inputInfo{
20782 {0, 402653183},
20783 },
20784 outputs: []outputInfo{
20785 {0, 335544319},
20786 },
20787 },
20788 },
20789 {
20790 name: "NEGshiftRL",
20791 auxType: auxInt64,
20792 argLen: 1,
20793 asm: arm64.ANEG,
20794 reg: regInfo{
20795 inputs: []inputInfo{
20796 {0, 402653183},
20797 },
20798 outputs: []outputInfo{
20799 {0, 335544319},
20800 },
20801 },
20802 },
20803 {
20804 name: "NEGshiftRA",
20805 auxType: auxInt64,
20806 argLen: 1,
20807 asm: arm64.ANEG,
20808 reg: regInfo{
20809 inputs: []inputInfo{
20810 {0, 402653183},
20811 },
20812 outputs: []outputInfo{
20813 {0, 335544319},
20814 },
20815 },
20816 },
20817 {
20818 name: "ADDshiftLL",
20819 auxType: auxInt64,
20820 argLen: 2,
20821 asm: arm64.AADD,
20822 reg: regInfo{
20823 inputs: []inputInfo{
20824 {0, 402653183},
20825 {1, 402653183},
20826 },
20827 outputs: []outputInfo{
20828 {0, 335544319},
20829 },
20830 },
20831 },
20832 {
20833 name: "ADDshiftRL",
20834 auxType: auxInt64,
20835 argLen: 2,
20836 asm: arm64.AADD,
20837 reg: regInfo{
20838 inputs: []inputInfo{
20839 {0, 402653183},
20840 {1, 402653183},
20841 },
20842 outputs: []outputInfo{
20843 {0, 335544319},
20844 },
20845 },
20846 },
20847 {
20848 name: "ADDshiftRA",
20849 auxType: auxInt64,
20850 argLen: 2,
20851 asm: arm64.AADD,
20852 reg: regInfo{
20853 inputs: []inputInfo{
20854 {0, 402653183},
20855 {1, 402653183},
20856 },
20857 outputs: []outputInfo{
20858 {0, 335544319},
20859 },
20860 },
20861 },
20862 {
20863 name: "SUBshiftLL",
20864 auxType: auxInt64,
20865 argLen: 2,
20866 asm: arm64.ASUB,
20867 reg: regInfo{
20868 inputs: []inputInfo{
20869 {0, 402653183},
20870 {1, 402653183},
20871 },
20872 outputs: []outputInfo{
20873 {0, 335544319},
20874 },
20875 },
20876 },
20877 {
20878 name: "SUBshiftRL",
20879 auxType: auxInt64,
20880 argLen: 2,
20881 asm: arm64.ASUB,
20882 reg: regInfo{
20883 inputs: []inputInfo{
20884 {0, 402653183},
20885 {1, 402653183},
20886 },
20887 outputs: []outputInfo{
20888 {0, 335544319},
20889 },
20890 },
20891 },
20892 {
20893 name: "SUBshiftRA",
20894 auxType: auxInt64,
20895 argLen: 2,
20896 asm: arm64.ASUB,
20897 reg: regInfo{
20898 inputs: []inputInfo{
20899 {0, 402653183},
20900 {1, 402653183},
20901 },
20902 outputs: []outputInfo{
20903 {0, 335544319},
20904 },
20905 },
20906 },
20907 {
20908 name: "ANDshiftLL",
20909 auxType: auxInt64,
20910 argLen: 2,
20911 asm: arm64.AAND,
20912 reg: regInfo{
20913 inputs: []inputInfo{
20914 {0, 402653183},
20915 {1, 402653183},
20916 },
20917 outputs: []outputInfo{
20918 {0, 335544319},
20919 },
20920 },
20921 },
20922 {
20923 name: "ANDshiftRL",
20924 auxType: auxInt64,
20925 argLen: 2,
20926 asm: arm64.AAND,
20927 reg: regInfo{
20928 inputs: []inputInfo{
20929 {0, 402653183},
20930 {1, 402653183},
20931 },
20932 outputs: []outputInfo{
20933 {0, 335544319},
20934 },
20935 },
20936 },
20937 {
20938 name: "ANDshiftRA",
20939 auxType: auxInt64,
20940 argLen: 2,
20941 asm: arm64.AAND,
20942 reg: regInfo{
20943 inputs: []inputInfo{
20944 {0, 402653183},
20945 {1, 402653183},
20946 },
20947 outputs: []outputInfo{
20948 {0, 335544319},
20949 },
20950 },
20951 },
20952 {
20953 name: "ANDshiftRO",
20954 auxType: auxInt64,
20955 argLen: 2,
20956 asm: arm64.AAND,
20957 reg: regInfo{
20958 inputs: []inputInfo{
20959 {0, 402653183},
20960 {1, 402653183},
20961 },
20962 outputs: []outputInfo{
20963 {0, 335544319},
20964 },
20965 },
20966 },
20967 {
20968 name: "ORshiftLL",
20969 auxType: auxInt64,
20970 argLen: 2,
20971 asm: arm64.AORR,
20972 reg: regInfo{
20973 inputs: []inputInfo{
20974 {0, 402653183},
20975 {1, 402653183},
20976 },
20977 outputs: []outputInfo{
20978 {0, 335544319},
20979 },
20980 },
20981 },
20982 {
20983 name: "ORshiftRL",
20984 auxType: auxInt64,
20985 argLen: 2,
20986 asm: arm64.AORR,
20987 reg: regInfo{
20988 inputs: []inputInfo{
20989 {0, 402653183},
20990 {1, 402653183},
20991 },
20992 outputs: []outputInfo{
20993 {0, 335544319},
20994 },
20995 },
20996 },
20997 {
20998 name: "ORshiftRA",
20999 auxType: auxInt64,
21000 argLen: 2,
21001 asm: arm64.AORR,
21002 reg: regInfo{
21003 inputs: []inputInfo{
21004 {0, 402653183},
21005 {1, 402653183},
21006 },
21007 outputs: []outputInfo{
21008 {0, 335544319},
21009 },
21010 },
21011 },
21012 {
21013 name: "ORshiftRO",
21014 auxType: auxInt64,
21015 argLen: 2,
21016 asm: arm64.AORR,
21017 reg: regInfo{
21018 inputs: []inputInfo{
21019 {0, 402653183},
21020 {1, 402653183},
21021 },
21022 outputs: []outputInfo{
21023 {0, 335544319},
21024 },
21025 },
21026 },
21027 {
21028 name: "XORshiftLL",
21029 auxType: auxInt64,
21030 argLen: 2,
21031 asm: arm64.AEOR,
21032 reg: regInfo{
21033 inputs: []inputInfo{
21034 {0, 402653183},
21035 {1, 402653183},
21036 },
21037 outputs: []outputInfo{
21038 {0, 335544319},
21039 },
21040 },
21041 },
21042 {
21043 name: "XORshiftRL",
21044 auxType: auxInt64,
21045 argLen: 2,
21046 asm: arm64.AEOR,
21047 reg: regInfo{
21048 inputs: []inputInfo{
21049 {0, 402653183},
21050 {1, 402653183},
21051 },
21052 outputs: []outputInfo{
21053 {0, 335544319},
21054 },
21055 },
21056 },
21057 {
21058 name: "XORshiftRA",
21059 auxType: auxInt64,
21060 argLen: 2,
21061 asm: arm64.AEOR,
21062 reg: regInfo{
21063 inputs: []inputInfo{
21064 {0, 402653183},
21065 {1, 402653183},
21066 },
21067 outputs: []outputInfo{
21068 {0, 335544319},
21069 },
21070 },
21071 },
21072 {
21073 name: "XORshiftRO",
21074 auxType: auxInt64,
21075 argLen: 2,
21076 asm: arm64.AEOR,
21077 reg: regInfo{
21078 inputs: []inputInfo{
21079 {0, 402653183},
21080 {1, 402653183},
21081 },
21082 outputs: []outputInfo{
21083 {0, 335544319},
21084 },
21085 },
21086 },
21087 {
21088 name: "BICshiftLL",
21089 auxType: auxInt64,
21090 argLen: 2,
21091 asm: arm64.ABIC,
21092 reg: regInfo{
21093 inputs: []inputInfo{
21094 {0, 402653183},
21095 {1, 402653183},
21096 },
21097 outputs: []outputInfo{
21098 {0, 335544319},
21099 },
21100 },
21101 },
21102 {
21103 name: "BICshiftRL",
21104 auxType: auxInt64,
21105 argLen: 2,
21106 asm: arm64.ABIC,
21107 reg: regInfo{
21108 inputs: []inputInfo{
21109 {0, 402653183},
21110 {1, 402653183},
21111 },
21112 outputs: []outputInfo{
21113 {0, 335544319},
21114 },
21115 },
21116 },
21117 {
21118 name: "BICshiftRA",
21119 auxType: auxInt64,
21120 argLen: 2,
21121 asm: arm64.ABIC,
21122 reg: regInfo{
21123 inputs: []inputInfo{
21124 {0, 402653183},
21125 {1, 402653183},
21126 },
21127 outputs: []outputInfo{
21128 {0, 335544319},
21129 },
21130 },
21131 },
21132 {
21133 name: "BICshiftRO",
21134 auxType: auxInt64,
21135 argLen: 2,
21136 asm: arm64.ABIC,
21137 reg: regInfo{
21138 inputs: []inputInfo{
21139 {0, 402653183},
21140 {1, 402653183},
21141 },
21142 outputs: []outputInfo{
21143 {0, 335544319},
21144 },
21145 },
21146 },
21147 {
21148 name: "EONshiftLL",
21149 auxType: auxInt64,
21150 argLen: 2,
21151 asm: arm64.AEON,
21152 reg: regInfo{
21153 inputs: []inputInfo{
21154 {0, 402653183},
21155 {1, 402653183},
21156 },
21157 outputs: []outputInfo{
21158 {0, 335544319},
21159 },
21160 },
21161 },
21162 {
21163 name: "EONshiftRL",
21164 auxType: auxInt64,
21165 argLen: 2,
21166 asm: arm64.AEON,
21167 reg: regInfo{
21168 inputs: []inputInfo{
21169 {0, 402653183},
21170 {1, 402653183},
21171 },
21172 outputs: []outputInfo{
21173 {0, 335544319},
21174 },
21175 },
21176 },
21177 {
21178 name: "EONshiftRA",
21179 auxType: auxInt64,
21180 argLen: 2,
21181 asm: arm64.AEON,
21182 reg: regInfo{
21183 inputs: []inputInfo{
21184 {0, 402653183},
21185 {1, 402653183},
21186 },
21187 outputs: []outputInfo{
21188 {0, 335544319},
21189 },
21190 },
21191 },
21192 {
21193 name: "EONshiftRO",
21194 auxType: auxInt64,
21195 argLen: 2,
21196 asm: arm64.AEON,
21197 reg: regInfo{
21198 inputs: []inputInfo{
21199 {0, 402653183},
21200 {1, 402653183},
21201 },
21202 outputs: []outputInfo{
21203 {0, 335544319},
21204 },
21205 },
21206 },
21207 {
21208 name: "ORNshiftLL",
21209 auxType: auxInt64,
21210 argLen: 2,
21211 asm: arm64.AORN,
21212 reg: regInfo{
21213 inputs: []inputInfo{
21214 {0, 402653183},
21215 {1, 402653183},
21216 },
21217 outputs: []outputInfo{
21218 {0, 335544319},
21219 },
21220 },
21221 },
21222 {
21223 name: "ORNshiftRL",
21224 auxType: auxInt64,
21225 argLen: 2,
21226 asm: arm64.AORN,
21227 reg: regInfo{
21228 inputs: []inputInfo{
21229 {0, 402653183},
21230 {1, 402653183},
21231 },
21232 outputs: []outputInfo{
21233 {0, 335544319},
21234 },
21235 },
21236 },
21237 {
21238 name: "ORNshiftRA",
21239 auxType: auxInt64,
21240 argLen: 2,
21241 asm: arm64.AORN,
21242 reg: regInfo{
21243 inputs: []inputInfo{
21244 {0, 402653183},
21245 {1, 402653183},
21246 },
21247 outputs: []outputInfo{
21248 {0, 335544319},
21249 },
21250 },
21251 },
21252 {
21253 name: "ORNshiftRO",
21254 auxType: auxInt64,
21255 argLen: 2,
21256 asm: arm64.AORN,
21257 reg: regInfo{
21258 inputs: []inputInfo{
21259 {0, 402653183},
21260 {1, 402653183},
21261 },
21262 outputs: []outputInfo{
21263 {0, 335544319},
21264 },
21265 },
21266 },
21267 {
21268 name: "CMPshiftLL",
21269 auxType: auxInt64,
21270 argLen: 2,
21271 asm: arm64.ACMP,
21272 reg: regInfo{
21273 inputs: []inputInfo{
21274 {0, 402653183},
21275 {1, 402653183},
21276 },
21277 },
21278 },
21279 {
21280 name: "CMPshiftRL",
21281 auxType: auxInt64,
21282 argLen: 2,
21283 asm: arm64.ACMP,
21284 reg: regInfo{
21285 inputs: []inputInfo{
21286 {0, 402653183},
21287 {1, 402653183},
21288 },
21289 },
21290 },
21291 {
21292 name: "CMPshiftRA",
21293 auxType: auxInt64,
21294 argLen: 2,
21295 asm: arm64.ACMP,
21296 reg: regInfo{
21297 inputs: []inputInfo{
21298 {0, 402653183},
21299 {1, 402653183},
21300 },
21301 },
21302 },
21303 {
21304 name: "CMNshiftLL",
21305 auxType: auxInt64,
21306 argLen: 2,
21307 asm: arm64.ACMN,
21308 reg: regInfo{
21309 inputs: []inputInfo{
21310 {0, 402653183},
21311 {1, 402653183},
21312 },
21313 },
21314 },
21315 {
21316 name: "CMNshiftRL",
21317 auxType: auxInt64,
21318 argLen: 2,
21319 asm: arm64.ACMN,
21320 reg: regInfo{
21321 inputs: []inputInfo{
21322 {0, 402653183},
21323 {1, 402653183},
21324 },
21325 },
21326 },
21327 {
21328 name: "CMNshiftRA",
21329 auxType: auxInt64,
21330 argLen: 2,
21331 asm: arm64.ACMN,
21332 reg: regInfo{
21333 inputs: []inputInfo{
21334 {0, 402653183},
21335 {1, 402653183},
21336 },
21337 },
21338 },
21339 {
21340 name: "TSTshiftLL",
21341 auxType: auxInt64,
21342 argLen: 2,
21343 asm: arm64.ATST,
21344 reg: regInfo{
21345 inputs: []inputInfo{
21346 {0, 402653183},
21347 {1, 402653183},
21348 },
21349 },
21350 },
21351 {
21352 name: "TSTshiftRL",
21353 auxType: auxInt64,
21354 argLen: 2,
21355 asm: arm64.ATST,
21356 reg: regInfo{
21357 inputs: []inputInfo{
21358 {0, 402653183},
21359 {1, 402653183},
21360 },
21361 },
21362 },
21363 {
21364 name: "TSTshiftRA",
21365 auxType: auxInt64,
21366 argLen: 2,
21367 asm: arm64.ATST,
21368 reg: regInfo{
21369 inputs: []inputInfo{
21370 {0, 402653183},
21371 {1, 402653183},
21372 },
21373 },
21374 },
21375 {
21376 name: "TSTshiftRO",
21377 auxType: auxInt64,
21378 argLen: 2,
21379 asm: arm64.ATST,
21380 reg: regInfo{
21381 inputs: []inputInfo{
21382 {0, 402653183},
21383 {1, 402653183},
21384 },
21385 },
21386 },
21387 {
21388 name: "BFI",
21389 auxType: auxARM64BitField,
21390 argLen: 2,
21391 resultInArg0: true,
21392 asm: arm64.ABFI,
21393 reg: regInfo{
21394 inputs: []inputInfo{
21395 {0, 335544319},
21396 {1, 335544319},
21397 },
21398 outputs: []outputInfo{
21399 {0, 335544319},
21400 },
21401 },
21402 },
21403 {
21404 name: "BFXIL",
21405 auxType: auxARM64BitField,
21406 argLen: 2,
21407 resultInArg0: true,
21408 asm: arm64.ABFXIL,
21409 reg: regInfo{
21410 inputs: []inputInfo{
21411 {0, 335544319},
21412 {1, 335544319},
21413 },
21414 outputs: []outputInfo{
21415 {0, 335544319},
21416 },
21417 },
21418 },
21419 {
21420 name: "SBFIZ",
21421 auxType: auxARM64BitField,
21422 argLen: 1,
21423 asm: arm64.ASBFIZ,
21424 reg: regInfo{
21425 inputs: []inputInfo{
21426 {0, 402653183},
21427 },
21428 outputs: []outputInfo{
21429 {0, 335544319},
21430 },
21431 },
21432 },
21433 {
21434 name: "SBFX",
21435 auxType: auxARM64BitField,
21436 argLen: 1,
21437 asm: arm64.ASBFX,
21438 reg: regInfo{
21439 inputs: []inputInfo{
21440 {0, 402653183},
21441 },
21442 outputs: []outputInfo{
21443 {0, 335544319},
21444 },
21445 },
21446 },
21447 {
21448 name: "UBFIZ",
21449 auxType: auxARM64BitField,
21450 argLen: 1,
21451 asm: arm64.AUBFIZ,
21452 reg: regInfo{
21453 inputs: []inputInfo{
21454 {0, 402653183},
21455 },
21456 outputs: []outputInfo{
21457 {0, 335544319},
21458 },
21459 },
21460 },
21461 {
21462 name: "UBFX",
21463 auxType: auxARM64BitField,
21464 argLen: 1,
21465 asm: arm64.AUBFX,
21466 reg: regInfo{
21467 inputs: []inputInfo{
21468 {0, 402653183},
21469 },
21470 outputs: []outputInfo{
21471 {0, 335544319},
21472 },
21473 },
21474 },
21475 {
21476 name: "MOVDconst",
21477 auxType: auxInt64,
21478 argLen: 0,
21479 rematerializeable: true,
21480 asm: arm64.AMOVD,
21481 reg: regInfo{
21482 outputs: []outputInfo{
21483 {0, 335544319},
21484 },
21485 },
21486 },
21487 {
21488 name: "FMOVSconst",
21489 auxType: auxFloat64,
21490 argLen: 0,
21491 rematerializeable: true,
21492 asm: arm64.AFMOVS,
21493 reg: regInfo{
21494 outputs: []outputInfo{
21495 {0, 9223372034707292160},
21496 },
21497 },
21498 },
21499 {
21500 name: "FMOVDconst",
21501 auxType: auxFloat64,
21502 argLen: 0,
21503 rematerializeable: true,
21504 asm: arm64.AFMOVD,
21505 reg: regInfo{
21506 outputs: []outputInfo{
21507 {0, 9223372034707292160},
21508 },
21509 },
21510 },
21511 {
21512 name: "MOVDaddr",
21513 auxType: auxSymOff,
21514 argLen: 1,
21515 rematerializeable: true,
21516 symEffect: SymAddr,
21517 asm: arm64.AMOVD,
21518 reg: regInfo{
21519 inputs: []inputInfo{
21520 {0, 9223372037928517632},
21521 },
21522 outputs: []outputInfo{
21523 {0, 335544319},
21524 },
21525 },
21526 },
21527 {
21528 name: "MOVBload",
21529 auxType: auxSymOff,
21530 argLen: 2,
21531 faultOnNilArg0: true,
21532 symEffect: SymRead,
21533 asm: arm64.AMOVB,
21534 reg: regInfo{
21535 inputs: []inputInfo{
21536 {0, 9223372038331170815},
21537 },
21538 outputs: []outputInfo{
21539 {0, 335544319},
21540 },
21541 },
21542 },
21543 {
21544 name: "MOVBUload",
21545 auxType: auxSymOff,
21546 argLen: 2,
21547 faultOnNilArg0: true,
21548 symEffect: SymRead,
21549 asm: arm64.AMOVBU,
21550 reg: regInfo{
21551 inputs: []inputInfo{
21552 {0, 9223372038331170815},
21553 },
21554 outputs: []outputInfo{
21555 {0, 335544319},
21556 },
21557 },
21558 },
21559 {
21560 name: "MOVHload",
21561 auxType: auxSymOff,
21562 argLen: 2,
21563 faultOnNilArg0: true,
21564 symEffect: SymRead,
21565 asm: arm64.AMOVH,
21566 reg: regInfo{
21567 inputs: []inputInfo{
21568 {0, 9223372038331170815},
21569 },
21570 outputs: []outputInfo{
21571 {0, 335544319},
21572 },
21573 },
21574 },
21575 {
21576 name: "MOVHUload",
21577 auxType: auxSymOff,
21578 argLen: 2,
21579 faultOnNilArg0: true,
21580 symEffect: SymRead,
21581 asm: arm64.AMOVHU,
21582 reg: regInfo{
21583 inputs: []inputInfo{
21584 {0, 9223372038331170815},
21585 },
21586 outputs: []outputInfo{
21587 {0, 335544319},
21588 },
21589 },
21590 },
21591 {
21592 name: "MOVWload",
21593 auxType: auxSymOff,
21594 argLen: 2,
21595 faultOnNilArg0: true,
21596 symEffect: SymRead,
21597 asm: arm64.AMOVW,
21598 reg: regInfo{
21599 inputs: []inputInfo{
21600 {0, 9223372038331170815},
21601 },
21602 outputs: []outputInfo{
21603 {0, 335544319},
21604 },
21605 },
21606 },
21607 {
21608 name: "MOVWUload",
21609 auxType: auxSymOff,
21610 argLen: 2,
21611 faultOnNilArg0: true,
21612 symEffect: SymRead,
21613 asm: arm64.AMOVWU,
21614 reg: regInfo{
21615 inputs: []inputInfo{
21616 {0, 9223372038331170815},
21617 },
21618 outputs: []outputInfo{
21619 {0, 335544319},
21620 },
21621 },
21622 },
21623 {
21624 name: "MOVDload",
21625 auxType: auxSymOff,
21626 argLen: 2,
21627 faultOnNilArg0: true,
21628 symEffect: SymRead,
21629 asm: arm64.AMOVD,
21630 reg: regInfo{
21631 inputs: []inputInfo{
21632 {0, 9223372038331170815},
21633 },
21634 outputs: []outputInfo{
21635 {0, 335544319},
21636 },
21637 },
21638 },
21639 {
21640 name: "FMOVSload",
21641 auxType: auxSymOff,
21642 argLen: 2,
21643 faultOnNilArg0: true,
21644 symEffect: SymRead,
21645 asm: arm64.AFMOVS,
21646 reg: regInfo{
21647 inputs: []inputInfo{
21648 {0, 9223372038331170815},
21649 },
21650 outputs: []outputInfo{
21651 {0, 9223372034707292160},
21652 },
21653 },
21654 },
21655 {
21656 name: "FMOVDload",
21657 auxType: auxSymOff,
21658 argLen: 2,
21659 faultOnNilArg0: true,
21660 symEffect: SymRead,
21661 asm: arm64.AFMOVD,
21662 reg: regInfo{
21663 inputs: []inputInfo{
21664 {0, 9223372038331170815},
21665 },
21666 outputs: []outputInfo{
21667 {0, 9223372034707292160},
21668 },
21669 },
21670 },
21671 {
21672 name: "LDP",
21673 auxType: auxSymOff,
21674 argLen: 2,
21675 faultOnNilArg0: true,
21676 symEffect: SymRead,
21677 asm: arm64.ALDP,
21678 reg: regInfo{
21679 inputs: []inputInfo{
21680 {0, 9223372038331170815},
21681 },
21682 outputs: []outputInfo{
21683 {0, 402653183},
21684 {1, 402653183},
21685 },
21686 },
21687 },
21688 {
21689 name: "LDPW",
21690 auxType: auxSymOff,
21691 argLen: 2,
21692 faultOnNilArg0: true,
21693 symEffect: SymRead,
21694 asm: arm64.ALDPW,
21695 reg: regInfo{
21696 inputs: []inputInfo{
21697 {0, 9223372038331170815},
21698 },
21699 outputs: []outputInfo{
21700 {0, 402653183},
21701 {1, 402653183},
21702 },
21703 },
21704 },
21705 {
21706 name: "LDPSW",
21707 auxType: auxSymOff,
21708 argLen: 2,
21709 faultOnNilArg0: true,
21710 symEffect: SymRead,
21711 asm: arm64.ALDPSW,
21712 reg: regInfo{
21713 inputs: []inputInfo{
21714 {0, 9223372038331170815},
21715 },
21716 outputs: []outputInfo{
21717 {0, 402653183},
21718 {1, 402653183},
21719 },
21720 },
21721 },
21722 {
21723 name: "FLDPD",
21724 auxType: auxSymOff,
21725 argLen: 2,
21726 faultOnNilArg0: true,
21727 symEffect: SymRead,
21728 asm: arm64.AFLDPD,
21729 reg: regInfo{
21730 inputs: []inputInfo{
21731 {0, 9223372038331170815},
21732 },
21733 outputs: []outputInfo{
21734 {0, 9223372034707292160},
21735 {1, 9223372034707292160},
21736 },
21737 },
21738 },
21739 {
21740 name: "FLDPS",
21741 auxType: auxSymOff,
21742 argLen: 2,
21743 faultOnNilArg0: true,
21744 symEffect: SymRead,
21745 asm: arm64.AFLDPS,
21746 reg: regInfo{
21747 inputs: []inputInfo{
21748 {0, 9223372038331170815},
21749 },
21750 outputs: []outputInfo{
21751 {0, 9223372034707292160},
21752 {1, 9223372034707292160},
21753 },
21754 },
21755 },
21756 {
21757 name: "MOVDloadidx",
21758 argLen: 3,
21759 asm: arm64.AMOVD,
21760 reg: regInfo{
21761 inputs: []inputInfo{
21762 {1, 402653183},
21763 {0, 9223372038331170815},
21764 },
21765 outputs: []outputInfo{
21766 {0, 335544319},
21767 },
21768 },
21769 },
21770 {
21771 name: "MOVWloadidx",
21772 argLen: 3,
21773 asm: arm64.AMOVW,
21774 reg: regInfo{
21775 inputs: []inputInfo{
21776 {1, 402653183},
21777 {0, 9223372038331170815},
21778 },
21779 outputs: []outputInfo{
21780 {0, 335544319},
21781 },
21782 },
21783 },
21784 {
21785 name: "MOVWUloadidx",
21786 argLen: 3,
21787 asm: arm64.AMOVWU,
21788 reg: regInfo{
21789 inputs: []inputInfo{
21790 {1, 402653183},
21791 {0, 9223372038331170815},
21792 },
21793 outputs: []outputInfo{
21794 {0, 335544319},
21795 },
21796 },
21797 },
21798 {
21799 name: "MOVHloadidx",
21800 argLen: 3,
21801 asm: arm64.AMOVH,
21802 reg: regInfo{
21803 inputs: []inputInfo{
21804 {1, 402653183},
21805 {0, 9223372038331170815},
21806 },
21807 outputs: []outputInfo{
21808 {0, 335544319},
21809 },
21810 },
21811 },
21812 {
21813 name: "MOVHUloadidx",
21814 argLen: 3,
21815 asm: arm64.AMOVHU,
21816 reg: regInfo{
21817 inputs: []inputInfo{
21818 {1, 402653183},
21819 {0, 9223372038331170815},
21820 },
21821 outputs: []outputInfo{
21822 {0, 335544319},
21823 },
21824 },
21825 },
21826 {
21827 name: "MOVBloadidx",
21828 argLen: 3,
21829 asm: arm64.AMOVB,
21830 reg: regInfo{
21831 inputs: []inputInfo{
21832 {1, 402653183},
21833 {0, 9223372038331170815},
21834 },
21835 outputs: []outputInfo{
21836 {0, 335544319},
21837 },
21838 },
21839 },
21840 {
21841 name: "MOVBUloadidx",
21842 argLen: 3,
21843 asm: arm64.AMOVBU,
21844 reg: regInfo{
21845 inputs: []inputInfo{
21846 {1, 402653183},
21847 {0, 9223372038331170815},
21848 },
21849 outputs: []outputInfo{
21850 {0, 335544319},
21851 },
21852 },
21853 },
21854 {
21855 name: "FMOVSloadidx",
21856 argLen: 3,
21857 asm: arm64.AFMOVS,
21858 reg: regInfo{
21859 inputs: []inputInfo{
21860 {1, 402653183},
21861 {0, 9223372038331170815},
21862 },
21863 outputs: []outputInfo{
21864 {0, 9223372034707292160},
21865 },
21866 },
21867 },
21868 {
21869 name: "FMOVDloadidx",
21870 argLen: 3,
21871 asm: arm64.AFMOVD,
21872 reg: regInfo{
21873 inputs: []inputInfo{
21874 {1, 402653183},
21875 {0, 9223372038331170815},
21876 },
21877 outputs: []outputInfo{
21878 {0, 9223372034707292160},
21879 },
21880 },
21881 },
21882 {
21883 name: "MOVHloadidx2",
21884 argLen: 3,
21885 asm: arm64.AMOVH,
21886 reg: regInfo{
21887 inputs: []inputInfo{
21888 {1, 402653183},
21889 {0, 9223372038331170815},
21890 },
21891 outputs: []outputInfo{
21892 {0, 335544319},
21893 },
21894 },
21895 },
21896 {
21897 name: "MOVHUloadidx2",
21898 argLen: 3,
21899 asm: arm64.AMOVHU,
21900 reg: regInfo{
21901 inputs: []inputInfo{
21902 {1, 402653183},
21903 {0, 9223372038331170815},
21904 },
21905 outputs: []outputInfo{
21906 {0, 335544319},
21907 },
21908 },
21909 },
21910 {
21911 name: "MOVWloadidx4",
21912 argLen: 3,
21913 asm: arm64.AMOVW,
21914 reg: regInfo{
21915 inputs: []inputInfo{
21916 {1, 402653183},
21917 {0, 9223372038331170815},
21918 },
21919 outputs: []outputInfo{
21920 {0, 335544319},
21921 },
21922 },
21923 },
21924 {
21925 name: "MOVWUloadidx4",
21926 argLen: 3,
21927 asm: arm64.AMOVWU,
21928 reg: regInfo{
21929 inputs: []inputInfo{
21930 {1, 402653183},
21931 {0, 9223372038331170815},
21932 },
21933 outputs: []outputInfo{
21934 {0, 335544319},
21935 },
21936 },
21937 },
21938 {
21939 name: "MOVDloadidx8",
21940 argLen: 3,
21941 asm: arm64.AMOVD,
21942 reg: regInfo{
21943 inputs: []inputInfo{
21944 {1, 402653183},
21945 {0, 9223372038331170815},
21946 },
21947 outputs: []outputInfo{
21948 {0, 335544319},
21949 },
21950 },
21951 },
21952 {
21953 name: "FMOVSloadidx4",
21954 argLen: 3,
21955 asm: arm64.AFMOVS,
21956 reg: regInfo{
21957 inputs: []inputInfo{
21958 {1, 402653183},
21959 {0, 9223372038331170815},
21960 },
21961 outputs: []outputInfo{
21962 {0, 9223372034707292160},
21963 },
21964 },
21965 },
21966 {
21967 name: "FMOVDloadidx8",
21968 argLen: 3,
21969 asm: arm64.AFMOVD,
21970 reg: regInfo{
21971 inputs: []inputInfo{
21972 {1, 402653183},
21973 {0, 9223372038331170815},
21974 },
21975 outputs: []outputInfo{
21976 {0, 9223372034707292160},
21977 },
21978 },
21979 },
21980 {
21981 name: "MOVBstore",
21982 auxType: auxSymOff,
21983 argLen: 3,
21984 faultOnNilArg0: true,
21985 symEffect: SymWrite,
21986 asm: arm64.AMOVB,
21987 reg: regInfo{
21988 inputs: []inputInfo{
21989 {1, 939524095},
21990 {0, 9223372038331170815},
21991 },
21992 },
21993 },
21994 {
21995 name: "MOVHstore",
21996 auxType: auxSymOff,
21997 argLen: 3,
21998 faultOnNilArg0: true,
21999 symEffect: SymWrite,
22000 asm: arm64.AMOVH,
22001 reg: regInfo{
22002 inputs: []inputInfo{
22003 {1, 939524095},
22004 {0, 9223372038331170815},
22005 },
22006 },
22007 },
22008 {
22009 name: "MOVWstore",
22010 auxType: auxSymOff,
22011 argLen: 3,
22012 faultOnNilArg0: true,
22013 symEffect: SymWrite,
22014 asm: arm64.AMOVW,
22015 reg: regInfo{
22016 inputs: []inputInfo{
22017 {1, 939524095},
22018 {0, 9223372038331170815},
22019 },
22020 },
22021 },
22022 {
22023 name: "MOVDstore",
22024 auxType: auxSymOff,
22025 argLen: 3,
22026 faultOnNilArg0: true,
22027 symEffect: SymWrite,
22028 asm: arm64.AMOVD,
22029 reg: regInfo{
22030 inputs: []inputInfo{
22031 {1, 939524095},
22032 {0, 9223372038331170815},
22033 },
22034 },
22035 },
22036 {
22037 name: "FMOVSstore",
22038 auxType: auxSymOff,
22039 argLen: 3,
22040 faultOnNilArg0: true,
22041 symEffect: SymWrite,
22042 asm: arm64.AFMOVS,
22043 reg: regInfo{
22044 inputs: []inputInfo{
22045 {0, 9223372038331170815},
22046 {1, 9223372034707292160},
22047 },
22048 },
22049 },
22050 {
22051 name: "FMOVDstore",
22052 auxType: auxSymOff,
22053 argLen: 3,
22054 faultOnNilArg0: true,
22055 symEffect: SymWrite,
22056 asm: arm64.AFMOVD,
22057 reg: regInfo{
22058 inputs: []inputInfo{
22059 {0, 9223372038331170815},
22060 {1, 9223372034707292160},
22061 },
22062 },
22063 },
22064 {
22065 name: "STP",
22066 auxType: auxSymOff,
22067 argLen: 4,
22068 faultOnNilArg0: true,
22069 symEffect: SymWrite,
22070 asm: arm64.ASTP,
22071 reg: regInfo{
22072 inputs: []inputInfo{
22073 {1, 939524095},
22074 {2, 939524095},
22075 {0, 9223372038331170815},
22076 },
22077 },
22078 },
22079 {
22080 name: "STPW",
22081 auxType: auxSymOff,
22082 argLen: 4,
22083 faultOnNilArg0: true,
22084 symEffect: SymWrite,
22085 asm: arm64.ASTPW,
22086 reg: regInfo{
22087 inputs: []inputInfo{
22088 {1, 939524095},
22089 {2, 939524095},
22090 {0, 9223372038331170815},
22091 },
22092 },
22093 },
22094 {
22095 name: "FSTPD",
22096 auxType: auxSymOff,
22097 argLen: 4,
22098 faultOnNilArg0: true,
22099 symEffect: SymWrite,
22100 asm: arm64.AFSTPD,
22101 reg: regInfo{
22102 inputs: []inputInfo{
22103 {0, 9223372038331170815},
22104 {1, 9223372034707292160},
22105 {2, 9223372034707292160},
22106 },
22107 },
22108 },
22109 {
22110 name: "FSTPS",
22111 auxType: auxSymOff,
22112 argLen: 4,
22113 faultOnNilArg0: true,
22114 symEffect: SymWrite,
22115 asm: arm64.AFSTPS,
22116 reg: regInfo{
22117 inputs: []inputInfo{
22118 {0, 9223372038331170815},
22119 {1, 9223372034707292160},
22120 {2, 9223372034707292160},
22121 },
22122 },
22123 },
22124 {
22125 name: "MOVBstoreidx",
22126 argLen: 4,
22127 asm: arm64.AMOVB,
22128 reg: regInfo{
22129 inputs: []inputInfo{
22130 {1, 939524095},
22131 {2, 939524095},
22132 {0, 9223372038331170815},
22133 },
22134 },
22135 },
22136 {
22137 name: "MOVHstoreidx",
22138 argLen: 4,
22139 asm: arm64.AMOVH,
22140 reg: regInfo{
22141 inputs: []inputInfo{
22142 {1, 939524095},
22143 {2, 939524095},
22144 {0, 9223372038331170815},
22145 },
22146 },
22147 },
22148 {
22149 name: "MOVWstoreidx",
22150 argLen: 4,
22151 asm: arm64.AMOVW,
22152 reg: regInfo{
22153 inputs: []inputInfo{
22154 {1, 939524095},
22155 {2, 939524095},
22156 {0, 9223372038331170815},
22157 },
22158 },
22159 },
22160 {
22161 name: "MOVDstoreidx",
22162 argLen: 4,
22163 asm: arm64.AMOVD,
22164 reg: regInfo{
22165 inputs: []inputInfo{
22166 {1, 939524095},
22167 {2, 939524095},
22168 {0, 9223372038331170815},
22169 },
22170 },
22171 },
22172 {
22173 name: "FMOVSstoreidx",
22174 argLen: 4,
22175 asm: arm64.AFMOVS,
22176 reg: regInfo{
22177 inputs: []inputInfo{
22178 {1, 402653183},
22179 {0, 9223372038331170815},
22180 {2, 9223372034707292160},
22181 },
22182 },
22183 },
22184 {
22185 name: "FMOVDstoreidx",
22186 argLen: 4,
22187 asm: arm64.AFMOVD,
22188 reg: regInfo{
22189 inputs: []inputInfo{
22190 {1, 402653183},
22191 {0, 9223372038331170815},
22192 {2, 9223372034707292160},
22193 },
22194 },
22195 },
22196 {
22197 name: "MOVHstoreidx2",
22198 argLen: 4,
22199 asm: arm64.AMOVH,
22200 reg: regInfo{
22201 inputs: []inputInfo{
22202 {1, 939524095},
22203 {2, 939524095},
22204 {0, 9223372038331170815},
22205 },
22206 },
22207 },
22208 {
22209 name: "MOVWstoreidx4",
22210 argLen: 4,
22211 asm: arm64.AMOVW,
22212 reg: regInfo{
22213 inputs: []inputInfo{
22214 {1, 939524095},
22215 {2, 939524095},
22216 {0, 9223372038331170815},
22217 },
22218 },
22219 },
22220 {
22221 name: "MOVDstoreidx8",
22222 argLen: 4,
22223 asm: arm64.AMOVD,
22224 reg: regInfo{
22225 inputs: []inputInfo{
22226 {1, 939524095},
22227 {2, 939524095},
22228 {0, 9223372038331170815},
22229 },
22230 },
22231 },
22232 {
22233 name: "FMOVSstoreidx4",
22234 argLen: 4,
22235 asm: arm64.AFMOVS,
22236 reg: regInfo{
22237 inputs: []inputInfo{
22238 {1, 402653183},
22239 {0, 9223372038331170815},
22240 {2, 9223372034707292160},
22241 },
22242 },
22243 },
22244 {
22245 name: "FMOVDstoreidx8",
22246 argLen: 4,
22247 asm: arm64.AFMOVD,
22248 reg: regInfo{
22249 inputs: []inputInfo{
22250 {1, 402653183},
22251 {0, 9223372038331170815},
22252 {2, 9223372034707292160},
22253 },
22254 },
22255 },
22256 {
22257 name: "FMOVDgpfp",
22258 argLen: 1,
22259 asm: arm64.AFMOVD,
22260 reg: regInfo{
22261 inputs: []inputInfo{
22262 {0, 335544319},
22263 },
22264 outputs: []outputInfo{
22265 {0, 9223372034707292160},
22266 },
22267 },
22268 },
22269 {
22270 name: "FMOVDfpgp",
22271 argLen: 1,
22272 asm: arm64.AFMOVD,
22273 reg: regInfo{
22274 inputs: []inputInfo{
22275 {0, 9223372034707292160},
22276 },
22277 outputs: []outputInfo{
22278 {0, 335544319},
22279 },
22280 },
22281 },
22282 {
22283 name: "FMOVSgpfp",
22284 argLen: 1,
22285 asm: arm64.AFMOVS,
22286 reg: regInfo{
22287 inputs: []inputInfo{
22288 {0, 335544319},
22289 },
22290 outputs: []outputInfo{
22291 {0, 9223372034707292160},
22292 },
22293 },
22294 },
22295 {
22296 name: "FMOVSfpgp",
22297 argLen: 1,
22298 asm: arm64.AFMOVS,
22299 reg: regInfo{
22300 inputs: []inputInfo{
22301 {0, 9223372034707292160},
22302 },
22303 outputs: []outputInfo{
22304 {0, 335544319},
22305 },
22306 },
22307 },
22308 {
22309 name: "MOVBreg",
22310 argLen: 1,
22311 asm: arm64.AMOVB,
22312 reg: regInfo{
22313 inputs: []inputInfo{
22314 {0, 402653183},
22315 },
22316 outputs: []outputInfo{
22317 {0, 335544319},
22318 },
22319 },
22320 },
22321 {
22322 name: "MOVBUreg",
22323 argLen: 1,
22324 asm: arm64.AMOVBU,
22325 reg: regInfo{
22326 inputs: []inputInfo{
22327 {0, 402653183},
22328 },
22329 outputs: []outputInfo{
22330 {0, 335544319},
22331 },
22332 },
22333 },
22334 {
22335 name: "MOVHreg",
22336 argLen: 1,
22337 asm: arm64.AMOVH,
22338 reg: regInfo{
22339 inputs: []inputInfo{
22340 {0, 402653183},
22341 },
22342 outputs: []outputInfo{
22343 {0, 335544319},
22344 },
22345 },
22346 },
22347 {
22348 name: "MOVHUreg",
22349 argLen: 1,
22350 asm: arm64.AMOVHU,
22351 reg: regInfo{
22352 inputs: []inputInfo{
22353 {0, 402653183},
22354 },
22355 outputs: []outputInfo{
22356 {0, 335544319},
22357 },
22358 },
22359 },
22360 {
22361 name: "MOVWreg",
22362 argLen: 1,
22363 asm: arm64.AMOVW,
22364 reg: regInfo{
22365 inputs: []inputInfo{
22366 {0, 402653183},
22367 },
22368 outputs: []outputInfo{
22369 {0, 335544319},
22370 },
22371 },
22372 },
22373 {
22374 name: "MOVWUreg",
22375 argLen: 1,
22376 asm: arm64.AMOVWU,
22377 reg: regInfo{
22378 inputs: []inputInfo{
22379 {0, 402653183},
22380 },
22381 outputs: []outputInfo{
22382 {0, 335544319},
22383 },
22384 },
22385 },
22386 {
22387 name: "MOVDreg",
22388 argLen: 1,
22389 asm: arm64.AMOVD,
22390 reg: regInfo{
22391 inputs: []inputInfo{
22392 {0, 402653183},
22393 },
22394 outputs: []outputInfo{
22395 {0, 335544319},
22396 },
22397 },
22398 },
22399 {
22400 name: "MOVDnop",
22401 argLen: 1,
22402 resultInArg0: true,
22403 reg: regInfo{
22404 inputs: []inputInfo{
22405 {0, 335544319},
22406 },
22407 outputs: []outputInfo{
22408 {0, 335544319},
22409 },
22410 },
22411 },
22412 {
22413 name: "SCVTFWS",
22414 argLen: 1,
22415 asm: arm64.ASCVTFWS,
22416 reg: regInfo{
22417 inputs: []inputInfo{
22418 {0, 335544319},
22419 },
22420 outputs: []outputInfo{
22421 {0, 9223372034707292160},
22422 },
22423 },
22424 },
22425 {
22426 name: "SCVTFWD",
22427 argLen: 1,
22428 asm: arm64.ASCVTFWD,
22429 reg: regInfo{
22430 inputs: []inputInfo{
22431 {0, 335544319},
22432 },
22433 outputs: []outputInfo{
22434 {0, 9223372034707292160},
22435 },
22436 },
22437 },
22438 {
22439 name: "UCVTFWS",
22440 argLen: 1,
22441 asm: arm64.AUCVTFWS,
22442 reg: regInfo{
22443 inputs: []inputInfo{
22444 {0, 335544319},
22445 },
22446 outputs: []outputInfo{
22447 {0, 9223372034707292160},
22448 },
22449 },
22450 },
22451 {
22452 name: "UCVTFWD",
22453 argLen: 1,
22454 asm: arm64.AUCVTFWD,
22455 reg: regInfo{
22456 inputs: []inputInfo{
22457 {0, 335544319},
22458 },
22459 outputs: []outputInfo{
22460 {0, 9223372034707292160},
22461 },
22462 },
22463 },
22464 {
22465 name: "SCVTFS",
22466 argLen: 1,
22467 asm: arm64.ASCVTFS,
22468 reg: regInfo{
22469 inputs: []inputInfo{
22470 {0, 335544319},
22471 },
22472 outputs: []outputInfo{
22473 {0, 9223372034707292160},
22474 },
22475 },
22476 },
22477 {
22478 name: "SCVTFD",
22479 argLen: 1,
22480 asm: arm64.ASCVTFD,
22481 reg: regInfo{
22482 inputs: []inputInfo{
22483 {0, 335544319},
22484 },
22485 outputs: []outputInfo{
22486 {0, 9223372034707292160},
22487 },
22488 },
22489 },
22490 {
22491 name: "UCVTFS",
22492 argLen: 1,
22493 asm: arm64.AUCVTFS,
22494 reg: regInfo{
22495 inputs: []inputInfo{
22496 {0, 335544319},
22497 },
22498 outputs: []outputInfo{
22499 {0, 9223372034707292160},
22500 },
22501 },
22502 },
22503 {
22504 name: "UCVTFD",
22505 argLen: 1,
22506 asm: arm64.AUCVTFD,
22507 reg: regInfo{
22508 inputs: []inputInfo{
22509 {0, 335544319},
22510 },
22511 outputs: []outputInfo{
22512 {0, 9223372034707292160},
22513 },
22514 },
22515 },
22516 {
22517 name: "FCVTZSSW",
22518 argLen: 1,
22519 asm: arm64.AFCVTZSSW,
22520 reg: regInfo{
22521 inputs: []inputInfo{
22522 {0, 9223372034707292160},
22523 },
22524 outputs: []outputInfo{
22525 {0, 335544319},
22526 },
22527 },
22528 },
22529 {
22530 name: "FCVTZSDW",
22531 argLen: 1,
22532 asm: arm64.AFCVTZSDW,
22533 reg: regInfo{
22534 inputs: []inputInfo{
22535 {0, 9223372034707292160},
22536 },
22537 outputs: []outputInfo{
22538 {0, 335544319},
22539 },
22540 },
22541 },
22542 {
22543 name: "FCVTZUSW",
22544 argLen: 1,
22545 asm: arm64.AFCVTZUSW,
22546 reg: regInfo{
22547 inputs: []inputInfo{
22548 {0, 9223372034707292160},
22549 },
22550 outputs: []outputInfo{
22551 {0, 335544319},
22552 },
22553 },
22554 },
22555 {
22556 name: "FCVTZUDW",
22557 argLen: 1,
22558 asm: arm64.AFCVTZUDW,
22559 reg: regInfo{
22560 inputs: []inputInfo{
22561 {0, 9223372034707292160},
22562 },
22563 outputs: []outputInfo{
22564 {0, 335544319},
22565 },
22566 },
22567 },
22568 {
22569 name: "FCVTZSS",
22570 argLen: 1,
22571 asm: arm64.AFCVTZSS,
22572 reg: regInfo{
22573 inputs: []inputInfo{
22574 {0, 9223372034707292160},
22575 },
22576 outputs: []outputInfo{
22577 {0, 335544319},
22578 },
22579 },
22580 },
22581 {
22582 name: "FCVTZSD",
22583 argLen: 1,
22584 asm: arm64.AFCVTZSD,
22585 reg: regInfo{
22586 inputs: []inputInfo{
22587 {0, 9223372034707292160},
22588 },
22589 outputs: []outputInfo{
22590 {0, 335544319},
22591 },
22592 },
22593 },
22594 {
22595 name: "FCVTZUS",
22596 argLen: 1,
22597 asm: arm64.AFCVTZUS,
22598 reg: regInfo{
22599 inputs: []inputInfo{
22600 {0, 9223372034707292160},
22601 },
22602 outputs: []outputInfo{
22603 {0, 335544319},
22604 },
22605 },
22606 },
22607 {
22608 name: "FCVTZUD",
22609 argLen: 1,
22610 asm: arm64.AFCVTZUD,
22611 reg: regInfo{
22612 inputs: []inputInfo{
22613 {0, 9223372034707292160},
22614 },
22615 outputs: []outputInfo{
22616 {0, 335544319},
22617 },
22618 },
22619 },
22620 {
22621 name: "FCVTSD",
22622 argLen: 1,
22623 asm: arm64.AFCVTSD,
22624 reg: regInfo{
22625 inputs: []inputInfo{
22626 {0, 9223372034707292160},
22627 },
22628 outputs: []outputInfo{
22629 {0, 9223372034707292160},
22630 },
22631 },
22632 },
22633 {
22634 name: "FCVTDS",
22635 argLen: 1,
22636 asm: arm64.AFCVTDS,
22637 reg: regInfo{
22638 inputs: []inputInfo{
22639 {0, 9223372034707292160},
22640 },
22641 outputs: []outputInfo{
22642 {0, 9223372034707292160},
22643 },
22644 },
22645 },
22646 {
22647 name: "FRINTAD",
22648 argLen: 1,
22649 asm: arm64.AFRINTAD,
22650 reg: regInfo{
22651 inputs: []inputInfo{
22652 {0, 9223372034707292160},
22653 },
22654 outputs: []outputInfo{
22655 {0, 9223372034707292160},
22656 },
22657 },
22658 },
22659 {
22660 name: "FRINTMD",
22661 argLen: 1,
22662 asm: arm64.AFRINTMD,
22663 reg: regInfo{
22664 inputs: []inputInfo{
22665 {0, 9223372034707292160},
22666 },
22667 outputs: []outputInfo{
22668 {0, 9223372034707292160},
22669 },
22670 },
22671 },
22672 {
22673 name: "FRINTND",
22674 argLen: 1,
22675 asm: arm64.AFRINTND,
22676 reg: regInfo{
22677 inputs: []inputInfo{
22678 {0, 9223372034707292160},
22679 },
22680 outputs: []outputInfo{
22681 {0, 9223372034707292160},
22682 },
22683 },
22684 },
22685 {
22686 name: "FRINTPD",
22687 argLen: 1,
22688 asm: arm64.AFRINTPD,
22689 reg: regInfo{
22690 inputs: []inputInfo{
22691 {0, 9223372034707292160},
22692 },
22693 outputs: []outputInfo{
22694 {0, 9223372034707292160},
22695 },
22696 },
22697 },
22698 {
22699 name: "FRINTZD",
22700 argLen: 1,
22701 asm: arm64.AFRINTZD,
22702 reg: regInfo{
22703 inputs: []inputInfo{
22704 {0, 9223372034707292160},
22705 },
22706 outputs: []outputInfo{
22707 {0, 9223372034707292160},
22708 },
22709 },
22710 },
22711 {
22712 name: "CSEL",
22713 auxType: auxCCop,
22714 argLen: 3,
22715 asm: arm64.ACSEL,
22716 reg: regInfo{
22717 inputs: []inputInfo{
22718 {0, 335544319},
22719 {1, 335544319},
22720 },
22721 outputs: []outputInfo{
22722 {0, 335544319},
22723 },
22724 },
22725 },
22726 {
22727 name: "CSEL0",
22728 auxType: auxCCop,
22729 argLen: 2,
22730 asm: arm64.ACSEL,
22731 reg: regInfo{
22732 inputs: []inputInfo{
22733 {0, 402653183},
22734 },
22735 outputs: []outputInfo{
22736 {0, 335544319},
22737 },
22738 },
22739 },
22740 {
22741 name: "CSINC",
22742 auxType: auxCCop,
22743 argLen: 3,
22744 asm: arm64.ACSINC,
22745 reg: regInfo{
22746 inputs: []inputInfo{
22747 {0, 335544319},
22748 {1, 335544319},
22749 },
22750 outputs: []outputInfo{
22751 {0, 335544319},
22752 },
22753 },
22754 },
22755 {
22756 name: "CSINV",
22757 auxType: auxCCop,
22758 argLen: 3,
22759 asm: arm64.ACSINV,
22760 reg: regInfo{
22761 inputs: []inputInfo{
22762 {0, 335544319},
22763 {1, 335544319},
22764 },
22765 outputs: []outputInfo{
22766 {0, 335544319},
22767 },
22768 },
22769 },
22770 {
22771 name: "CSNEG",
22772 auxType: auxCCop,
22773 argLen: 3,
22774 asm: arm64.ACSNEG,
22775 reg: regInfo{
22776 inputs: []inputInfo{
22777 {0, 335544319},
22778 {1, 335544319},
22779 },
22780 outputs: []outputInfo{
22781 {0, 335544319},
22782 },
22783 },
22784 },
22785 {
22786 name: "CSETM",
22787 auxType: auxCCop,
22788 argLen: 1,
22789 asm: arm64.ACSETM,
22790 reg: regInfo{
22791 outputs: []outputInfo{
22792 {0, 335544319},
22793 },
22794 },
22795 },
22796 {
22797 name: "CALLstatic",
22798 auxType: auxCallOff,
22799 argLen: -1,
22800 clobberFlags: true,
22801 call: true,
22802 reg: regInfo{
22803 clobbers: 9223372035109945343,
22804 },
22805 },
22806 {
22807 name: "CALLtail",
22808 auxType: auxCallOff,
22809 argLen: -1,
22810 clobberFlags: true,
22811 call: true,
22812 tailCall: true,
22813 reg: regInfo{
22814 clobbers: 9223372035109945343,
22815 },
22816 },
22817 {
22818 name: "CALLclosure",
22819 auxType: auxCallOff,
22820 argLen: -1,
22821 clobberFlags: true,
22822 call: true,
22823 reg: regInfo{
22824 inputs: []inputInfo{
22825 {1, 33554432},
22826 {0, 1409286143},
22827 },
22828 clobbers: 9223372035109945343,
22829 },
22830 },
22831 {
22832 name: "CALLinter",
22833 auxType: auxCallOff,
22834 argLen: -1,
22835 clobberFlags: true,
22836 call: true,
22837 reg: regInfo{
22838 inputs: []inputInfo{
22839 {0, 335544319},
22840 },
22841 clobbers: 9223372035109945343,
22842 },
22843 },
22844 {
22845 name: "LoweredNilCheck",
22846 argLen: 2,
22847 nilCheck: true,
22848 faultOnNilArg0: true,
22849 reg: regInfo{
22850 inputs: []inputInfo{
22851 {0, 402653183},
22852 },
22853 },
22854 },
22855 {
22856 name: "Equal",
22857 argLen: 1,
22858 reg: regInfo{
22859 outputs: []outputInfo{
22860 {0, 335544319},
22861 },
22862 },
22863 },
22864 {
22865 name: "NotEqual",
22866 argLen: 1,
22867 reg: regInfo{
22868 outputs: []outputInfo{
22869 {0, 335544319},
22870 },
22871 },
22872 },
22873 {
22874 name: "LessThan",
22875 argLen: 1,
22876 reg: regInfo{
22877 outputs: []outputInfo{
22878 {0, 335544319},
22879 },
22880 },
22881 },
22882 {
22883 name: "LessEqual",
22884 argLen: 1,
22885 reg: regInfo{
22886 outputs: []outputInfo{
22887 {0, 335544319},
22888 },
22889 },
22890 },
22891 {
22892 name: "GreaterThan",
22893 argLen: 1,
22894 reg: regInfo{
22895 outputs: []outputInfo{
22896 {0, 335544319},
22897 },
22898 },
22899 },
22900 {
22901 name: "GreaterEqual",
22902 argLen: 1,
22903 reg: regInfo{
22904 outputs: []outputInfo{
22905 {0, 335544319},
22906 },
22907 },
22908 },
22909 {
22910 name: "LessThanU",
22911 argLen: 1,
22912 reg: regInfo{
22913 outputs: []outputInfo{
22914 {0, 335544319},
22915 },
22916 },
22917 },
22918 {
22919 name: "LessEqualU",
22920 argLen: 1,
22921 reg: regInfo{
22922 outputs: []outputInfo{
22923 {0, 335544319},
22924 },
22925 },
22926 },
22927 {
22928 name: "GreaterThanU",
22929 argLen: 1,
22930 reg: regInfo{
22931 outputs: []outputInfo{
22932 {0, 335544319},
22933 },
22934 },
22935 },
22936 {
22937 name: "GreaterEqualU",
22938 argLen: 1,
22939 reg: regInfo{
22940 outputs: []outputInfo{
22941 {0, 335544319},
22942 },
22943 },
22944 },
22945 {
22946 name: "LessThanF",
22947 argLen: 1,
22948 reg: regInfo{
22949 outputs: []outputInfo{
22950 {0, 335544319},
22951 },
22952 },
22953 },
22954 {
22955 name: "LessEqualF",
22956 argLen: 1,
22957 reg: regInfo{
22958 outputs: []outputInfo{
22959 {0, 335544319},
22960 },
22961 },
22962 },
22963 {
22964 name: "GreaterThanF",
22965 argLen: 1,
22966 reg: regInfo{
22967 outputs: []outputInfo{
22968 {0, 335544319},
22969 },
22970 },
22971 },
22972 {
22973 name: "GreaterEqualF",
22974 argLen: 1,
22975 reg: regInfo{
22976 outputs: []outputInfo{
22977 {0, 335544319},
22978 },
22979 },
22980 },
22981 {
22982 name: "NotLessThanF",
22983 argLen: 1,
22984 reg: regInfo{
22985 outputs: []outputInfo{
22986 {0, 335544319},
22987 },
22988 },
22989 },
22990 {
22991 name: "NotLessEqualF",
22992 argLen: 1,
22993 reg: regInfo{
22994 outputs: []outputInfo{
22995 {0, 335544319},
22996 },
22997 },
22998 },
22999 {
23000 name: "NotGreaterThanF",
23001 argLen: 1,
23002 reg: regInfo{
23003 outputs: []outputInfo{
23004 {0, 335544319},
23005 },
23006 },
23007 },
23008 {
23009 name: "NotGreaterEqualF",
23010 argLen: 1,
23011 reg: regInfo{
23012 outputs: []outputInfo{
23013 {0, 335544319},
23014 },
23015 },
23016 },
23017 {
23018 name: "LessThanNoov",
23019 argLen: 1,
23020 reg: regInfo{
23021 outputs: []outputInfo{
23022 {0, 335544319},
23023 },
23024 },
23025 },
23026 {
23027 name: "GreaterEqualNoov",
23028 argLen: 1,
23029 reg: regInfo{
23030 outputs: []outputInfo{
23031 {0, 335544319},
23032 },
23033 },
23034 },
23035 {
23036 name: "DUFFZERO",
23037 auxType: auxInt64,
23038 argLen: 2,
23039 faultOnNilArg0: true,
23040 unsafePoint: true,
23041 reg: regInfo{
23042 inputs: []inputInfo{
23043 {0, 524288},
23044 },
23045 clobbers: 269156352,
23046 },
23047 },
23048 {
23049 name: "LoweredZero",
23050 argLen: 3,
23051 clobberFlags: true,
23052 faultOnNilArg0: true,
23053 reg: regInfo{
23054 inputs: []inputInfo{
23055 {0, 65536},
23056 {1, 335544319},
23057 },
23058 clobbers: 65536,
23059 },
23060 },
23061 {
23062 name: "DUFFCOPY",
23063 auxType: auxInt64,
23064 argLen: 3,
23065 faultOnNilArg0: true,
23066 faultOnNilArg1: true,
23067 unsafePoint: true,
23068 reg: regInfo{
23069 inputs: []inputInfo{
23070 {0, 1048576},
23071 {1, 524288},
23072 },
23073 clobbers: 303759360,
23074 },
23075 },
23076 {
23077 name: "LoweredMove",
23078 argLen: 4,
23079 clobberFlags: true,
23080 faultOnNilArg0: true,
23081 faultOnNilArg1: true,
23082 reg: regInfo{
23083 inputs: []inputInfo{
23084 {0, 131072},
23085 {1, 65536},
23086 {2, 318767103},
23087 },
23088 clobbers: 16973824,
23089 },
23090 },
23091 {
23092 name: "LoweredGetClosurePtr",
23093 argLen: 0,
23094 zeroWidth: true,
23095 reg: regInfo{
23096 outputs: []outputInfo{
23097 {0, 33554432},
23098 },
23099 },
23100 },
23101 {
23102 name: "LoweredGetCallerSP",
23103 argLen: 1,
23104 rematerializeable: true,
23105 reg: regInfo{
23106 outputs: []outputInfo{
23107 {0, 335544319},
23108 },
23109 },
23110 },
23111 {
23112 name: "LoweredGetCallerPC",
23113 argLen: 0,
23114 rematerializeable: true,
23115 reg: regInfo{
23116 outputs: []outputInfo{
23117 {0, 335544319},
23118 },
23119 },
23120 },
23121 {
23122 name: "FlagConstant",
23123 auxType: auxFlagConstant,
23124 argLen: 0,
23125 reg: regInfo{},
23126 },
23127 {
23128 name: "InvertFlags",
23129 argLen: 1,
23130 reg: regInfo{},
23131 },
23132 {
23133 name: "LDAR",
23134 argLen: 2,
23135 faultOnNilArg0: true,
23136 asm: arm64.ALDAR,
23137 reg: regInfo{
23138 inputs: []inputInfo{
23139 {0, 9223372038331170815},
23140 },
23141 outputs: []outputInfo{
23142 {0, 335544319},
23143 },
23144 },
23145 },
23146 {
23147 name: "LDARB",
23148 argLen: 2,
23149 faultOnNilArg0: true,
23150 asm: arm64.ALDARB,
23151 reg: regInfo{
23152 inputs: []inputInfo{
23153 {0, 9223372038331170815},
23154 },
23155 outputs: []outputInfo{
23156 {0, 335544319},
23157 },
23158 },
23159 },
23160 {
23161 name: "LDARW",
23162 argLen: 2,
23163 faultOnNilArg0: true,
23164 asm: arm64.ALDARW,
23165 reg: regInfo{
23166 inputs: []inputInfo{
23167 {0, 9223372038331170815},
23168 },
23169 outputs: []outputInfo{
23170 {0, 335544319},
23171 },
23172 },
23173 },
23174 {
23175 name: "STLRB",
23176 argLen: 3,
23177 faultOnNilArg0: true,
23178 hasSideEffects: true,
23179 asm: arm64.ASTLRB,
23180 reg: regInfo{
23181 inputs: []inputInfo{
23182 {1, 939524095},
23183 {0, 9223372038331170815},
23184 },
23185 },
23186 },
23187 {
23188 name: "STLR",
23189 argLen: 3,
23190 faultOnNilArg0: true,
23191 hasSideEffects: true,
23192 asm: arm64.ASTLR,
23193 reg: regInfo{
23194 inputs: []inputInfo{
23195 {1, 939524095},
23196 {0, 9223372038331170815},
23197 },
23198 },
23199 },
23200 {
23201 name: "STLRW",
23202 argLen: 3,
23203 faultOnNilArg0: true,
23204 hasSideEffects: true,
23205 asm: arm64.ASTLRW,
23206 reg: regInfo{
23207 inputs: []inputInfo{
23208 {1, 939524095},
23209 {0, 9223372038331170815},
23210 },
23211 },
23212 },
23213 {
23214 name: "LoweredAtomicExchange64",
23215 argLen: 3,
23216 resultNotInArgs: true,
23217 faultOnNilArg0: true,
23218 hasSideEffects: true,
23219 unsafePoint: true,
23220 reg: regInfo{
23221 inputs: []inputInfo{
23222 {1, 939524095},
23223 {0, 9223372038331170815},
23224 },
23225 outputs: []outputInfo{
23226 {0, 335544319},
23227 },
23228 },
23229 },
23230 {
23231 name: "LoweredAtomicExchange32",
23232 argLen: 3,
23233 resultNotInArgs: true,
23234 faultOnNilArg0: true,
23235 hasSideEffects: true,
23236 unsafePoint: true,
23237 reg: regInfo{
23238 inputs: []inputInfo{
23239 {1, 939524095},
23240 {0, 9223372038331170815},
23241 },
23242 outputs: []outputInfo{
23243 {0, 335544319},
23244 },
23245 },
23246 },
23247 {
23248 name: "LoweredAtomicExchange8",
23249 argLen: 3,
23250 resultNotInArgs: true,
23251 faultOnNilArg0: true,
23252 hasSideEffects: true,
23253 unsafePoint: true,
23254 reg: regInfo{
23255 inputs: []inputInfo{
23256 {1, 939524095},
23257 {0, 9223372038331170815},
23258 },
23259 outputs: []outputInfo{
23260 {0, 335544319},
23261 },
23262 },
23263 },
23264 {
23265 name: "LoweredAtomicExchange64Variant",
23266 argLen: 3,
23267 resultNotInArgs: true,
23268 faultOnNilArg0: true,
23269 hasSideEffects: true,
23270 reg: regInfo{
23271 inputs: []inputInfo{
23272 {1, 939524095},
23273 {0, 9223372038331170815},
23274 },
23275 outputs: []outputInfo{
23276 {0, 335544319},
23277 },
23278 },
23279 },
23280 {
23281 name: "LoweredAtomicExchange32Variant",
23282 argLen: 3,
23283 resultNotInArgs: true,
23284 faultOnNilArg0: true,
23285 hasSideEffects: true,
23286 reg: regInfo{
23287 inputs: []inputInfo{
23288 {1, 939524095},
23289 {0, 9223372038331170815},
23290 },
23291 outputs: []outputInfo{
23292 {0, 335544319},
23293 },
23294 },
23295 },
23296 {
23297 name: "LoweredAtomicExchange8Variant",
23298 argLen: 3,
23299 resultNotInArgs: true,
23300 faultOnNilArg0: true,
23301 hasSideEffects: true,
23302 unsafePoint: true,
23303 reg: regInfo{
23304 inputs: []inputInfo{
23305 {1, 939524095},
23306 {0, 9223372038331170815},
23307 },
23308 outputs: []outputInfo{
23309 {0, 335544319},
23310 },
23311 },
23312 },
23313 {
23314 name: "LoweredAtomicAdd64",
23315 argLen: 3,
23316 resultNotInArgs: true,
23317 faultOnNilArg0: true,
23318 hasSideEffects: true,
23319 unsafePoint: true,
23320 reg: regInfo{
23321 inputs: []inputInfo{
23322 {1, 939524095},
23323 {0, 9223372038331170815},
23324 },
23325 outputs: []outputInfo{
23326 {0, 335544319},
23327 },
23328 },
23329 },
23330 {
23331 name: "LoweredAtomicAdd32",
23332 argLen: 3,
23333 resultNotInArgs: true,
23334 faultOnNilArg0: true,
23335 hasSideEffects: true,
23336 unsafePoint: true,
23337 reg: regInfo{
23338 inputs: []inputInfo{
23339 {1, 939524095},
23340 {0, 9223372038331170815},
23341 },
23342 outputs: []outputInfo{
23343 {0, 335544319},
23344 },
23345 },
23346 },
23347 {
23348 name: "LoweredAtomicAdd64Variant",
23349 argLen: 3,
23350 resultNotInArgs: true,
23351 faultOnNilArg0: true,
23352 hasSideEffects: true,
23353 reg: regInfo{
23354 inputs: []inputInfo{
23355 {1, 939524095},
23356 {0, 9223372038331170815},
23357 },
23358 outputs: []outputInfo{
23359 {0, 335544319},
23360 },
23361 },
23362 },
23363 {
23364 name: "LoweredAtomicAdd32Variant",
23365 argLen: 3,
23366 resultNotInArgs: true,
23367 faultOnNilArg0: true,
23368 hasSideEffects: true,
23369 reg: regInfo{
23370 inputs: []inputInfo{
23371 {1, 939524095},
23372 {0, 9223372038331170815},
23373 },
23374 outputs: []outputInfo{
23375 {0, 335544319},
23376 },
23377 },
23378 },
23379 {
23380 name: "LoweredAtomicCas64",
23381 argLen: 4,
23382 resultNotInArgs: true,
23383 clobberFlags: true,
23384 faultOnNilArg0: true,
23385 hasSideEffects: true,
23386 unsafePoint: true,
23387 reg: regInfo{
23388 inputs: []inputInfo{
23389 {1, 939524095},
23390 {2, 939524095},
23391 {0, 9223372038331170815},
23392 },
23393 outputs: []outputInfo{
23394 {0, 335544319},
23395 },
23396 },
23397 },
23398 {
23399 name: "LoweredAtomicCas32",
23400 argLen: 4,
23401 resultNotInArgs: true,
23402 clobberFlags: true,
23403 faultOnNilArg0: true,
23404 hasSideEffects: true,
23405 unsafePoint: true,
23406 reg: regInfo{
23407 inputs: []inputInfo{
23408 {1, 939524095},
23409 {2, 939524095},
23410 {0, 9223372038331170815},
23411 },
23412 outputs: []outputInfo{
23413 {0, 335544319},
23414 },
23415 },
23416 },
23417 {
23418 name: "LoweredAtomicCas64Variant",
23419 argLen: 4,
23420 resultNotInArgs: true,
23421 clobberFlags: true,
23422 faultOnNilArg0: true,
23423 hasSideEffects: true,
23424 unsafePoint: true,
23425 reg: regInfo{
23426 inputs: []inputInfo{
23427 {1, 939524095},
23428 {2, 939524095},
23429 {0, 9223372038331170815},
23430 },
23431 outputs: []outputInfo{
23432 {0, 335544319},
23433 },
23434 },
23435 },
23436 {
23437 name: "LoweredAtomicCas32Variant",
23438 argLen: 4,
23439 resultNotInArgs: true,
23440 clobberFlags: true,
23441 faultOnNilArg0: true,
23442 hasSideEffects: true,
23443 unsafePoint: true,
23444 reg: regInfo{
23445 inputs: []inputInfo{
23446 {1, 939524095},
23447 {2, 939524095},
23448 {0, 9223372038331170815},
23449 },
23450 outputs: []outputInfo{
23451 {0, 335544319},
23452 },
23453 },
23454 },
23455 {
23456 name: "LoweredAtomicAnd8",
23457 argLen: 3,
23458 resultNotInArgs: true,
23459 needIntTemp: true,
23460 faultOnNilArg0: true,
23461 hasSideEffects: true,
23462 unsafePoint: true,
23463 asm: arm64.AAND,
23464 reg: regInfo{
23465 inputs: []inputInfo{
23466 {1, 939524095},
23467 {0, 9223372038331170815},
23468 },
23469 outputs: []outputInfo{
23470 {0, 335544319},
23471 },
23472 },
23473 },
23474 {
23475 name: "LoweredAtomicOr8",
23476 argLen: 3,
23477 resultNotInArgs: true,
23478 needIntTemp: true,
23479 faultOnNilArg0: true,
23480 hasSideEffects: true,
23481 unsafePoint: true,
23482 asm: arm64.AORR,
23483 reg: regInfo{
23484 inputs: []inputInfo{
23485 {1, 939524095},
23486 {0, 9223372038331170815},
23487 },
23488 outputs: []outputInfo{
23489 {0, 335544319},
23490 },
23491 },
23492 },
23493 {
23494 name: "LoweredAtomicAnd64",
23495 argLen: 3,
23496 resultNotInArgs: true,
23497 needIntTemp: true,
23498 faultOnNilArg0: true,
23499 hasSideEffects: true,
23500 unsafePoint: true,
23501 asm: arm64.AAND,
23502 reg: regInfo{
23503 inputs: []inputInfo{
23504 {1, 939524095},
23505 {0, 9223372038331170815},
23506 },
23507 outputs: []outputInfo{
23508 {0, 335544319},
23509 },
23510 },
23511 },
23512 {
23513 name: "LoweredAtomicOr64",
23514 argLen: 3,
23515 resultNotInArgs: true,
23516 needIntTemp: true,
23517 faultOnNilArg0: true,
23518 hasSideEffects: true,
23519 unsafePoint: true,
23520 asm: arm64.AORR,
23521 reg: regInfo{
23522 inputs: []inputInfo{
23523 {1, 939524095},
23524 {0, 9223372038331170815},
23525 },
23526 outputs: []outputInfo{
23527 {0, 335544319},
23528 },
23529 },
23530 },
23531 {
23532 name: "LoweredAtomicAnd32",
23533 argLen: 3,
23534 resultNotInArgs: true,
23535 needIntTemp: true,
23536 faultOnNilArg0: true,
23537 hasSideEffects: true,
23538 unsafePoint: true,
23539 asm: arm64.AAND,
23540 reg: regInfo{
23541 inputs: []inputInfo{
23542 {1, 939524095},
23543 {0, 9223372038331170815},
23544 },
23545 outputs: []outputInfo{
23546 {0, 335544319},
23547 },
23548 },
23549 },
23550 {
23551 name: "LoweredAtomicOr32",
23552 argLen: 3,
23553 resultNotInArgs: true,
23554 needIntTemp: true,
23555 faultOnNilArg0: true,
23556 hasSideEffects: true,
23557 unsafePoint: true,
23558 asm: arm64.AORR,
23559 reg: regInfo{
23560 inputs: []inputInfo{
23561 {1, 939524095},
23562 {0, 9223372038331170815},
23563 },
23564 outputs: []outputInfo{
23565 {0, 335544319},
23566 },
23567 },
23568 },
23569 {
23570 name: "LoweredAtomicAnd8Variant",
23571 argLen: 3,
23572 resultNotInArgs: true,
23573 faultOnNilArg0: true,
23574 hasSideEffects: true,
23575 unsafePoint: true,
23576 reg: regInfo{
23577 inputs: []inputInfo{
23578 {1, 939524095},
23579 {0, 9223372038331170815},
23580 },
23581 outputs: []outputInfo{
23582 {0, 335544319},
23583 },
23584 },
23585 },
23586 {
23587 name: "LoweredAtomicOr8Variant",
23588 argLen: 3,
23589 resultNotInArgs: true,
23590 faultOnNilArg0: true,
23591 hasSideEffects: true,
23592 reg: regInfo{
23593 inputs: []inputInfo{
23594 {1, 939524095},
23595 {0, 9223372038331170815},
23596 },
23597 outputs: []outputInfo{
23598 {0, 335544319},
23599 },
23600 },
23601 },
23602 {
23603 name: "LoweredAtomicAnd64Variant",
23604 argLen: 3,
23605 resultNotInArgs: true,
23606 faultOnNilArg0: true,
23607 hasSideEffects: true,
23608 unsafePoint: true,
23609 reg: regInfo{
23610 inputs: []inputInfo{
23611 {1, 939524095},
23612 {0, 9223372038331170815},
23613 },
23614 outputs: []outputInfo{
23615 {0, 335544319},
23616 },
23617 },
23618 },
23619 {
23620 name: "LoweredAtomicOr64Variant",
23621 argLen: 3,
23622 resultNotInArgs: true,
23623 faultOnNilArg0: true,
23624 hasSideEffects: true,
23625 reg: regInfo{
23626 inputs: []inputInfo{
23627 {1, 939524095},
23628 {0, 9223372038331170815},
23629 },
23630 outputs: []outputInfo{
23631 {0, 335544319},
23632 },
23633 },
23634 },
23635 {
23636 name: "LoweredAtomicAnd32Variant",
23637 argLen: 3,
23638 resultNotInArgs: true,
23639 faultOnNilArg0: true,
23640 hasSideEffects: true,
23641 unsafePoint: true,
23642 reg: regInfo{
23643 inputs: []inputInfo{
23644 {1, 939524095},
23645 {0, 9223372038331170815},
23646 },
23647 outputs: []outputInfo{
23648 {0, 335544319},
23649 },
23650 },
23651 },
23652 {
23653 name: "LoweredAtomicOr32Variant",
23654 argLen: 3,
23655 resultNotInArgs: true,
23656 faultOnNilArg0: true,
23657 hasSideEffects: true,
23658 reg: regInfo{
23659 inputs: []inputInfo{
23660 {1, 939524095},
23661 {0, 9223372038331170815},
23662 },
23663 outputs: []outputInfo{
23664 {0, 335544319},
23665 },
23666 },
23667 },
23668 {
23669 name: "LoweredWB",
23670 auxType: auxInt64,
23671 argLen: 1,
23672 clobberFlags: true,
23673 reg: regInfo{
23674 clobbers: 9223372034975924224,
23675 outputs: []outputInfo{
23676 {0, 16777216},
23677 },
23678 },
23679 },
23680 {
23681 name: "LoweredPanicBoundsA",
23682 auxType: auxInt64,
23683 argLen: 3,
23684 call: true,
23685 reg: regInfo{
23686 inputs: []inputInfo{
23687 {0, 4},
23688 {1, 8},
23689 },
23690 },
23691 },
23692 {
23693 name: "LoweredPanicBoundsB",
23694 auxType: auxInt64,
23695 argLen: 3,
23696 call: true,
23697 reg: regInfo{
23698 inputs: []inputInfo{
23699 {0, 2},
23700 {1, 4},
23701 },
23702 },
23703 },
23704 {
23705 name: "LoweredPanicBoundsC",
23706 auxType: auxInt64,
23707 argLen: 3,
23708 call: true,
23709 reg: regInfo{
23710 inputs: []inputInfo{
23711 {0, 1},
23712 {1, 2},
23713 },
23714 },
23715 },
23716 {
23717 name: "PRFM",
23718 auxType: auxInt64,
23719 argLen: 2,
23720 hasSideEffects: true,
23721 asm: arm64.APRFM,
23722 reg: regInfo{
23723 inputs: []inputInfo{
23724 {0, 9223372038331170815},
23725 },
23726 },
23727 },
23728 {
23729 name: "DMB",
23730 auxType: auxInt64,
23731 argLen: 1,
23732 hasSideEffects: true,
23733 asm: arm64.ADMB,
23734 reg: regInfo{},
23735 },
23736 {
23737 name: "ZERO",
23738 argLen: 0,
23739 zeroWidth: true,
23740 fixedReg: true,
23741 reg: regInfo{},
23742 },
23743
23744 {
23745 name: "NEGV",
23746 argLen: 1,
23747 reg: regInfo{
23748 inputs: []inputInfo{
23749 {0, 1073741816},
23750 },
23751 outputs: []outputInfo{
23752 {0, 1071644664},
23753 },
23754 },
23755 },
23756 {
23757 name: "NEGF",
23758 argLen: 1,
23759 asm: loong64.ANEGF,
23760 reg: regInfo{
23761 inputs: []inputInfo{
23762 {0, 4611686017353646080},
23763 },
23764 outputs: []outputInfo{
23765 {0, 4611686017353646080},
23766 },
23767 },
23768 },
23769 {
23770 name: "NEGD",
23771 argLen: 1,
23772 asm: loong64.ANEGD,
23773 reg: regInfo{
23774 inputs: []inputInfo{
23775 {0, 4611686017353646080},
23776 },
23777 outputs: []outputInfo{
23778 {0, 4611686017353646080},
23779 },
23780 },
23781 },
23782 {
23783 name: "SQRTD",
23784 argLen: 1,
23785 asm: loong64.ASQRTD,
23786 reg: regInfo{
23787 inputs: []inputInfo{
23788 {0, 4611686017353646080},
23789 },
23790 outputs: []outputInfo{
23791 {0, 4611686017353646080},
23792 },
23793 },
23794 },
23795 {
23796 name: "SQRTF",
23797 argLen: 1,
23798 asm: loong64.ASQRTF,
23799 reg: regInfo{
23800 inputs: []inputInfo{
23801 {0, 4611686017353646080},
23802 },
23803 outputs: []outputInfo{
23804 {0, 4611686017353646080},
23805 },
23806 },
23807 },
23808 {
23809 name: "ABSD",
23810 argLen: 1,
23811 asm: loong64.AABSD,
23812 reg: regInfo{
23813 inputs: []inputInfo{
23814 {0, 4611686017353646080},
23815 },
23816 outputs: []outputInfo{
23817 {0, 4611686017353646080},
23818 },
23819 },
23820 },
23821 {
23822 name: "CLZW",
23823 argLen: 1,
23824 asm: loong64.ACLZW,
23825 reg: regInfo{
23826 inputs: []inputInfo{
23827 {0, 1073741816},
23828 },
23829 outputs: []outputInfo{
23830 {0, 1071644664},
23831 },
23832 },
23833 },
23834 {
23835 name: "CLZV",
23836 argLen: 1,
23837 asm: loong64.ACLZV,
23838 reg: regInfo{
23839 inputs: []inputInfo{
23840 {0, 1073741816},
23841 },
23842 outputs: []outputInfo{
23843 {0, 1071644664},
23844 },
23845 },
23846 },
23847 {
23848 name: "CTZW",
23849 argLen: 1,
23850 asm: loong64.ACTZW,
23851 reg: regInfo{
23852 inputs: []inputInfo{
23853 {0, 1073741816},
23854 },
23855 outputs: []outputInfo{
23856 {0, 1071644664},
23857 },
23858 },
23859 },
23860 {
23861 name: "CTZV",
23862 argLen: 1,
23863 asm: loong64.ACTZV,
23864 reg: regInfo{
23865 inputs: []inputInfo{
23866 {0, 1073741816},
23867 },
23868 outputs: []outputInfo{
23869 {0, 1071644664},
23870 },
23871 },
23872 },
23873 {
23874 name: "REVB2H",
23875 argLen: 1,
23876 asm: loong64.AREVB2H,
23877 reg: regInfo{
23878 inputs: []inputInfo{
23879 {0, 1073741816},
23880 },
23881 outputs: []outputInfo{
23882 {0, 1071644664},
23883 },
23884 },
23885 },
23886 {
23887 name: "REVB2W",
23888 argLen: 1,
23889 asm: loong64.AREVB2W,
23890 reg: regInfo{
23891 inputs: []inputInfo{
23892 {0, 1073741816},
23893 },
23894 outputs: []outputInfo{
23895 {0, 1071644664},
23896 },
23897 },
23898 },
23899 {
23900 name: "REVBV",
23901 argLen: 1,
23902 asm: loong64.AREVBV,
23903 reg: regInfo{
23904 inputs: []inputInfo{
23905 {0, 1073741816},
23906 },
23907 outputs: []outputInfo{
23908 {0, 1071644664},
23909 },
23910 },
23911 },
23912 {
23913 name: "BITREV4B",
23914 argLen: 1,
23915 asm: loong64.ABITREV4B,
23916 reg: regInfo{
23917 inputs: []inputInfo{
23918 {0, 1073741816},
23919 },
23920 outputs: []outputInfo{
23921 {0, 1071644664},
23922 },
23923 },
23924 },
23925 {
23926 name: "BITREVW",
23927 argLen: 1,
23928 asm: loong64.ABITREVW,
23929 reg: regInfo{
23930 inputs: []inputInfo{
23931 {0, 1073741816},
23932 },
23933 outputs: []outputInfo{
23934 {0, 1071644664},
23935 },
23936 },
23937 },
23938 {
23939 name: "BITREVV",
23940 argLen: 1,
23941 asm: loong64.ABITREVV,
23942 reg: regInfo{
23943 inputs: []inputInfo{
23944 {0, 1073741816},
23945 },
23946 outputs: []outputInfo{
23947 {0, 1071644664},
23948 },
23949 },
23950 },
23951 {
23952 name: "VPCNT64",
23953 argLen: 1,
23954 asm: loong64.AVPCNTV,
23955 reg: regInfo{
23956 inputs: []inputInfo{
23957 {0, 4611686017353646080},
23958 },
23959 outputs: []outputInfo{
23960 {0, 4611686017353646080},
23961 },
23962 },
23963 },
23964 {
23965 name: "VPCNT32",
23966 argLen: 1,
23967 asm: loong64.AVPCNTW,
23968 reg: regInfo{
23969 inputs: []inputInfo{
23970 {0, 4611686017353646080},
23971 },
23972 outputs: []outputInfo{
23973 {0, 4611686017353646080},
23974 },
23975 },
23976 },
23977 {
23978 name: "VPCNT16",
23979 argLen: 1,
23980 asm: loong64.AVPCNTH,
23981 reg: regInfo{
23982 inputs: []inputInfo{
23983 {0, 4611686017353646080},
23984 },
23985 outputs: []outputInfo{
23986 {0, 4611686017353646080},
23987 },
23988 },
23989 },
23990 {
23991 name: "ADDV",
23992 argLen: 2,
23993 commutative: true,
23994 asm: loong64.AADDVU,
23995 reg: regInfo{
23996 inputs: []inputInfo{
23997 {0, 1073741816},
23998 {1, 1073741816},
23999 },
24000 outputs: []outputInfo{
24001 {0, 1071644664},
24002 },
24003 },
24004 },
24005 {
24006 name: "ADDVconst",
24007 auxType: auxInt64,
24008 argLen: 1,
24009 asm: loong64.AADDVU,
24010 reg: regInfo{
24011 inputs: []inputInfo{
24012 {0, 1073741820},
24013 },
24014 outputs: []outputInfo{
24015 {0, 1071644664},
24016 },
24017 },
24018 },
24019 {
24020 name: "SUBV",
24021 argLen: 2,
24022 asm: loong64.ASUBVU,
24023 reg: regInfo{
24024 inputs: []inputInfo{
24025 {0, 1073741816},
24026 {1, 1073741816},
24027 },
24028 outputs: []outputInfo{
24029 {0, 1071644664},
24030 },
24031 },
24032 },
24033 {
24034 name: "SUBVconst",
24035 auxType: auxInt64,
24036 argLen: 1,
24037 asm: loong64.ASUBVU,
24038 reg: regInfo{
24039 inputs: []inputInfo{
24040 {0, 1073741816},
24041 },
24042 outputs: []outputInfo{
24043 {0, 1071644664},
24044 },
24045 },
24046 },
24047 {
24048 name: "MULV",
24049 argLen: 2,
24050 commutative: true,
24051 asm: loong64.AMULV,
24052 reg: regInfo{
24053 inputs: []inputInfo{
24054 {0, 1073741816},
24055 {1, 1073741816},
24056 },
24057 outputs: []outputInfo{
24058 {0, 1071644664},
24059 },
24060 },
24061 },
24062 {
24063 name: "MULHV",
24064 argLen: 2,
24065 commutative: true,
24066 asm: loong64.AMULHV,
24067 reg: regInfo{
24068 inputs: []inputInfo{
24069 {0, 1073741816},
24070 {1, 1073741816},
24071 },
24072 outputs: []outputInfo{
24073 {0, 1071644664},
24074 },
24075 },
24076 },
24077 {
24078 name: "MULHVU",
24079 argLen: 2,
24080 commutative: true,
24081 asm: loong64.AMULHVU,
24082 reg: regInfo{
24083 inputs: []inputInfo{
24084 {0, 1073741816},
24085 {1, 1073741816},
24086 },
24087 outputs: []outputInfo{
24088 {0, 1071644664},
24089 },
24090 },
24091 },
24092 {
24093 name: "DIVV",
24094 argLen: 2,
24095 asm: loong64.ADIVV,
24096 reg: regInfo{
24097 inputs: []inputInfo{
24098 {0, 1073741816},
24099 {1, 1073741816},
24100 },
24101 outputs: []outputInfo{
24102 {0, 1071644664},
24103 },
24104 },
24105 },
24106 {
24107 name: "DIVVU",
24108 argLen: 2,
24109 asm: loong64.ADIVVU,
24110 reg: regInfo{
24111 inputs: []inputInfo{
24112 {0, 1073741816},
24113 {1, 1073741816},
24114 },
24115 outputs: []outputInfo{
24116 {0, 1071644664},
24117 },
24118 },
24119 },
24120 {
24121 name: "REMV",
24122 argLen: 2,
24123 asm: loong64.AREMV,
24124 reg: regInfo{
24125 inputs: []inputInfo{
24126 {0, 1073741816},
24127 {1, 1073741816},
24128 },
24129 outputs: []outputInfo{
24130 {0, 1071644664},
24131 },
24132 },
24133 },
24134 {
24135 name: "REMVU",
24136 argLen: 2,
24137 asm: loong64.AREMVU,
24138 reg: regInfo{
24139 inputs: []inputInfo{
24140 {0, 1073741816},
24141 {1, 1073741816},
24142 },
24143 outputs: []outputInfo{
24144 {0, 1071644664},
24145 },
24146 },
24147 },
24148 {
24149 name: "ADDF",
24150 argLen: 2,
24151 commutative: true,
24152 asm: loong64.AADDF,
24153 reg: regInfo{
24154 inputs: []inputInfo{
24155 {0, 4611686017353646080},
24156 {1, 4611686017353646080},
24157 },
24158 outputs: []outputInfo{
24159 {0, 4611686017353646080},
24160 },
24161 },
24162 },
24163 {
24164 name: "ADDD",
24165 argLen: 2,
24166 commutative: true,
24167 asm: loong64.AADDD,
24168 reg: regInfo{
24169 inputs: []inputInfo{
24170 {0, 4611686017353646080},
24171 {1, 4611686017353646080},
24172 },
24173 outputs: []outputInfo{
24174 {0, 4611686017353646080},
24175 },
24176 },
24177 },
24178 {
24179 name: "SUBF",
24180 argLen: 2,
24181 asm: loong64.ASUBF,
24182 reg: regInfo{
24183 inputs: []inputInfo{
24184 {0, 4611686017353646080},
24185 {1, 4611686017353646080},
24186 },
24187 outputs: []outputInfo{
24188 {0, 4611686017353646080},
24189 },
24190 },
24191 },
24192 {
24193 name: "SUBD",
24194 argLen: 2,
24195 asm: loong64.ASUBD,
24196 reg: regInfo{
24197 inputs: []inputInfo{
24198 {0, 4611686017353646080},
24199 {1, 4611686017353646080},
24200 },
24201 outputs: []outputInfo{
24202 {0, 4611686017353646080},
24203 },
24204 },
24205 },
24206 {
24207 name: "MULF",
24208 argLen: 2,
24209 commutative: true,
24210 asm: loong64.AMULF,
24211 reg: regInfo{
24212 inputs: []inputInfo{
24213 {0, 4611686017353646080},
24214 {1, 4611686017353646080},
24215 },
24216 outputs: []outputInfo{
24217 {0, 4611686017353646080},
24218 },
24219 },
24220 },
24221 {
24222 name: "MULD",
24223 argLen: 2,
24224 commutative: true,
24225 asm: loong64.AMULD,
24226 reg: regInfo{
24227 inputs: []inputInfo{
24228 {0, 4611686017353646080},
24229 {1, 4611686017353646080},
24230 },
24231 outputs: []outputInfo{
24232 {0, 4611686017353646080},
24233 },
24234 },
24235 },
24236 {
24237 name: "DIVF",
24238 argLen: 2,
24239 asm: loong64.ADIVF,
24240 reg: regInfo{
24241 inputs: []inputInfo{
24242 {0, 4611686017353646080},
24243 {1, 4611686017353646080},
24244 },
24245 outputs: []outputInfo{
24246 {0, 4611686017353646080},
24247 },
24248 },
24249 },
24250 {
24251 name: "DIVD",
24252 argLen: 2,
24253 asm: loong64.ADIVD,
24254 reg: regInfo{
24255 inputs: []inputInfo{
24256 {0, 4611686017353646080},
24257 {1, 4611686017353646080},
24258 },
24259 outputs: []outputInfo{
24260 {0, 4611686017353646080},
24261 },
24262 },
24263 },
24264 {
24265 name: "AND",
24266 argLen: 2,
24267 commutative: true,
24268 asm: loong64.AAND,
24269 reg: regInfo{
24270 inputs: []inputInfo{
24271 {0, 1073741816},
24272 {1, 1073741816},
24273 },
24274 outputs: []outputInfo{
24275 {0, 1071644664},
24276 },
24277 },
24278 },
24279 {
24280 name: "ANDconst",
24281 auxType: auxInt64,
24282 argLen: 1,
24283 asm: loong64.AAND,
24284 reg: regInfo{
24285 inputs: []inputInfo{
24286 {0, 1073741816},
24287 },
24288 outputs: []outputInfo{
24289 {0, 1071644664},
24290 },
24291 },
24292 },
24293 {
24294 name: "OR",
24295 argLen: 2,
24296 commutative: true,
24297 asm: loong64.AOR,
24298 reg: regInfo{
24299 inputs: []inputInfo{
24300 {0, 1073741816},
24301 {1, 1073741816},
24302 },
24303 outputs: []outputInfo{
24304 {0, 1071644664},
24305 },
24306 },
24307 },
24308 {
24309 name: "ORconst",
24310 auxType: auxInt64,
24311 argLen: 1,
24312 asm: loong64.AOR,
24313 reg: regInfo{
24314 inputs: []inputInfo{
24315 {0, 1073741816},
24316 },
24317 outputs: []outputInfo{
24318 {0, 1071644664},
24319 },
24320 },
24321 },
24322 {
24323 name: "XOR",
24324 argLen: 2,
24325 commutative: true,
24326 asm: loong64.AXOR,
24327 reg: regInfo{
24328 inputs: []inputInfo{
24329 {0, 1073741816},
24330 {1, 1073741816},
24331 },
24332 outputs: []outputInfo{
24333 {0, 1071644664},
24334 },
24335 },
24336 },
24337 {
24338 name: "XORconst",
24339 auxType: auxInt64,
24340 argLen: 1,
24341 asm: loong64.AXOR,
24342 reg: regInfo{
24343 inputs: []inputInfo{
24344 {0, 1073741816},
24345 },
24346 outputs: []outputInfo{
24347 {0, 1071644664},
24348 },
24349 },
24350 },
24351 {
24352 name: "NOR",
24353 argLen: 2,
24354 commutative: true,
24355 asm: loong64.ANOR,
24356 reg: regInfo{
24357 inputs: []inputInfo{
24358 {0, 1073741816},
24359 {1, 1073741816},
24360 },
24361 outputs: []outputInfo{
24362 {0, 1071644664},
24363 },
24364 },
24365 },
24366 {
24367 name: "NORconst",
24368 auxType: auxInt64,
24369 argLen: 1,
24370 asm: loong64.ANOR,
24371 reg: regInfo{
24372 inputs: []inputInfo{
24373 {0, 1073741816},
24374 },
24375 outputs: []outputInfo{
24376 {0, 1071644664},
24377 },
24378 },
24379 },
24380 {
24381 name: "FMADDF",
24382 argLen: 3,
24383 commutative: true,
24384 asm: loong64.AFMADDF,
24385 reg: regInfo{
24386 inputs: []inputInfo{
24387 {0, 4611686017353646080},
24388 {1, 4611686017353646080},
24389 {2, 4611686017353646080},
24390 },
24391 outputs: []outputInfo{
24392 {0, 4611686017353646080},
24393 },
24394 },
24395 },
24396 {
24397 name: "FMADDD",
24398 argLen: 3,
24399 commutative: true,
24400 asm: loong64.AFMADDD,
24401 reg: regInfo{
24402 inputs: []inputInfo{
24403 {0, 4611686017353646080},
24404 {1, 4611686017353646080},
24405 {2, 4611686017353646080},
24406 },
24407 outputs: []outputInfo{
24408 {0, 4611686017353646080},
24409 },
24410 },
24411 },
24412 {
24413 name: "FMSUBF",
24414 argLen: 3,
24415 commutative: true,
24416 asm: loong64.AFMSUBF,
24417 reg: regInfo{
24418 inputs: []inputInfo{
24419 {0, 4611686017353646080},
24420 {1, 4611686017353646080},
24421 {2, 4611686017353646080},
24422 },
24423 outputs: []outputInfo{
24424 {0, 4611686017353646080},
24425 },
24426 },
24427 },
24428 {
24429 name: "FMSUBD",
24430 argLen: 3,
24431 commutative: true,
24432 asm: loong64.AFMSUBD,
24433 reg: regInfo{
24434 inputs: []inputInfo{
24435 {0, 4611686017353646080},
24436 {1, 4611686017353646080},
24437 {2, 4611686017353646080},
24438 },
24439 outputs: []outputInfo{
24440 {0, 4611686017353646080},
24441 },
24442 },
24443 },
24444 {
24445 name: "FNMADDF",
24446 argLen: 3,
24447 commutative: true,
24448 asm: loong64.AFNMADDF,
24449 reg: regInfo{
24450 inputs: []inputInfo{
24451 {0, 4611686017353646080},
24452 {1, 4611686017353646080},
24453 {2, 4611686017353646080},
24454 },
24455 outputs: []outputInfo{
24456 {0, 4611686017353646080},
24457 },
24458 },
24459 },
24460 {
24461 name: "FNMADDD",
24462 argLen: 3,
24463 commutative: true,
24464 asm: loong64.AFNMADDD,
24465 reg: regInfo{
24466 inputs: []inputInfo{
24467 {0, 4611686017353646080},
24468 {1, 4611686017353646080},
24469 {2, 4611686017353646080},
24470 },
24471 outputs: []outputInfo{
24472 {0, 4611686017353646080},
24473 },
24474 },
24475 },
24476 {
24477 name: "FNMSUBF",
24478 argLen: 3,
24479 commutative: true,
24480 asm: loong64.AFNMSUBF,
24481 reg: regInfo{
24482 inputs: []inputInfo{
24483 {0, 4611686017353646080},
24484 {1, 4611686017353646080},
24485 {2, 4611686017353646080},
24486 },
24487 outputs: []outputInfo{
24488 {0, 4611686017353646080},
24489 },
24490 },
24491 },
24492 {
24493 name: "FNMSUBD",
24494 argLen: 3,
24495 commutative: true,
24496 asm: loong64.AFNMSUBD,
24497 reg: regInfo{
24498 inputs: []inputInfo{
24499 {0, 4611686017353646080},
24500 {1, 4611686017353646080},
24501 {2, 4611686017353646080},
24502 },
24503 outputs: []outputInfo{
24504 {0, 4611686017353646080},
24505 },
24506 },
24507 },
24508 {
24509 name: "FMINF",
24510 argLen: 2,
24511 commutative: true,
24512 resultNotInArgs: true,
24513 asm: loong64.AFMINF,
24514 reg: regInfo{
24515 inputs: []inputInfo{
24516 {0, 4611686017353646080},
24517 {1, 4611686017353646080},
24518 },
24519 outputs: []outputInfo{
24520 {0, 4611686017353646080},
24521 },
24522 },
24523 },
24524 {
24525 name: "FMIND",
24526 argLen: 2,
24527 commutative: true,
24528 resultNotInArgs: true,
24529 asm: loong64.AFMIND,
24530 reg: regInfo{
24531 inputs: []inputInfo{
24532 {0, 4611686017353646080},
24533 {1, 4611686017353646080},
24534 },
24535 outputs: []outputInfo{
24536 {0, 4611686017353646080},
24537 },
24538 },
24539 },
24540 {
24541 name: "FMAXF",
24542 argLen: 2,
24543 commutative: true,
24544 resultNotInArgs: true,
24545 asm: loong64.AFMAXF,
24546 reg: regInfo{
24547 inputs: []inputInfo{
24548 {0, 4611686017353646080},
24549 {1, 4611686017353646080},
24550 },
24551 outputs: []outputInfo{
24552 {0, 4611686017353646080},
24553 },
24554 },
24555 },
24556 {
24557 name: "FMAXD",
24558 argLen: 2,
24559 commutative: true,
24560 resultNotInArgs: true,
24561 asm: loong64.AFMAXD,
24562 reg: regInfo{
24563 inputs: []inputInfo{
24564 {0, 4611686017353646080},
24565 {1, 4611686017353646080},
24566 },
24567 outputs: []outputInfo{
24568 {0, 4611686017353646080},
24569 },
24570 },
24571 },
24572 {
24573 name: "MASKEQZ",
24574 argLen: 2,
24575 asm: loong64.AMASKEQZ,
24576 reg: regInfo{
24577 inputs: []inputInfo{
24578 {0, 1073741816},
24579 {1, 1073741816},
24580 },
24581 outputs: []outputInfo{
24582 {0, 1071644664},
24583 },
24584 },
24585 },
24586 {
24587 name: "MASKNEZ",
24588 argLen: 2,
24589 asm: loong64.AMASKNEZ,
24590 reg: regInfo{
24591 inputs: []inputInfo{
24592 {0, 1073741816},
24593 {1, 1073741816},
24594 },
24595 outputs: []outputInfo{
24596 {0, 1071644664},
24597 },
24598 },
24599 },
24600 {
24601 name: "FCOPYSGD",
24602 argLen: 2,
24603 asm: loong64.AFCOPYSGD,
24604 reg: regInfo{
24605 inputs: []inputInfo{
24606 {0, 4611686017353646080},
24607 {1, 4611686017353646080},
24608 },
24609 outputs: []outputInfo{
24610 {0, 4611686017353646080},
24611 },
24612 },
24613 },
24614 {
24615 name: "SLL",
24616 argLen: 2,
24617 asm: loong64.ASLL,
24618 reg: regInfo{
24619 inputs: []inputInfo{
24620 {0, 1073741816},
24621 {1, 1073741816},
24622 },
24623 outputs: []outputInfo{
24624 {0, 1071644664},
24625 },
24626 },
24627 },
24628 {
24629 name: "SLLV",
24630 argLen: 2,
24631 asm: loong64.ASLLV,
24632 reg: regInfo{
24633 inputs: []inputInfo{
24634 {0, 1073741816},
24635 {1, 1073741816},
24636 },
24637 outputs: []outputInfo{
24638 {0, 1071644664},
24639 },
24640 },
24641 },
24642 {
24643 name: "SLLconst",
24644 auxType: auxInt64,
24645 argLen: 1,
24646 asm: loong64.ASLL,
24647 reg: regInfo{
24648 inputs: []inputInfo{
24649 {0, 1073741816},
24650 },
24651 outputs: []outputInfo{
24652 {0, 1071644664},
24653 },
24654 },
24655 },
24656 {
24657 name: "SLLVconst",
24658 auxType: auxInt64,
24659 argLen: 1,
24660 asm: loong64.ASLLV,
24661 reg: regInfo{
24662 inputs: []inputInfo{
24663 {0, 1073741816},
24664 },
24665 outputs: []outputInfo{
24666 {0, 1071644664},
24667 },
24668 },
24669 },
24670 {
24671 name: "SRL",
24672 argLen: 2,
24673 asm: loong64.ASRL,
24674 reg: regInfo{
24675 inputs: []inputInfo{
24676 {0, 1073741816},
24677 {1, 1073741816},
24678 },
24679 outputs: []outputInfo{
24680 {0, 1071644664},
24681 },
24682 },
24683 },
24684 {
24685 name: "SRLV",
24686 argLen: 2,
24687 asm: loong64.ASRLV,
24688 reg: regInfo{
24689 inputs: []inputInfo{
24690 {0, 1073741816},
24691 {1, 1073741816},
24692 },
24693 outputs: []outputInfo{
24694 {0, 1071644664},
24695 },
24696 },
24697 },
24698 {
24699 name: "SRLconst",
24700 auxType: auxInt64,
24701 argLen: 1,
24702 asm: loong64.ASRL,
24703 reg: regInfo{
24704 inputs: []inputInfo{
24705 {0, 1073741816},
24706 },
24707 outputs: []outputInfo{
24708 {0, 1071644664},
24709 },
24710 },
24711 },
24712 {
24713 name: "SRLVconst",
24714 auxType: auxInt64,
24715 argLen: 1,
24716 asm: loong64.ASRLV,
24717 reg: regInfo{
24718 inputs: []inputInfo{
24719 {0, 1073741816},
24720 },
24721 outputs: []outputInfo{
24722 {0, 1071644664},
24723 },
24724 },
24725 },
24726 {
24727 name: "SRA",
24728 argLen: 2,
24729 asm: loong64.ASRA,
24730 reg: regInfo{
24731 inputs: []inputInfo{
24732 {0, 1073741816},
24733 {1, 1073741816},
24734 },
24735 outputs: []outputInfo{
24736 {0, 1071644664},
24737 },
24738 },
24739 },
24740 {
24741 name: "SRAV",
24742 argLen: 2,
24743 asm: loong64.ASRAV,
24744 reg: regInfo{
24745 inputs: []inputInfo{
24746 {0, 1073741816},
24747 {1, 1073741816},
24748 },
24749 outputs: []outputInfo{
24750 {0, 1071644664},
24751 },
24752 },
24753 },
24754 {
24755 name: "SRAconst",
24756 auxType: auxInt64,
24757 argLen: 1,
24758 asm: loong64.ASRA,
24759 reg: regInfo{
24760 inputs: []inputInfo{
24761 {0, 1073741816},
24762 },
24763 outputs: []outputInfo{
24764 {0, 1071644664},
24765 },
24766 },
24767 },
24768 {
24769 name: "SRAVconst",
24770 auxType: auxInt64,
24771 argLen: 1,
24772 asm: loong64.ASRAV,
24773 reg: regInfo{
24774 inputs: []inputInfo{
24775 {0, 1073741816},
24776 },
24777 outputs: []outputInfo{
24778 {0, 1071644664},
24779 },
24780 },
24781 },
24782 {
24783 name: "ROTR",
24784 argLen: 2,
24785 asm: loong64.AROTR,
24786 reg: regInfo{
24787 inputs: []inputInfo{
24788 {0, 1073741816},
24789 {1, 1073741816},
24790 },
24791 outputs: []outputInfo{
24792 {0, 1071644664},
24793 },
24794 },
24795 },
24796 {
24797 name: "ROTRV",
24798 argLen: 2,
24799 asm: loong64.AROTRV,
24800 reg: regInfo{
24801 inputs: []inputInfo{
24802 {0, 1073741816},
24803 {1, 1073741816},
24804 },
24805 outputs: []outputInfo{
24806 {0, 1071644664},
24807 },
24808 },
24809 },
24810 {
24811 name: "ROTRconst",
24812 auxType: auxInt64,
24813 argLen: 1,
24814 asm: loong64.AROTR,
24815 reg: regInfo{
24816 inputs: []inputInfo{
24817 {0, 1073741816},
24818 },
24819 outputs: []outputInfo{
24820 {0, 1071644664},
24821 },
24822 },
24823 },
24824 {
24825 name: "ROTRVconst",
24826 auxType: auxInt64,
24827 argLen: 1,
24828 asm: loong64.AROTRV,
24829 reg: regInfo{
24830 inputs: []inputInfo{
24831 {0, 1073741816},
24832 },
24833 outputs: []outputInfo{
24834 {0, 1071644664},
24835 },
24836 },
24837 },
24838 {
24839 name: "SGT",
24840 argLen: 2,
24841 asm: loong64.ASGT,
24842 reg: regInfo{
24843 inputs: []inputInfo{
24844 {0, 1073741816},
24845 {1, 1073741816},
24846 },
24847 outputs: []outputInfo{
24848 {0, 1071644664},
24849 },
24850 },
24851 },
24852 {
24853 name: "SGTconst",
24854 auxType: auxInt64,
24855 argLen: 1,
24856 asm: loong64.ASGT,
24857 reg: regInfo{
24858 inputs: []inputInfo{
24859 {0, 1073741816},
24860 },
24861 outputs: []outputInfo{
24862 {0, 1071644664},
24863 },
24864 },
24865 },
24866 {
24867 name: "SGTU",
24868 argLen: 2,
24869 asm: loong64.ASGTU,
24870 reg: regInfo{
24871 inputs: []inputInfo{
24872 {0, 1073741816},
24873 {1, 1073741816},
24874 },
24875 outputs: []outputInfo{
24876 {0, 1071644664},
24877 },
24878 },
24879 },
24880 {
24881 name: "SGTUconst",
24882 auxType: auxInt64,
24883 argLen: 1,
24884 asm: loong64.ASGTU,
24885 reg: regInfo{
24886 inputs: []inputInfo{
24887 {0, 1073741816},
24888 },
24889 outputs: []outputInfo{
24890 {0, 1071644664},
24891 },
24892 },
24893 },
24894 {
24895 name: "CMPEQF",
24896 argLen: 2,
24897 asm: loong64.ACMPEQF,
24898 reg: regInfo{
24899 inputs: []inputInfo{
24900 {0, 4611686017353646080},
24901 {1, 4611686017353646080},
24902 },
24903 },
24904 },
24905 {
24906 name: "CMPEQD",
24907 argLen: 2,
24908 asm: loong64.ACMPEQD,
24909 reg: regInfo{
24910 inputs: []inputInfo{
24911 {0, 4611686017353646080},
24912 {1, 4611686017353646080},
24913 },
24914 },
24915 },
24916 {
24917 name: "CMPGEF",
24918 argLen: 2,
24919 asm: loong64.ACMPGEF,
24920 reg: regInfo{
24921 inputs: []inputInfo{
24922 {0, 4611686017353646080},
24923 {1, 4611686017353646080},
24924 },
24925 },
24926 },
24927 {
24928 name: "CMPGED",
24929 argLen: 2,
24930 asm: loong64.ACMPGED,
24931 reg: regInfo{
24932 inputs: []inputInfo{
24933 {0, 4611686017353646080},
24934 {1, 4611686017353646080},
24935 },
24936 },
24937 },
24938 {
24939 name: "CMPGTF",
24940 argLen: 2,
24941 asm: loong64.ACMPGTF,
24942 reg: regInfo{
24943 inputs: []inputInfo{
24944 {0, 4611686017353646080},
24945 {1, 4611686017353646080},
24946 },
24947 },
24948 },
24949 {
24950 name: "CMPGTD",
24951 argLen: 2,
24952 asm: loong64.ACMPGTD,
24953 reg: regInfo{
24954 inputs: []inputInfo{
24955 {0, 4611686017353646080},
24956 {1, 4611686017353646080},
24957 },
24958 },
24959 },
24960 {
24961 name: "BSTRPICKW",
24962 auxType: auxInt64,
24963 argLen: 1,
24964 asm: loong64.ABSTRPICKW,
24965 reg: regInfo{
24966 inputs: []inputInfo{
24967 {0, 1073741816},
24968 },
24969 outputs: []outputInfo{
24970 {0, 1071644664},
24971 },
24972 },
24973 },
24974 {
24975 name: "BSTRPICKV",
24976 auxType: auxInt64,
24977 argLen: 1,
24978 asm: loong64.ABSTRPICKV,
24979 reg: regInfo{
24980 inputs: []inputInfo{
24981 {0, 1073741816},
24982 },
24983 outputs: []outputInfo{
24984 {0, 1071644664},
24985 },
24986 },
24987 },
24988 {
24989 name: "MOVVconst",
24990 auxType: auxInt64,
24991 argLen: 0,
24992 rematerializeable: true,
24993 asm: loong64.AMOVV,
24994 reg: regInfo{
24995 outputs: []outputInfo{
24996 {0, 1071644664},
24997 },
24998 },
24999 },
25000 {
25001 name: "MOVFconst",
25002 auxType: auxFloat64,
25003 argLen: 0,
25004 rematerializeable: true,
25005 asm: loong64.AMOVF,
25006 reg: regInfo{
25007 outputs: []outputInfo{
25008 {0, 4611686017353646080},
25009 },
25010 },
25011 },
25012 {
25013 name: "MOVDconst",
25014 auxType: auxFloat64,
25015 argLen: 0,
25016 rematerializeable: true,
25017 asm: loong64.AMOVD,
25018 reg: regInfo{
25019 outputs: []outputInfo{
25020 {0, 4611686017353646080},
25021 },
25022 },
25023 },
25024 {
25025 name: "MOVVaddr",
25026 auxType: auxSymOff,
25027 argLen: 1,
25028 rematerializeable: true,
25029 symEffect: SymAddr,
25030 asm: loong64.AMOVV,
25031 reg: regInfo{
25032 inputs: []inputInfo{
25033 {0, 4611686018427387908},
25034 },
25035 outputs: []outputInfo{
25036 {0, 1071644664},
25037 },
25038 },
25039 },
25040 {
25041 name: "MOVBload",
25042 auxType: auxSymOff,
25043 argLen: 2,
25044 faultOnNilArg0: true,
25045 symEffect: SymRead,
25046 asm: loong64.AMOVB,
25047 reg: regInfo{
25048 inputs: []inputInfo{
25049 {0, 4611686019501129724},
25050 },
25051 outputs: []outputInfo{
25052 {0, 1071644664},
25053 },
25054 },
25055 },
25056 {
25057 name: "MOVBUload",
25058 auxType: auxSymOff,
25059 argLen: 2,
25060 faultOnNilArg0: true,
25061 symEffect: SymRead,
25062 asm: loong64.AMOVBU,
25063 reg: regInfo{
25064 inputs: []inputInfo{
25065 {0, 4611686019501129724},
25066 },
25067 outputs: []outputInfo{
25068 {0, 1071644664},
25069 },
25070 },
25071 },
25072 {
25073 name: "MOVHload",
25074 auxType: auxSymOff,
25075 argLen: 2,
25076 faultOnNilArg0: true,
25077 symEffect: SymRead,
25078 asm: loong64.AMOVH,
25079 reg: regInfo{
25080 inputs: []inputInfo{
25081 {0, 4611686019501129724},
25082 },
25083 outputs: []outputInfo{
25084 {0, 1071644664},
25085 },
25086 },
25087 },
25088 {
25089 name: "MOVHUload",
25090 auxType: auxSymOff,
25091 argLen: 2,
25092 faultOnNilArg0: true,
25093 symEffect: SymRead,
25094 asm: loong64.AMOVHU,
25095 reg: regInfo{
25096 inputs: []inputInfo{
25097 {0, 4611686019501129724},
25098 },
25099 outputs: []outputInfo{
25100 {0, 1071644664},
25101 },
25102 },
25103 },
25104 {
25105 name: "MOVWload",
25106 auxType: auxSymOff,
25107 argLen: 2,
25108 faultOnNilArg0: true,
25109 symEffect: SymRead,
25110 asm: loong64.AMOVW,
25111 reg: regInfo{
25112 inputs: []inputInfo{
25113 {0, 4611686019501129724},
25114 },
25115 outputs: []outputInfo{
25116 {0, 1071644664},
25117 },
25118 },
25119 },
25120 {
25121 name: "MOVWUload",
25122 auxType: auxSymOff,
25123 argLen: 2,
25124 faultOnNilArg0: true,
25125 symEffect: SymRead,
25126 asm: loong64.AMOVWU,
25127 reg: regInfo{
25128 inputs: []inputInfo{
25129 {0, 4611686019501129724},
25130 },
25131 outputs: []outputInfo{
25132 {0, 1071644664},
25133 },
25134 },
25135 },
25136 {
25137 name: "MOVVload",
25138 auxType: auxSymOff,
25139 argLen: 2,
25140 faultOnNilArg0: true,
25141 symEffect: SymRead,
25142 asm: loong64.AMOVV,
25143 reg: regInfo{
25144 inputs: []inputInfo{
25145 {0, 4611686019501129724},
25146 },
25147 outputs: []outputInfo{
25148 {0, 1071644664},
25149 },
25150 },
25151 },
25152 {
25153 name: "MOVFload",
25154 auxType: auxSymOff,
25155 argLen: 2,
25156 faultOnNilArg0: true,
25157 symEffect: SymRead,
25158 asm: loong64.AMOVF,
25159 reg: regInfo{
25160 inputs: []inputInfo{
25161 {0, 4611686019501129724},
25162 },
25163 outputs: []outputInfo{
25164 {0, 4611686017353646080},
25165 },
25166 },
25167 },
25168 {
25169 name: "MOVDload",
25170 auxType: auxSymOff,
25171 argLen: 2,
25172 faultOnNilArg0: true,
25173 symEffect: SymRead,
25174 asm: loong64.AMOVD,
25175 reg: regInfo{
25176 inputs: []inputInfo{
25177 {0, 4611686019501129724},
25178 },
25179 outputs: []outputInfo{
25180 {0, 4611686017353646080},
25181 },
25182 },
25183 },
25184 {
25185 name: "MOVVloadidx",
25186 argLen: 3,
25187 asm: loong64.AMOVV,
25188 reg: regInfo{
25189 inputs: []inputInfo{
25190 {1, 1073741816},
25191 {0, 4611686019501129724},
25192 },
25193 outputs: []outputInfo{
25194 {0, 1071644664},
25195 },
25196 },
25197 },
25198 {
25199 name: "MOVWloadidx",
25200 argLen: 3,
25201 asm: loong64.AMOVW,
25202 reg: regInfo{
25203 inputs: []inputInfo{
25204 {1, 1073741816},
25205 {0, 4611686019501129724},
25206 },
25207 outputs: []outputInfo{
25208 {0, 1071644664},
25209 },
25210 },
25211 },
25212 {
25213 name: "MOVWUloadidx",
25214 argLen: 3,
25215 asm: loong64.AMOVWU,
25216 reg: regInfo{
25217 inputs: []inputInfo{
25218 {1, 1073741816},
25219 {0, 4611686019501129724},
25220 },
25221 outputs: []outputInfo{
25222 {0, 1071644664},
25223 },
25224 },
25225 },
25226 {
25227 name: "MOVHloadidx",
25228 argLen: 3,
25229 asm: loong64.AMOVH,
25230 reg: regInfo{
25231 inputs: []inputInfo{
25232 {1, 1073741816},
25233 {0, 4611686019501129724},
25234 },
25235 outputs: []outputInfo{
25236 {0, 1071644664},
25237 },
25238 },
25239 },
25240 {
25241 name: "MOVHUloadidx",
25242 argLen: 3,
25243 asm: loong64.AMOVHU,
25244 reg: regInfo{
25245 inputs: []inputInfo{
25246 {1, 1073741816},
25247 {0, 4611686019501129724},
25248 },
25249 outputs: []outputInfo{
25250 {0, 1071644664},
25251 },
25252 },
25253 },
25254 {
25255 name: "MOVBloadidx",
25256 argLen: 3,
25257 asm: loong64.AMOVB,
25258 reg: regInfo{
25259 inputs: []inputInfo{
25260 {1, 1073741816},
25261 {0, 4611686019501129724},
25262 },
25263 outputs: []outputInfo{
25264 {0, 1071644664},
25265 },
25266 },
25267 },
25268 {
25269 name: "MOVBUloadidx",
25270 argLen: 3,
25271 asm: loong64.AMOVBU,
25272 reg: regInfo{
25273 inputs: []inputInfo{
25274 {1, 1073741816},
25275 {0, 4611686019501129724},
25276 },
25277 outputs: []outputInfo{
25278 {0, 1071644664},
25279 },
25280 },
25281 },
25282 {
25283 name: "MOVFloadidx",
25284 argLen: 3,
25285 asm: loong64.AMOVF,
25286 reg: regInfo{
25287 inputs: []inputInfo{
25288 {1, 1073741816},
25289 {0, 4611686019501129724},
25290 },
25291 outputs: []outputInfo{
25292 {0, 4611686017353646080},
25293 },
25294 },
25295 },
25296 {
25297 name: "MOVDloadidx",
25298 argLen: 3,
25299 asm: loong64.AMOVD,
25300 reg: regInfo{
25301 inputs: []inputInfo{
25302 {1, 1073741816},
25303 {0, 4611686019501129724},
25304 },
25305 outputs: []outputInfo{
25306 {0, 4611686017353646080},
25307 },
25308 },
25309 },
25310 {
25311 name: "MOVBstore",
25312 auxType: auxSymOff,
25313 argLen: 3,
25314 faultOnNilArg0: true,
25315 symEffect: SymWrite,
25316 asm: loong64.AMOVB,
25317 reg: regInfo{
25318 inputs: []inputInfo{
25319 {1, 1073741816},
25320 {0, 4611686019501129724},
25321 },
25322 },
25323 },
25324 {
25325 name: "MOVHstore",
25326 auxType: auxSymOff,
25327 argLen: 3,
25328 faultOnNilArg0: true,
25329 symEffect: SymWrite,
25330 asm: loong64.AMOVH,
25331 reg: regInfo{
25332 inputs: []inputInfo{
25333 {1, 1073741816},
25334 {0, 4611686019501129724},
25335 },
25336 },
25337 },
25338 {
25339 name: "MOVWstore",
25340 auxType: auxSymOff,
25341 argLen: 3,
25342 faultOnNilArg0: true,
25343 symEffect: SymWrite,
25344 asm: loong64.AMOVW,
25345 reg: regInfo{
25346 inputs: []inputInfo{
25347 {1, 1073741816},
25348 {0, 4611686019501129724},
25349 },
25350 },
25351 },
25352 {
25353 name: "MOVVstore",
25354 auxType: auxSymOff,
25355 argLen: 3,
25356 faultOnNilArg0: true,
25357 symEffect: SymWrite,
25358 asm: loong64.AMOVV,
25359 reg: regInfo{
25360 inputs: []inputInfo{
25361 {1, 1073741816},
25362 {0, 4611686019501129724},
25363 },
25364 },
25365 },
25366 {
25367 name: "MOVFstore",
25368 auxType: auxSymOff,
25369 argLen: 3,
25370 faultOnNilArg0: true,
25371 symEffect: SymWrite,
25372 asm: loong64.AMOVF,
25373 reg: regInfo{
25374 inputs: []inputInfo{
25375 {0, 4611686019501129724},
25376 {1, 4611686017353646080},
25377 },
25378 },
25379 },
25380 {
25381 name: "MOVDstore",
25382 auxType: auxSymOff,
25383 argLen: 3,
25384 faultOnNilArg0: true,
25385 symEffect: SymWrite,
25386 asm: loong64.AMOVD,
25387 reg: regInfo{
25388 inputs: []inputInfo{
25389 {0, 4611686019501129724},
25390 {1, 4611686017353646080},
25391 },
25392 },
25393 },
25394 {
25395 name: "MOVBstoreidx",
25396 argLen: 4,
25397 asm: loong64.AMOVB,
25398 reg: regInfo{
25399 inputs: []inputInfo{
25400 {1, 1073741816},
25401 {2, 1073741816},
25402 {0, 4611686019501129724},
25403 },
25404 },
25405 },
25406 {
25407 name: "MOVHstoreidx",
25408 argLen: 4,
25409 asm: loong64.AMOVH,
25410 reg: regInfo{
25411 inputs: []inputInfo{
25412 {1, 1073741816},
25413 {2, 1073741816},
25414 {0, 4611686019501129724},
25415 },
25416 },
25417 },
25418 {
25419 name: "MOVWstoreidx",
25420 argLen: 4,
25421 asm: loong64.AMOVW,
25422 reg: regInfo{
25423 inputs: []inputInfo{
25424 {1, 1073741816},
25425 {2, 1073741816},
25426 {0, 4611686019501129724},
25427 },
25428 },
25429 },
25430 {
25431 name: "MOVVstoreidx",
25432 argLen: 4,
25433 asm: loong64.AMOVV,
25434 reg: regInfo{
25435 inputs: []inputInfo{
25436 {1, 1073741816},
25437 {2, 1073741816},
25438 {0, 4611686019501129724},
25439 },
25440 },
25441 },
25442 {
25443 name: "MOVFstoreidx",
25444 argLen: 4,
25445 asm: loong64.AMOVF,
25446 reg: regInfo{
25447 inputs: []inputInfo{
25448 {1, 1073741816},
25449 {0, 4611686019501129724},
25450 {2, 4611686017353646080},
25451 },
25452 },
25453 },
25454 {
25455 name: "MOVDstoreidx",
25456 argLen: 4,
25457 asm: loong64.AMOVD,
25458 reg: regInfo{
25459 inputs: []inputInfo{
25460 {1, 1073741816},
25461 {0, 4611686019501129724},
25462 {2, 4611686017353646080},
25463 },
25464 },
25465 },
25466 {
25467 name: "MOVBstorezero",
25468 auxType: auxSymOff,
25469 argLen: 2,
25470 faultOnNilArg0: true,
25471 symEffect: SymWrite,
25472 asm: loong64.AMOVB,
25473 reg: regInfo{
25474 inputs: []inputInfo{
25475 {0, 4611686019501129724},
25476 },
25477 },
25478 },
25479 {
25480 name: "MOVHstorezero",
25481 auxType: auxSymOff,
25482 argLen: 2,
25483 faultOnNilArg0: true,
25484 symEffect: SymWrite,
25485 asm: loong64.AMOVH,
25486 reg: regInfo{
25487 inputs: []inputInfo{
25488 {0, 4611686019501129724},
25489 },
25490 },
25491 },
25492 {
25493 name: "MOVWstorezero",
25494 auxType: auxSymOff,
25495 argLen: 2,
25496 faultOnNilArg0: true,
25497 symEffect: SymWrite,
25498 asm: loong64.AMOVW,
25499 reg: regInfo{
25500 inputs: []inputInfo{
25501 {0, 4611686019501129724},
25502 },
25503 },
25504 },
25505 {
25506 name: "MOVVstorezero",
25507 auxType: auxSymOff,
25508 argLen: 2,
25509 faultOnNilArg0: true,
25510 symEffect: SymWrite,
25511 asm: loong64.AMOVV,
25512 reg: regInfo{
25513 inputs: []inputInfo{
25514 {0, 4611686019501129724},
25515 },
25516 },
25517 },
25518 {
25519 name: "MOVBstorezeroidx",
25520 argLen: 3,
25521 asm: loong64.AMOVB,
25522 reg: regInfo{
25523 inputs: []inputInfo{
25524 {1, 1073741816},
25525 {0, 4611686019501129724},
25526 },
25527 },
25528 },
25529 {
25530 name: "MOVHstorezeroidx",
25531 argLen: 3,
25532 asm: loong64.AMOVH,
25533 reg: regInfo{
25534 inputs: []inputInfo{
25535 {1, 1073741816},
25536 {0, 4611686019501129724},
25537 },
25538 },
25539 },
25540 {
25541 name: "MOVWstorezeroidx",
25542 argLen: 3,
25543 asm: loong64.AMOVW,
25544 reg: regInfo{
25545 inputs: []inputInfo{
25546 {1, 1073741816},
25547 {0, 4611686019501129724},
25548 },
25549 },
25550 },
25551 {
25552 name: "MOVVstorezeroidx",
25553 argLen: 3,
25554 asm: loong64.AMOVV,
25555 reg: regInfo{
25556 inputs: []inputInfo{
25557 {1, 1073741816},
25558 {0, 4611686019501129724},
25559 },
25560 },
25561 },
25562 {
25563 name: "MOVWfpgp",
25564 argLen: 1,
25565 asm: loong64.AMOVW,
25566 reg: regInfo{
25567 inputs: []inputInfo{
25568 {0, 4611686017353646080},
25569 },
25570 outputs: []outputInfo{
25571 {0, 1071644664},
25572 },
25573 },
25574 },
25575 {
25576 name: "MOVWgpfp",
25577 argLen: 1,
25578 asm: loong64.AMOVW,
25579 reg: regInfo{
25580 inputs: []inputInfo{
25581 {0, 1071644664},
25582 },
25583 outputs: []outputInfo{
25584 {0, 4611686017353646080},
25585 },
25586 },
25587 },
25588 {
25589 name: "MOVVfpgp",
25590 argLen: 1,
25591 asm: loong64.AMOVV,
25592 reg: regInfo{
25593 inputs: []inputInfo{
25594 {0, 4611686017353646080},
25595 },
25596 outputs: []outputInfo{
25597 {0, 1071644664},
25598 },
25599 },
25600 },
25601 {
25602 name: "MOVVgpfp",
25603 argLen: 1,
25604 asm: loong64.AMOVV,
25605 reg: regInfo{
25606 inputs: []inputInfo{
25607 {0, 1071644664},
25608 },
25609 outputs: []outputInfo{
25610 {0, 4611686017353646080},
25611 },
25612 },
25613 },
25614 {
25615 name: "MOVBreg",
25616 argLen: 1,
25617 asm: loong64.AMOVB,
25618 reg: regInfo{
25619 inputs: []inputInfo{
25620 {0, 1073741816},
25621 },
25622 outputs: []outputInfo{
25623 {0, 1071644664},
25624 },
25625 },
25626 },
25627 {
25628 name: "MOVBUreg",
25629 argLen: 1,
25630 asm: loong64.AMOVBU,
25631 reg: regInfo{
25632 inputs: []inputInfo{
25633 {0, 1073741816},
25634 },
25635 outputs: []outputInfo{
25636 {0, 1071644664},
25637 },
25638 },
25639 },
25640 {
25641 name: "MOVHreg",
25642 argLen: 1,
25643 asm: loong64.AMOVH,
25644 reg: regInfo{
25645 inputs: []inputInfo{
25646 {0, 1073741816},
25647 },
25648 outputs: []outputInfo{
25649 {0, 1071644664},
25650 },
25651 },
25652 },
25653 {
25654 name: "MOVHUreg",
25655 argLen: 1,
25656 asm: loong64.AMOVHU,
25657 reg: regInfo{
25658 inputs: []inputInfo{
25659 {0, 1073741816},
25660 },
25661 outputs: []outputInfo{
25662 {0, 1071644664},
25663 },
25664 },
25665 },
25666 {
25667 name: "MOVWreg",
25668 argLen: 1,
25669 asm: loong64.AMOVW,
25670 reg: regInfo{
25671 inputs: []inputInfo{
25672 {0, 1073741816},
25673 },
25674 outputs: []outputInfo{
25675 {0, 1071644664},
25676 },
25677 },
25678 },
25679 {
25680 name: "MOVWUreg",
25681 argLen: 1,
25682 asm: loong64.AMOVWU,
25683 reg: regInfo{
25684 inputs: []inputInfo{
25685 {0, 1073741816},
25686 },
25687 outputs: []outputInfo{
25688 {0, 1071644664},
25689 },
25690 },
25691 },
25692 {
25693 name: "MOVVreg",
25694 argLen: 1,
25695 asm: loong64.AMOVV,
25696 reg: regInfo{
25697 inputs: []inputInfo{
25698 {0, 1073741816},
25699 },
25700 outputs: []outputInfo{
25701 {0, 1071644664},
25702 },
25703 },
25704 },
25705 {
25706 name: "MOVVnop",
25707 argLen: 1,
25708 resultInArg0: true,
25709 reg: regInfo{
25710 inputs: []inputInfo{
25711 {0, 1071644664},
25712 },
25713 outputs: []outputInfo{
25714 {0, 1071644664},
25715 },
25716 },
25717 },
25718 {
25719 name: "MOVWF",
25720 argLen: 1,
25721 asm: loong64.AMOVWF,
25722 reg: regInfo{
25723 inputs: []inputInfo{
25724 {0, 4611686017353646080},
25725 },
25726 outputs: []outputInfo{
25727 {0, 4611686017353646080},
25728 },
25729 },
25730 },
25731 {
25732 name: "MOVWD",
25733 argLen: 1,
25734 asm: loong64.AMOVWD,
25735 reg: regInfo{
25736 inputs: []inputInfo{
25737 {0, 4611686017353646080},
25738 },
25739 outputs: []outputInfo{
25740 {0, 4611686017353646080},
25741 },
25742 },
25743 },
25744 {
25745 name: "MOVVF",
25746 argLen: 1,
25747 asm: loong64.AMOVVF,
25748 reg: regInfo{
25749 inputs: []inputInfo{
25750 {0, 4611686017353646080},
25751 },
25752 outputs: []outputInfo{
25753 {0, 4611686017353646080},
25754 },
25755 },
25756 },
25757 {
25758 name: "MOVVD",
25759 argLen: 1,
25760 asm: loong64.AMOVVD,
25761 reg: regInfo{
25762 inputs: []inputInfo{
25763 {0, 4611686017353646080},
25764 },
25765 outputs: []outputInfo{
25766 {0, 4611686017353646080},
25767 },
25768 },
25769 },
25770 {
25771 name: "TRUNCFW",
25772 argLen: 1,
25773 asm: loong64.ATRUNCFW,
25774 reg: regInfo{
25775 inputs: []inputInfo{
25776 {0, 4611686017353646080},
25777 },
25778 outputs: []outputInfo{
25779 {0, 4611686017353646080},
25780 },
25781 },
25782 },
25783 {
25784 name: "TRUNCDW",
25785 argLen: 1,
25786 asm: loong64.ATRUNCDW,
25787 reg: regInfo{
25788 inputs: []inputInfo{
25789 {0, 4611686017353646080},
25790 },
25791 outputs: []outputInfo{
25792 {0, 4611686017353646080},
25793 },
25794 },
25795 },
25796 {
25797 name: "TRUNCFV",
25798 argLen: 1,
25799 asm: loong64.ATRUNCFV,
25800 reg: regInfo{
25801 inputs: []inputInfo{
25802 {0, 4611686017353646080},
25803 },
25804 outputs: []outputInfo{
25805 {0, 4611686017353646080},
25806 },
25807 },
25808 },
25809 {
25810 name: "TRUNCDV",
25811 argLen: 1,
25812 asm: loong64.ATRUNCDV,
25813 reg: regInfo{
25814 inputs: []inputInfo{
25815 {0, 4611686017353646080},
25816 },
25817 outputs: []outputInfo{
25818 {0, 4611686017353646080},
25819 },
25820 },
25821 },
25822 {
25823 name: "MOVFD",
25824 argLen: 1,
25825 asm: loong64.AMOVFD,
25826 reg: regInfo{
25827 inputs: []inputInfo{
25828 {0, 4611686017353646080},
25829 },
25830 outputs: []outputInfo{
25831 {0, 4611686017353646080},
25832 },
25833 },
25834 },
25835 {
25836 name: "MOVDF",
25837 argLen: 1,
25838 asm: loong64.AMOVDF,
25839 reg: regInfo{
25840 inputs: []inputInfo{
25841 {0, 4611686017353646080},
25842 },
25843 outputs: []outputInfo{
25844 {0, 4611686017353646080},
25845 },
25846 },
25847 },
25848 {
25849 name: "LoweredRound32F",
25850 argLen: 1,
25851 resultInArg0: true,
25852 reg: regInfo{
25853 inputs: []inputInfo{
25854 {0, 4611686017353646080},
25855 },
25856 outputs: []outputInfo{
25857 {0, 4611686017353646080},
25858 },
25859 },
25860 },
25861 {
25862 name: "LoweredRound64F",
25863 argLen: 1,
25864 resultInArg0: true,
25865 reg: regInfo{
25866 inputs: []inputInfo{
25867 {0, 4611686017353646080},
25868 },
25869 outputs: []outputInfo{
25870 {0, 4611686017353646080},
25871 },
25872 },
25873 },
25874 {
25875 name: "CALLstatic",
25876 auxType: auxCallOff,
25877 argLen: -1,
25878 clobberFlags: true,
25879 call: true,
25880 reg: regInfo{
25881 clobbers: 4611686018427387896,
25882 },
25883 },
25884 {
25885 name: "CALLtail",
25886 auxType: auxCallOff,
25887 argLen: -1,
25888 clobberFlags: true,
25889 call: true,
25890 tailCall: true,
25891 reg: regInfo{
25892 clobbers: 4611686018427387896,
25893 },
25894 },
25895 {
25896 name: "CALLclosure",
25897 auxType: auxCallOff,
25898 argLen: -1,
25899 clobberFlags: true,
25900 call: true,
25901 reg: regInfo{
25902 inputs: []inputInfo{
25903 {1, 268435456},
25904 {0, 1071644668},
25905 },
25906 clobbers: 4611686018427387896,
25907 },
25908 },
25909 {
25910 name: "CALLinter",
25911 auxType: auxCallOff,
25912 argLen: -1,
25913 clobberFlags: true,
25914 call: true,
25915 reg: regInfo{
25916 inputs: []inputInfo{
25917 {0, 1071644664},
25918 },
25919 clobbers: 4611686018427387896,
25920 },
25921 },
25922 {
25923 name: "DUFFZERO",
25924 auxType: auxInt64,
25925 argLen: 2,
25926 faultOnNilArg0: true,
25927 reg: regInfo{
25928 inputs: []inputInfo{
25929 {0, 524288},
25930 },
25931 clobbers: 524290,
25932 },
25933 },
25934 {
25935 name: "DUFFCOPY",
25936 auxType: auxInt64,
25937 argLen: 3,
25938 faultOnNilArg0: true,
25939 faultOnNilArg1: true,
25940 reg: regInfo{
25941 inputs: []inputInfo{
25942 {0, 1048576},
25943 {1, 524288},
25944 },
25945 clobbers: 1572866,
25946 },
25947 },
25948 {
25949 name: "LoweredZero",
25950 auxType: auxInt64,
25951 argLen: 3,
25952 faultOnNilArg0: true,
25953 reg: regInfo{
25954 inputs: []inputInfo{
25955 {0, 524288},
25956 {1, 1071644664},
25957 },
25958 clobbers: 524288,
25959 },
25960 },
25961 {
25962 name: "LoweredMove",
25963 auxType: auxInt64,
25964 argLen: 4,
25965 faultOnNilArg0: true,
25966 faultOnNilArg1: true,
25967 reg: regInfo{
25968 inputs: []inputInfo{
25969 {0, 1048576},
25970 {1, 524288},
25971 {2, 1071644664},
25972 },
25973 clobbers: 1572864,
25974 },
25975 },
25976 {
25977 name: "LoweredAtomicLoad8",
25978 argLen: 2,
25979 faultOnNilArg0: true,
25980 reg: regInfo{
25981 inputs: []inputInfo{
25982 {0, 4611686019501129724},
25983 },
25984 outputs: []outputInfo{
25985 {0, 1071644664},
25986 },
25987 },
25988 },
25989 {
25990 name: "LoweredAtomicLoad32",
25991 argLen: 2,
25992 faultOnNilArg0: true,
25993 reg: regInfo{
25994 inputs: []inputInfo{
25995 {0, 4611686019501129724},
25996 },
25997 outputs: []outputInfo{
25998 {0, 1071644664},
25999 },
26000 },
26001 },
26002 {
26003 name: "LoweredAtomicLoad64",
26004 argLen: 2,
26005 faultOnNilArg0: true,
26006 reg: regInfo{
26007 inputs: []inputInfo{
26008 {0, 4611686019501129724},
26009 },
26010 outputs: []outputInfo{
26011 {0, 1071644664},
26012 },
26013 },
26014 },
26015 {
26016 name: "LoweredAtomicStore8",
26017 argLen: 3,
26018 faultOnNilArg0: true,
26019 hasSideEffects: true,
26020 reg: regInfo{
26021 inputs: []inputInfo{
26022 {1, 1073741816},
26023 {0, 4611686019501129724},
26024 },
26025 },
26026 },
26027 {
26028 name: "LoweredAtomicStore32",
26029 argLen: 3,
26030 faultOnNilArg0: true,
26031 hasSideEffects: true,
26032 reg: regInfo{
26033 inputs: []inputInfo{
26034 {1, 1073741816},
26035 {0, 4611686019501129724},
26036 },
26037 },
26038 },
26039 {
26040 name: "LoweredAtomicStore64",
26041 argLen: 3,
26042 faultOnNilArg0: true,
26043 hasSideEffects: true,
26044 reg: regInfo{
26045 inputs: []inputInfo{
26046 {1, 1073741816},
26047 {0, 4611686019501129724},
26048 },
26049 },
26050 },
26051 {
26052 name: "LoweredAtomicStore8Variant",
26053 argLen: 3,
26054 faultOnNilArg0: true,
26055 hasSideEffects: true,
26056 reg: regInfo{
26057 inputs: []inputInfo{
26058 {1, 1073741816},
26059 {0, 4611686019501129724},
26060 },
26061 },
26062 },
26063 {
26064 name: "LoweredAtomicStore32Variant",
26065 argLen: 3,
26066 faultOnNilArg0: true,
26067 hasSideEffects: true,
26068 reg: regInfo{
26069 inputs: []inputInfo{
26070 {1, 1073741816},
26071 {0, 4611686019501129724},
26072 },
26073 },
26074 },
26075 {
26076 name: "LoweredAtomicStore64Variant",
26077 argLen: 3,
26078 faultOnNilArg0: true,
26079 hasSideEffects: true,
26080 reg: regInfo{
26081 inputs: []inputInfo{
26082 {1, 1073741816},
26083 {0, 4611686019501129724},
26084 },
26085 },
26086 },
26087 {
26088 name: "LoweredAtomicExchange32",
26089 argLen: 3,
26090 resultNotInArgs: true,
26091 faultOnNilArg0: true,
26092 hasSideEffects: true,
26093 reg: regInfo{
26094 inputs: []inputInfo{
26095 {1, 1073741816},
26096 {0, 4611686019501129724},
26097 },
26098 outputs: []outputInfo{
26099 {0, 1071644664},
26100 },
26101 },
26102 },
26103 {
26104 name: "LoweredAtomicExchange64",
26105 argLen: 3,
26106 resultNotInArgs: true,
26107 faultOnNilArg0: true,
26108 hasSideEffects: true,
26109 reg: regInfo{
26110 inputs: []inputInfo{
26111 {1, 1073741816},
26112 {0, 4611686019501129724},
26113 },
26114 outputs: []outputInfo{
26115 {0, 1071644664},
26116 },
26117 },
26118 },
26119 {
26120 name: "LoweredAtomicExchange8Variant",
26121 argLen: 3,
26122 resultNotInArgs: true,
26123 faultOnNilArg0: true,
26124 hasSideEffects: true,
26125 reg: regInfo{
26126 inputs: []inputInfo{
26127 {1, 1073741816},
26128 {0, 4611686019501129724},
26129 },
26130 outputs: []outputInfo{
26131 {0, 1071644664},
26132 },
26133 },
26134 },
26135 {
26136 name: "LoweredAtomicAdd32",
26137 argLen: 3,
26138 resultNotInArgs: true,
26139 faultOnNilArg0: true,
26140 hasSideEffects: true,
26141 reg: regInfo{
26142 inputs: []inputInfo{
26143 {1, 1073741816},
26144 {0, 4611686019501129724},
26145 },
26146 outputs: []outputInfo{
26147 {0, 1071644664},
26148 },
26149 },
26150 },
26151 {
26152 name: "LoweredAtomicAdd64",
26153 argLen: 3,
26154 resultNotInArgs: true,
26155 faultOnNilArg0: true,
26156 hasSideEffects: true,
26157 reg: regInfo{
26158 inputs: []inputInfo{
26159 {1, 1073741816},
26160 {0, 4611686019501129724},
26161 },
26162 outputs: []outputInfo{
26163 {0, 1071644664},
26164 },
26165 },
26166 },
26167 {
26168 name: "LoweredAtomicCas32",
26169 argLen: 4,
26170 resultNotInArgs: true,
26171 faultOnNilArg0: true,
26172 hasSideEffects: true,
26173 unsafePoint: true,
26174 reg: regInfo{
26175 inputs: []inputInfo{
26176 {1, 1073741816},
26177 {2, 1073741816},
26178 {0, 4611686019501129724},
26179 },
26180 outputs: []outputInfo{
26181 {0, 1071644664},
26182 },
26183 },
26184 },
26185 {
26186 name: "LoweredAtomicCas64",
26187 argLen: 4,
26188 resultNotInArgs: true,
26189 faultOnNilArg0: true,
26190 hasSideEffects: true,
26191 unsafePoint: true,
26192 reg: regInfo{
26193 inputs: []inputInfo{
26194 {1, 1073741816},
26195 {2, 1073741816},
26196 {0, 4611686019501129724},
26197 },
26198 outputs: []outputInfo{
26199 {0, 1071644664},
26200 },
26201 },
26202 },
26203 {
26204 name: "LoweredAtomicCas64Variant",
26205 argLen: 4,
26206 resultNotInArgs: true,
26207 faultOnNilArg0: true,
26208 hasSideEffects: true,
26209 unsafePoint: true,
26210 reg: regInfo{
26211 inputs: []inputInfo{
26212 {1, 1073741816},
26213 {2, 1073741816},
26214 {0, 4611686019501129724},
26215 },
26216 outputs: []outputInfo{
26217 {0, 1071644664},
26218 },
26219 },
26220 },
26221 {
26222 name: "LoweredAtomicCas32Variant",
26223 argLen: 4,
26224 resultNotInArgs: true,
26225 faultOnNilArg0: true,
26226 hasSideEffects: true,
26227 unsafePoint: true,
26228 reg: regInfo{
26229 inputs: []inputInfo{
26230 {1, 1073741816},
26231 {2, 1073741816},
26232 {0, 4611686019501129724},
26233 },
26234 outputs: []outputInfo{
26235 {0, 1071644664},
26236 },
26237 },
26238 },
26239 {
26240 name: "LoweredAtomicAnd32",
26241 argLen: 3,
26242 resultNotInArgs: true,
26243 faultOnNilArg0: true,
26244 hasSideEffects: true,
26245 asm: loong64.AAMANDDBW,
26246 reg: regInfo{
26247 inputs: []inputInfo{
26248 {1, 1073741816},
26249 {0, 4611686019501129724},
26250 },
26251 outputs: []outputInfo{
26252 {0, 1071644664},
26253 },
26254 },
26255 },
26256 {
26257 name: "LoweredAtomicOr32",
26258 argLen: 3,
26259 resultNotInArgs: true,
26260 faultOnNilArg0: true,
26261 hasSideEffects: true,
26262 asm: loong64.AAMORDBW,
26263 reg: regInfo{
26264 inputs: []inputInfo{
26265 {1, 1073741816},
26266 {0, 4611686019501129724},
26267 },
26268 outputs: []outputInfo{
26269 {0, 1071644664},
26270 },
26271 },
26272 },
26273 {
26274 name: "LoweredAtomicAnd32value",
26275 argLen: 3,
26276 resultNotInArgs: true,
26277 faultOnNilArg0: true,
26278 hasSideEffects: true,
26279 asm: loong64.AAMANDDBW,
26280 reg: regInfo{
26281 inputs: []inputInfo{
26282 {1, 1073741816},
26283 {0, 4611686019501129724},
26284 },
26285 outputs: []outputInfo{
26286 {0, 1071644664},
26287 },
26288 },
26289 },
26290 {
26291 name: "LoweredAtomicAnd64value",
26292 argLen: 3,
26293 resultNotInArgs: true,
26294 faultOnNilArg0: true,
26295 hasSideEffects: true,
26296 asm: loong64.AAMANDDBV,
26297 reg: regInfo{
26298 inputs: []inputInfo{
26299 {1, 1073741816},
26300 {0, 4611686019501129724},
26301 },
26302 outputs: []outputInfo{
26303 {0, 1071644664},
26304 },
26305 },
26306 },
26307 {
26308 name: "LoweredAtomicOr32value",
26309 argLen: 3,
26310 resultNotInArgs: true,
26311 faultOnNilArg0: true,
26312 hasSideEffects: true,
26313 asm: loong64.AAMORDBW,
26314 reg: regInfo{
26315 inputs: []inputInfo{
26316 {1, 1073741816},
26317 {0, 4611686019501129724},
26318 },
26319 outputs: []outputInfo{
26320 {0, 1071644664},
26321 },
26322 },
26323 },
26324 {
26325 name: "LoweredAtomicOr64value",
26326 argLen: 3,
26327 resultNotInArgs: true,
26328 faultOnNilArg0: true,
26329 hasSideEffects: true,
26330 asm: loong64.AAMORDBV,
26331 reg: regInfo{
26332 inputs: []inputInfo{
26333 {1, 1073741816},
26334 {0, 4611686019501129724},
26335 },
26336 outputs: []outputInfo{
26337 {0, 1071644664},
26338 },
26339 },
26340 },
26341 {
26342 name: "LoweredNilCheck",
26343 argLen: 2,
26344 nilCheck: true,
26345 faultOnNilArg0: true,
26346 reg: regInfo{
26347 inputs: []inputInfo{
26348 {0, 1073741816},
26349 },
26350 },
26351 },
26352 {
26353 name: "FPFlagTrue",
26354 argLen: 1,
26355 reg: regInfo{
26356 outputs: []outputInfo{
26357 {0, 1071644664},
26358 },
26359 },
26360 },
26361 {
26362 name: "FPFlagFalse",
26363 argLen: 1,
26364 reg: regInfo{
26365 outputs: []outputInfo{
26366 {0, 1071644664},
26367 },
26368 },
26369 },
26370 {
26371 name: "LoweredGetClosurePtr",
26372 argLen: 0,
26373 zeroWidth: true,
26374 reg: regInfo{
26375 outputs: []outputInfo{
26376 {0, 268435456},
26377 },
26378 },
26379 },
26380 {
26381 name: "LoweredGetCallerSP",
26382 argLen: 1,
26383 rematerializeable: true,
26384 reg: regInfo{
26385 outputs: []outputInfo{
26386 {0, 1071644664},
26387 },
26388 },
26389 },
26390 {
26391 name: "LoweredGetCallerPC",
26392 argLen: 0,
26393 rematerializeable: true,
26394 reg: regInfo{
26395 outputs: []outputInfo{
26396 {0, 1071644664},
26397 },
26398 },
26399 },
26400 {
26401 name: "LoweredWB",
26402 auxType: auxInt64,
26403 argLen: 1,
26404 clobberFlags: true,
26405 reg: regInfo{
26406 clobbers: 4611686017353646082,
26407 outputs: []outputInfo{
26408 {0, 268435456},
26409 },
26410 },
26411 },
26412 {
26413 name: "LoweredPubBarrier",
26414 argLen: 1,
26415 hasSideEffects: true,
26416 asm: loong64.ADBAR,
26417 reg: regInfo{},
26418 },
26419 {
26420 name: "LoweredPanicBoundsA",
26421 auxType: auxInt64,
26422 argLen: 3,
26423 call: true,
26424 reg: regInfo{
26425 inputs: []inputInfo{
26426 {0, 4194304},
26427 {1, 8388608},
26428 },
26429 },
26430 },
26431 {
26432 name: "LoweredPanicBoundsB",
26433 auxType: auxInt64,
26434 argLen: 3,
26435 call: true,
26436 reg: regInfo{
26437 inputs: []inputInfo{
26438 {0, 1048576},
26439 {1, 4194304},
26440 },
26441 },
26442 },
26443 {
26444 name: "LoweredPanicBoundsC",
26445 auxType: auxInt64,
26446 argLen: 3,
26447 call: true,
26448 reg: regInfo{
26449 inputs: []inputInfo{
26450 {0, 524288},
26451 {1, 1048576},
26452 },
26453 },
26454 },
26455
26456 {
26457 name: "ADD",
26458 argLen: 2,
26459 commutative: true,
26460 asm: mips.AADDU,
26461 reg: regInfo{
26462 inputs: []inputInfo{
26463 {0, 469762046},
26464 {1, 469762046},
26465 },
26466 outputs: []outputInfo{
26467 {0, 335544318},
26468 },
26469 },
26470 },
26471 {
26472 name: "ADDconst",
26473 auxType: auxInt32,
26474 argLen: 1,
26475 asm: mips.AADDU,
26476 reg: regInfo{
26477 inputs: []inputInfo{
26478 {0, 536870910},
26479 },
26480 outputs: []outputInfo{
26481 {0, 335544318},
26482 },
26483 },
26484 },
26485 {
26486 name: "SUB",
26487 argLen: 2,
26488 asm: mips.ASUBU,
26489 reg: regInfo{
26490 inputs: []inputInfo{
26491 {0, 469762046},
26492 {1, 469762046},
26493 },
26494 outputs: []outputInfo{
26495 {0, 335544318},
26496 },
26497 },
26498 },
26499 {
26500 name: "SUBconst",
26501 auxType: auxInt32,
26502 argLen: 1,
26503 asm: mips.ASUBU,
26504 reg: regInfo{
26505 inputs: []inputInfo{
26506 {0, 469762046},
26507 },
26508 outputs: []outputInfo{
26509 {0, 335544318},
26510 },
26511 },
26512 },
26513 {
26514 name: "MUL",
26515 argLen: 2,
26516 commutative: true,
26517 asm: mips.AMUL,
26518 reg: regInfo{
26519 inputs: []inputInfo{
26520 {0, 469762046},
26521 {1, 469762046},
26522 },
26523 clobbers: 105553116266496,
26524 outputs: []outputInfo{
26525 {0, 335544318},
26526 },
26527 },
26528 },
26529 {
26530 name: "MULT",
26531 argLen: 2,
26532 commutative: true,
26533 asm: mips.AMUL,
26534 reg: regInfo{
26535 inputs: []inputInfo{
26536 {0, 469762046},
26537 {1, 469762046},
26538 },
26539 outputs: []outputInfo{
26540 {0, 35184372088832},
26541 {1, 70368744177664},
26542 },
26543 },
26544 },
26545 {
26546 name: "MULTU",
26547 argLen: 2,
26548 commutative: true,
26549 asm: mips.AMULU,
26550 reg: regInfo{
26551 inputs: []inputInfo{
26552 {0, 469762046},
26553 {1, 469762046},
26554 },
26555 outputs: []outputInfo{
26556 {0, 35184372088832},
26557 {1, 70368744177664},
26558 },
26559 },
26560 },
26561 {
26562 name: "DIV",
26563 argLen: 2,
26564 asm: mips.ADIV,
26565 reg: regInfo{
26566 inputs: []inputInfo{
26567 {0, 469762046},
26568 {1, 469762046},
26569 },
26570 outputs: []outputInfo{
26571 {0, 35184372088832},
26572 {1, 70368744177664},
26573 },
26574 },
26575 },
26576 {
26577 name: "DIVU",
26578 argLen: 2,
26579 asm: mips.ADIVU,
26580 reg: regInfo{
26581 inputs: []inputInfo{
26582 {0, 469762046},
26583 {1, 469762046},
26584 },
26585 outputs: []outputInfo{
26586 {0, 35184372088832},
26587 {1, 70368744177664},
26588 },
26589 },
26590 },
26591 {
26592 name: "ADDF",
26593 argLen: 2,
26594 commutative: true,
26595 asm: mips.AADDF,
26596 reg: regInfo{
26597 inputs: []inputInfo{
26598 {0, 35183835217920},
26599 {1, 35183835217920},
26600 },
26601 outputs: []outputInfo{
26602 {0, 35183835217920},
26603 },
26604 },
26605 },
26606 {
26607 name: "ADDD",
26608 argLen: 2,
26609 commutative: true,
26610 asm: mips.AADDD,
26611 reg: regInfo{
26612 inputs: []inputInfo{
26613 {0, 35183835217920},
26614 {1, 35183835217920},
26615 },
26616 outputs: []outputInfo{
26617 {0, 35183835217920},
26618 },
26619 },
26620 },
26621 {
26622 name: "SUBF",
26623 argLen: 2,
26624 asm: mips.ASUBF,
26625 reg: regInfo{
26626 inputs: []inputInfo{
26627 {0, 35183835217920},
26628 {1, 35183835217920},
26629 },
26630 outputs: []outputInfo{
26631 {0, 35183835217920},
26632 },
26633 },
26634 },
26635 {
26636 name: "SUBD",
26637 argLen: 2,
26638 asm: mips.ASUBD,
26639 reg: regInfo{
26640 inputs: []inputInfo{
26641 {0, 35183835217920},
26642 {1, 35183835217920},
26643 },
26644 outputs: []outputInfo{
26645 {0, 35183835217920},
26646 },
26647 },
26648 },
26649 {
26650 name: "MULF",
26651 argLen: 2,
26652 commutative: true,
26653 asm: mips.AMULF,
26654 reg: regInfo{
26655 inputs: []inputInfo{
26656 {0, 35183835217920},
26657 {1, 35183835217920},
26658 },
26659 outputs: []outputInfo{
26660 {0, 35183835217920},
26661 },
26662 },
26663 },
26664 {
26665 name: "MULD",
26666 argLen: 2,
26667 commutative: true,
26668 asm: mips.AMULD,
26669 reg: regInfo{
26670 inputs: []inputInfo{
26671 {0, 35183835217920},
26672 {1, 35183835217920},
26673 },
26674 outputs: []outputInfo{
26675 {0, 35183835217920},
26676 },
26677 },
26678 },
26679 {
26680 name: "DIVF",
26681 argLen: 2,
26682 asm: mips.ADIVF,
26683 reg: regInfo{
26684 inputs: []inputInfo{
26685 {0, 35183835217920},
26686 {1, 35183835217920},
26687 },
26688 outputs: []outputInfo{
26689 {0, 35183835217920},
26690 },
26691 },
26692 },
26693 {
26694 name: "DIVD",
26695 argLen: 2,
26696 asm: mips.ADIVD,
26697 reg: regInfo{
26698 inputs: []inputInfo{
26699 {0, 35183835217920},
26700 {1, 35183835217920},
26701 },
26702 outputs: []outputInfo{
26703 {0, 35183835217920},
26704 },
26705 },
26706 },
26707 {
26708 name: "AND",
26709 argLen: 2,
26710 commutative: true,
26711 asm: mips.AAND,
26712 reg: regInfo{
26713 inputs: []inputInfo{
26714 {0, 469762046},
26715 {1, 469762046},
26716 },
26717 outputs: []outputInfo{
26718 {0, 335544318},
26719 },
26720 },
26721 },
26722 {
26723 name: "ANDconst",
26724 auxType: auxInt32,
26725 argLen: 1,
26726 asm: mips.AAND,
26727 reg: regInfo{
26728 inputs: []inputInfo{
26729 {0, 469762046},
26730 },
26731 outputs: []outputInfo{
26732 {0, 335544318},
26733 },
26734 },
26735 },
26736 {
26737 name: "OR",
26738 argLen: 2,
26739 commutative: true,
26740 asm: mips.AOR,
26741 reg: regInfo{
26742 inputs: []inputInfo{
26743 {0, 469762046},
26744 {1, 469762046},
26745 },
26746 outputs: []outputInfo{
26747 {0, 335544318},
26748 },
26749 },
26750 },
26751 {
26752 name: "ORconst",
26753 auxType: auxInt32,
26754 argLen: 1,
26755 asm: mips.AOR,
26756 reg: regInfo{
26757 inputs: []inputInfo{
26758 {0, 469762046},
26759 },
26760 outputs: []outputInfo{
26761 {0, 335544318},
26762 },
26763 },
26764 },
26765 {
26766 name: "XOR",
26767 argLen: 2,
26768 commutative: true,
26769 asm: mips.AXOR,
26770 reg: regInfo{
26771 inputs: []inputInfo{
26772 {0, 469762046},
26773 {1, 469762046},
26774 },
26775 outputs: []outputInfo{
26776 {0, 335544318},
26777 },
26778 },
26779 },
26780 {
26781 name: "XORconst",
26782 auxType: auxInt32,
26783 argLen: 1,
26784 asm: mips.AXOR,
26785 reg: regInfo{
26786 inputs: []inputInfo{
26787 {0, 469762046},
26788 },
26789 outputs: []outputInfo{
26790 {0, 335544318},
26791 },
26792 },
26793 },
26794 {
26795 name: "NOR",
26796 argLen: 2,
26797 commutative: true,
26798 asm: mips.ANOR,
26799 reg: regInfo{
26800 inputs: []inputInfo{
26801 {0, 469762046},
26802 {1, 469762046},
26803 },
26804 outputs: []outputInfo{
26805 {0, 335544318},
26806 },
26807 },
26808 },
26809 {
26810 name: "NORconst",
26811 auxType: auxInt32,
26812 argLen: 1,
26813 asm: mips.ANOR,
26814 reg: regInfo{
26815 inputs: []inputInfo{
26816 {0, 469762046},
26817 },
26818 outputs: []outputInfo{
26819 {0, 335544318},
26820 },
26821 },
26822 },
26823 {
26824 name: "NEG",
26825 argLen: 1,
26826 reg: regInfo{
26827 inputs: []inputInfo{
26828 {0, 469762046},
26829 },
26830 outputs: []outputInfo{
26831 {0, 335544318},
26832 },
26833 },
26834 },
26835 {
26836 name: "NEGF",
26837 argLen: 1,
26838 asm: mips.ANEGF,
26839 reg: regInfo{
26840 inputs: []inputInfo{
26841 {0, 35183835217920},
26842 },
26843 outputs: []outputInfo{
26844 {0, 35183835217920},
26845 },
26846 },
26847 },
26848 {
26849 name: "NEGD",
26850 argLen: 1,
26851 asm: mips.ANEGD,
26852 reg: regInfo{
26853 inputs: []inputInfo{
26854 {0, 35183835217920},
26855 },
26856 outputs: []outputInfo{
26857 {0, 35183835217920},
26858 },
26859 },
26860 },
26861 {
26862 name: "ABSD",
26863 argLen: 1,
26864 asm: mips.AABSD,
26865 reg: regInfo{
26866 inputs: []inputInfo{
26867 {0, 35183835217920},
26868 },
26869 outputs: []outputInfo{
26870 {0, 35183835217920},
26871 },
26872 },
26873 },
26874 {
26875 name: "SQRTD",
26876 argLen: 1,
26877 asm: mips.ASQRTD,
26878 reg: regInfo{
26879 inputs: []inputInfo{
26880 {0, 35183835217920},
26881 },
26882 outputs: []outputInfo{
26883 {0, 35183835217920},
26884 },
26885 },
26886 },
26887 {
26888 name: "SQRTF",
26889 argLen: 1,
26890 asm: mips.ASQRTF,
26891 reg: regInfo{
26892 inputs: []inputInfo{
26893 {0, 35183835217920},
26894 },
26895 outputs: []outputInfo{
26896 {0, 35183835217920},
26897 },
26898 },
26899 },
26900 {
26901 name: "SLL",
26902 argLen: 2,
26903 asm: mips.ASLL,
26904 reg: regInfo{
26905 inputs: []inputInfo{
26906 {0, 469762046},
26907 {1, 469762046},
26908 },
26909 outputs: []outputInfo{
26910 {0, 335544318},
26911 },
26912 },
26913 },
26914 {
26915 name: "SLLconst",
26916 auxType: auxInt32,
26917 argLen: 1,
26918 asm: mips.ASLL,
26919 reg: regInfo{
26920 inputs: []inputInfo{
26921 {0, 469762046},
26922 },
26923 outputs: []outputInfo{
26924 {0, 335544318},
26925 },
26926 },
26927 },
26928 {
26929 name: "SRL",
26930 argLen: 2,
26931 asm: mips.ASRL,
26932 reg: regInfo{
26933 inputs: []inputInfo{
26934 {0, 469762046},
26935 {1, 469762046},
26936 },
26937 outputs: []outputInfo{
26938 {0, 335544318},
26939 },
26940 },
26941 },
26942 {
26943 name: "SRLconst",
26944 auxType: auxInt32,
26945 argLen: 1,
26946 asm: mips.ASRL,
26947 reg: regInfo{
26948 inputs: []inputInfo{
26949 {0, 469762046},
26950 },
26951 outputs: []outputInfo{
26952 {0, 335544318},
26953 },
26954 },
26955 },
26956 {
26957 name: "SRA",
26958 argLen: 2,
26959 asm: mips.ASRA,
26960 reg: regInfo{
26961 inputs: []inputInfo{
26962 {0, 469762046},
26963 {1, 469762046},
26964 },
26965 outputs: []outputInfo{
26966 {0, 335544318},
26967 },
26968 },
26969 },
26970 {
26971 name: "SRAconst",
26972 auxType: auxInt32,
26973 argLen: 1,
26974 asm: mips.ASRA,
26975 reg: regInfo{
26976 inputs: []inputInfo{
26977 {0, 469762046},
26978 },
26979 outputs: []outputInfo{
26980 {0, 335544318},
26981 },
26982 },
26983 },
26984 {
26985 name: "CLZ",
26986 argLen: 1,
26987 asm: mips.ACLZ,
26988 reg: regInfo{
26989 inputs: []inputInfo{
26990 {0, 469762046},
26991 },
26992 outputs: []outputInfo{
26993 {0, 335544318},
26994 },
26995 },
26996 },
26997 {
26998 name: "SGT",
26999 argLen: 2,
27000 asm: mips.ASGT,
27001 reg: regInfo{
27002 inputs: []inputInfo{
27003 {0, 469762046},
27004 {1, 469762046},
27005 },
27006 outputs: []outputInfo{
27007 {0, 335544318},
27008 },
27009 },
27010 },
27011 {
27012 name: "SGTconst",
27013 auxType: auxInt32,
27014 argLen: 1,
27015 asm: mips.ASGT,
27016 reg: regInfo{
27017 inputs: []inputInfo{
27018 {0, 469762046},
27019 },
27020 outputs: []outputInfo{
27021 {0, 335544318},
27022 },
27023 },
27024 },
27025 {
27026 name: "SGTzero",
27027 argLen: 1,
27028 asm: mips.ASGT,
27029 reg: regInfo{
27030 inputs: []inputInfo{
27031 {0, 469762046},
27032 },
27033 outputs: []outputInfo{
27034 {0, 335544318},
27035 },
27036 },
27037 },
27038 {
27039 name: "SGTU",
27040 argLen: 2,
27041 asm: mips.ASGTU,
27042 reg: regInfo{
27043 inputs: []inputInfo{
27044 {0, 469762046},
27045 {1, 469762046},
27046 },
27047 outputs: []outputInfo{
27048 {0, 335544318},
27049 },
27050 },
27051 },
27052 {
27053 name: "SGTUconst",
27054 auxType: auxInt32,
27055 argLen: 1,
27056 asm: mips.ASGTU,
27057 reg: regInfo{
27058 inputs: []inputInfo{
27059 {0, 469762046},
27060 },
27061 outputs: []outputInfo{
27062 {0, 335544318},
27063 },
27064 },
27065 },
27066 {
27067 name: "SGTUzero",
27068 argLen: 1,
27069 asm: mips.ASGTU,
27070 reg: regInfo{
27071 inputs: []inputInfo{
27072 {0, 469762046},
27073 },
27074 outputs: []outputInfo{
27075 {0, 335544318},
27076 },
27077 },
27078 },
27079 {
27080 name: "CMPEQF",
27081 argLen: 2,
27082 asm: mips.ACMPEQF,
27083 reg: regInfo{
27084 inputs: []inputInfo{
27085 {0, 35183835217920},
27086 {1, 35183835217920},
27087 },
27088 },
27089 },
27090 {
27091 name: "CMPEQD",
27092 argLen: 2,
27093 asm: mips.ACMPEQD,
27094 reg: regInfo{
27095 inputs: []inputInfo{
27096 {0, 35183835217920},
27097 {1, 35183835217920},
27098 },
27099 },
27100 },
27101 {
27102 name: "CMPGEF",
27103 argLen: 2,
27104 asm: mips.ACMPGEF,
27105 reg: regInfo{
27106 inputs: []inputInfo{
27107 {0, 35183835217920},
27108 {1, 35183835217920},
27109 },
27110 },
27111 },
27112 {
27113 name: "CMPGED",
27114 argLen: 2,
27115 asm: mips.ACMPGED,
27116 reg: regInfo{
27117 inputs: []inputInfo{
27118 {0, 35183835217920},
27119 {1, 35183835217920},
27120 },
27121 },
27122 },
27123 {
27124 name: "CMPGTF",
27125 argLen: 2,
27126 asm: mips.ACMPGTF,
27127 reg: regInfo{
27128 inputs: []inputInfo{
27129 {0, 35183835217920},
27130 {1, 35183835217920},
27131 },
27132 },
27133 },
27134 {
27135 name: "CMPGTD",
27136 argLen: 2,
27137 asm: mips.ACMPGTD,
27138 reg: regInfo{
27139 inputs: []inputInfo{
27140 {0, 35183835217920},
27141 {1, 35183835217920},
27142 },
27143 },
27144 },
27145 {
27146 name: "MOVWconst",
27147 auxType: auxInt32,
27148 argLen: 0,
27149 rematerializeable: true,
27150 asm: mips.AMOVW,
27151 reg: regInfo{
27152 outputs: []outputInfo{
27153 {0, 335544318},
27154 },
27155 },
27156 },
27157 {
27158 name: "MOVFconst",
27159 auxType: auxFloat32,
27160 argLen: 0,
27161 rematerializeable: true,
27162 asm: mips.AMOVF,
27163 reg: regInfo{
27164 outputs: []outputInfo{
27165 {0, 35183835217920},
27166 },
27167 },
27168 },
27169 {
27170 name: "MOVDconst",
27171 auxType: auxFloat64,
27172 argLen: 0,
27173 rematerializeable: true,
27174 asm: mips.AMOVD,
27175 reg: regInfo{
27176 outputs: []outputInfo{
27177 {0, 35183835217920},
27178 },
27179 },
27180 },
27181 {
27182 name: "MOVWaddr",
27183 auxType: auxSymOff,
27184 argLen: 1,
27185 rematerializeable: true,
27186 symEffect: SymAddr,
27187 asm: mips.AMOVW,
27188 reg: regInfo{
27189 inputs: []inputInfo{
27190 {0, 140737555464192},
27191 },
27192 outputs: []outputInfo{
27193 {0, 335544318},
27194 },
27195 },
27196 },
27197 {
27198 name: "MOVBload",
27199 auxType: auxSymOff,
27200 argLen: 2,
27201 faultOnNilArg0: true,
27202 symEffect: SymRead,
27203 asm: mips.AMOVB,
27204 reg: regInfo{
27205 inputs: []inputInfo{
27206 {0, 140738025226238},
27207 },
27208 outputs: []outputInfo{
27209 {0, 335544318},
27210 },
27211 },
27212 },
27213 {
27214 name: "MOVBUload",
27215 auxType: auxSymOff,
27216 argLen: 2,
27217 faultOnNilArg0: true,
27218 symEffect: SymRead,
27219 asm: mips.AMOVBU,
27220 reg: regInfo{
27221 inputs: []inputInfo{
27222 {0, 140738025226238},
27223 },
27224 outputs: []outputInfo{
27225 {0, 335544318},
27226 },
27227 },
27228 },
27229 {
27230 name: "MOVHload",
27231 auxType: auxSymOff,
27232 argLen: 2,
27233 faultOnNilArg0: true,
27234 symEffect: SymRead,
27235 asm: mips.AMOVH,
27236 reg: regInfo{
27237 inputs: []inputInfo{
27238 {0, 140738025226238},
27239 },
27240 outputs: []outputInfo{
27241 {0, 335544318},
27242 },
27243 },
27244 },
27245 {
27246 name: "MOVHUload",
27247 auxType: auxSymOff,
27248 argLen: 2,
27249 faultOnNilArg0: true,
27250 symEffect: SymRead,
27251 asm: mips.AMOVHU,
27252 reg: regInfo{
27253 inputs: []inputInfo{
27254 {0, 140738025226238},
27255 },
27256 outputs: []outputInfo{
27257 {0, 335544318},
27258 },
27259 },
27260 },
27261 {
27262 name: "MOVWload",
27263 auxType: auxSymOff,
27264 argLen: 2,
27265 faultOnNilArg0: true,
27266 symEffect: SymRead,
27267 asm: mips.AMOVW,
27268 reg: regInfo{
27269 inputs: []inputInfo{
27270 {0, 140738025226238},
27271 },
27272 outputs: []outputInfo{
27273 {0, 335544318},
27274 },
27275 },
27276 },
27277 {
27278 name: "MOVFload",
27279 auxType: auxSymOff,
27280 argLen: 2,
27281 faultOnNilArg0: true,
27282 symEffect: SymRead,
27283 asm: mips.AMOVF,
27284 reg: regInfo{
27285 inputs: []inputInfo{
27286 {0, 140738025226238},
27287 },
27288 outputs: []outputInfo{
27289 {0, 35183835217920},
27290 },
27291 },
27292 },
27293 {
27294 name: "MOVDload",
27295 auxType: auxSymOff,
27296 argLen: 2,
27297 faultOnNilArg0: true,
27298 symEffect: SymRead,
27299 asm: mips.AMOVD,
27300 reg: regInfo{
27301 inputs: []inputInfo{
27302 {0, 140738025226238},
27303 },
27304 outputs: []outputInfo{
27305 {0, 35183835217920},
27306 },
27307 },
27308 },
27309 {
27310 name: "MOVBstore",
27311 auxType: auxSymOff,
27312 argLen: 3,
27313 faultOnNilArg0: true,
27314 symEffect: SymWrite,
27315 asm: mips.AMOVB,
27316 reg: regInfo{
27317 inputs: []inputInfo{
27318 {1, 469762046},
27319 {0, 140738025226238},
27320 },
27321 },
27322 },
27323 {
27324 name: "MOVHstore",
27325 auxType: auxSymOff,
27326 argLen: 3,
27327 faultOnNilArg0: true,
27328 symEffect: SymWrite,
27329 asm: mips.AMOVH,
27330 reg: regInfo{
27331 inputs: []inputInfo{
27332 {1, 469762046},
27333 {0, 140738025226238},
27334 },
27335 },
27336 },
27337 {
27338 name: "MOVWstore",
27339 auxType: auxSymOff,
27340 argLen: 3,
27341 faultOnNilArg0: true,
27342 symEffect: SymWrite,
27343 asm: mips.AMOVW,
27344 reg: regInfo{
27345 inputs: []inputInfo{
27346 {1, 469762046},
27347 {0, 140738025226238},
27348 },
27349 },
27350 },
27351 {
27352 name: "MOVFstore",
27353 auxType: auxSymOff,
27354 argLen: 3,
27355 faultOnNilArg0: true,
27356 symEffect: SymWrite,
27357 asm: mips.AMOVF,
27358 reg: regInfo{
27359 inputs: []inputInfo{
27360 {1, 35183835217920},
27361 {0, 140738025226238},
27362 },
27363 },
27364 },
27365 {
27366 name: "MOVDstore",
27367 auxType: auxSymOff,
27368 argLen: 3,
27369 faultOnNilArg0: true,
27370 symEffect: SymWrite,
27371 asm: mips.AMOVD,
27372 reg: regInfo{
27373 inputs: []inputInfo{
27374 {1, 35183835217920},
27375 {0, 140738025226238},
27376 },
27377 },
27378 },
27379 {
27380 name: "MOVBstorezero",
27381 auxType: auxSymOff,
27382 argLen: 2,
27383 faultOnNilArg0: true,
27384 symEffect: SymWrite,
27385 asm: mips.AMOVB,
27386 reg: regInfo{
27387 inputs: []inputInfo{
27388 {0, 140738025226238},
27389 },
27390 },
27391 },
27392 {
27393 name: "MOVHstorezero",
27394 auxType: auxSymOff,
27395 argLen: 2,
27396 faultOnNilArg0: true,
27397 symEffect: SymWrite,
27398 asm: mips.AMOVH,
27399 reg: regInfo{
27400 inputs: []inputInfo{
27401 {0, 140738025226238},
27402 },
27403 },
27404 },
27405 {
27406 name: "MOVWstorezero",
27407 auxType: auxSymOff,
27408 argLen: 2,
27409 faultOnNilArg0: true,
27410 symEffect: SymWrite,
27411 asm: mips.AMOVW,
27412 reg: regInfo{
27413 inputs: []inputInfo{
27414 {0, 140738025226238},
27415 },
27416 },
27417 },
27418 {
27419 name: "MOVWfpgp",
27420 argLen: 1,
27421 asm: mips.AMOVW,
27422 reg: regInfo{
27423 inputs: []inputInfo{
27424 {0, 35183835217920},
27425 },
27426 outputs: []outputInfo{
27427 {0, 335544318},
27428 },
27429 },
27430 },
27431 {
27432 name: "MOVWgpfp",
27433 argLen: 1,
27434 asm: mips.AMOVW,
27435 reg: regInfo{
27436 inputs: []inputInfo{
27437 {0, 335544318},
27438 },
27439 outputs: []outputInfo{
27440 {0, 35183835217920},
27441 },
27442 },
27443 },
27444 {
27445 name: "MOVBreg",
27446 argLen: 1,
27447 asm: mips.AMOVB,
27448 reg: regInfo{
27449 inputs: []inputInfo{
27450 {0, 469762046},
27451 },
27452 outputs: []outputInfo{
27453 {0, 335544318},
27454 },
27455 },
27456 },
27457 {
27458 name: "MOVBUreg",
27459 argLen: 1,
27460 asm: mips.AMOVBU,
27461 reg: regInfo{
27462 inputs: []inputInfo{
27463 {0, 469762046},
27464 },
27465 outputs: []outputInfo{
27466 {0, 335544318},
27467 },
27468 },
27469 },
27470 {
27471 name: "MOVHreg",
27472 argLen: 1,
27473 asm: mips.AMOVH,
27474 reg: regInfo{
27475 inputs: []inputInfo{
27476 {0, 469762046},
27477 },
27478 outputs: []outputInfo{
27479 {0, 335544318},
27480 },
27481 },
27482 },
27483 {
27484 name: "MOVHUreg",
27485 argLen: 1,
27486 asm: mips.AMOVHU,
27487 reg: regInfo{
27488 inputs: []inputInfo{
27489 {0, 469762046},
27490 },
27491 outputs: []outputInfo{
27492 {0, 335544318},
27493 },
27494 },
27495 },
27496 {
27497 name: "MOVWreg",
27498 argLen: 1,
27499 asm: mips.AMOVW,
27500 reg: regInfo{
27501 inputs: []inputInfo{
27502 {0, 469762046},
27503 },
27504 outputs: []outputInfo{
27505 {0, 335544318},
27506 },
27507 },
27508 },
27509 {
27510 name: "MOVWnop",
27511 argLen: 1,
27512 resultInArg0: true,
27513 reg: regInfo{
27514 inputs: []inputInfo{
27515 {0, 335544318},
27516 },
27517 outputs: []outputInfo{
27518 {0, 335544318},
27519 },
27520 },
27521 },
27522 {
27523 name: "CMOVZ",
27524 argLen: 3,
27525 resultInArg0: true,
27526 asm: mips.ACMOVZ,
27527 reg: regInfo{
27528 inputs: []inputInfo{
27529 {0, 335544318},
27530 {1, 335544318},
27531 {2, 335544318},
27532 },
27533 outputs: []outputInfo{
27534 {0, 335544318},
27535 },
27536 },
27537 },
27538 {
27539 name: "CMOVZzero",
27540 argLen: 2,
27541 resultInArg0: true,
27542 asm: mips.ACMOVZ,
27543 reg: regInfo{
27544 inputs: []inputInfo{
27545 {0, 335544318},
27546 {1, 469762046},
27547 },
27548 outputs: []outputInfo{
27549 {0, 335544318},
27550 },
27551 },
27552 },
27553 {
27554 name: "MOVWF",
27555 argLen: 1,
27556 asm: mips.AMOVWF,
27557 reg: regInfo{
27558 inputs: []inputInfo{
27559 {0, 35183835217920},
27560 },
27561 outputs: []outputInfo{
27562 {0, 35183835217920},
27563 },
27564 },
27565 },
27566 {
27567 name: "MOVWD",
27568 argLen: 1,
27569 asm: mips.AMOVWD,
27570 reg: regInfo{
27571 inputs: []inputInfo{
27572 {0, 35183835217920},
27573 },
27574 outputs: []outputInfo{
27575 {0, 35183835217920},
27576 },
27577 },
27578 },
27579 {
27580 name: "TRUNCFW",
27581 argLen: 1,
27582 asm: mips.ATRUNCFW,
27583 reg: regInfo{
27584 inputs: []inputInfo{
27585 {0, 35183835217920},
27586 },
27587 outputs: []outputInfo{
27588 {0, 35183835217920},
27589 },
27590 },
27591 },
27592 {
27593 name: "TRUNCDW",
27594 argLen: 1,
27595 asm: mips.ATRUNCDW,
27596 reg: regInfo{
27597 inputs: []inputInfo{
27598 {0, 35183835217920},
27599 },
27600 outputs: []outputInfo{
27601 {0, 35183835217920},
27602 },
27603 },
27604 },
27605 {
27606 name: "MOVFD",
27607 argLen: 1,
27608 asm: mips.AMOVFD,
27609 reg: regInfo{
27610 inputs: []inputInfo{
27611 {0, 35183835217920},
27612 },
27613 outputs: []outputInfo{
27614 {0, 35183835217920},
27615 },
27616 },
27617 },
27618 {
27619 name: "MOVDF",
27620 argLen: 1,
27621 asm: mips.AMOVDF,
27622 reg: regInfo{
27623 inputs: []inputInfo{
27624 {0, 35183835217920},
27625 },
27626 outputs: []outputInfo{
27627 {0, 35183835217920},
27628 },
27629 },
27630 },
27631 {
27632 name: "CALLstatic",
27633 auxType: auxCallOff,
27634 argLen: 1,
27635 clobberFlags: true,
27636 call: true,
27637 reg: regInfo{
27638 clobbers: 140737421246462,
27639 },
27640 },
27641 {
27642 name: "CALLtail",
27643 auxType: auxCallOff,
27644 argLen: 1,
27645 clobberFlags: true,
27646 call: true,
27647 tailCall: true,
27648 reg: regInfo{
27649 clobbers: 140737421246462,
27650 },
27651 },
27652 {
27653 name: "CALLclosure",
27654 auxType: auxCallOff,
27655 argLen: 3,
27656 clobberFlags: true,
27657 call: true,
27658 reg: regInfo{
27659 inputs: []inputInfo{
27660 {1, 4194304},
27661 {0, 402653182},
27662 },
27663 clobbers: 140737421246462,
27664 },
27665 },
27666 {
27667 name: "CALLinter",
27668 auxType: auxCallOff,
27669 argLen: 2,
27670 clobberFlags: true,
27671 call: true,
27672 reg: regInfo{
27673 inputs: []inputInfo{
27674 {0, 335544318},
27675 },
27676 clobbers: 140737421246462,
27677 },
27678 },
27679 {
27680 name: "LoweredAtomicLoad8",
27681 argLen: 2,
27682 faultOnNilArg0: true,
27683 reg: regInfo{
27684 inputs: []inputInfo{
27685 {0, 140738025226238},
27686 },
27687 outputs: []outputInfo{
27688 {0, 335544318},
27689 },
27690 },
27691 },
27692 {
27693 name: "LoweredAtomicLoad32",
27694 argLen: 2,
27695 faultOnNilArg0: true,
27696 reg: regInfo{
27697 inputs: []inputInfo{
27698 {0, 140738025226238},
27699 },
27700 outputs: []outputInfo{
27701 {0, 335544318},
27702 },
27703 },
27704 },
27705 {
27706 name: "LoweredAtomicStore8",
27707 argLen: 3,
27708 faultOnNilArg0: true,
27709 hasSideEffects: true,
27710 reg: regInfo{
27711 inputs: []inputInfo{
27712 {1, 469762046},
27713 {0, 140738025226238},
27714 },
27715 },
27716 },
27717 {
27718 name: "LoweredAtomicStore32",
27719 argLen: 3,
27720 faultOnNilArg0: true,
27721 hasSideEffects: true,
27722 reg: regInfo{
27723 inputs: []inputInfo{
27724 {1, 469762046},
27725 {0, 140738025226238},
27726 },
27727 },
27728 },
27729 {
27730 name: "LoweredAtomicStorezero",
27731 argLen: 2,
27732 faultOnNilArg0: true,
27733 hasSideEffects: true,
27734 reg: regInfo{
27735 inputs: []inputInfo{
27736 {0, 140738025226238},
27737 },
27738 },
27739 },
27740 {
27741 name: "LoweredAtomicExchange",
27742 argLen: 3,
27743 resultNotInArgs: true,
27744 faultOnNilArg0: true,
27745 hasSideEffects: true,
27746 unsafePoint: true,
27747 reg: regInfo{
27748 inputs: []inputInfo{
27749 {1, 469762046},
27750 {0, 140738025226238},
27751 },
27752 outputs: []outputInfo{
27753 {0, 335544318},
27754 },
27755 },
27756 },
27757 {
27758 name: "LoweredAtomicAdd",
27759 argLen: 3,
27760 resultNotInArgs: true,
27761 faultOnNilArg0: true,
27762 hasSideEffects: true,
27763 unsafePoint: true,
27764 reg: regInfo{
27765 inputs: []inputInfo{
27766 {1, 469762046},
27767 {0, 140738025226238},
27768 },
27769 outputs: []outputInfo{
27770 {0, 335544318},
27771 },
27772 },
27773 },
27774 {
27775 name: "LoweredAtomicAddconst",
27776 auxType: auxInt32,
27777 argLen: 2,
27778 resultNotInArgs: true,
27779 faultOnNilArg0: true,
27780 hasSideEffects: true,
27781 unsafePoint: true,
27782 reg: regInfo{
27783 inputs: []inputInfo{
27784 {0, 140738025226238},
27785 },
27786 outputs: []outputInfo{
27787 {0, 335544318},
27788 },
27789 },
27790 },
27791 {
27792 name: "LoweredAtomicCas",
27793 argLen: 4,
27794 resultNotInArgs: true,
27795 faultOnNilArg0: true,
27796 hasSideEffects: true,
27797 unsafePoint: true,
27798 reg: regInfo{
27799 inputs: []inputInfo{
27800 {1, 469762046},
27801 {2, 469762046},
27802 {0, 140738025226238},
27803 },
27804 outputs: []outputInfo{
27805 {0, 335544318},
27806 },
27807 },
27808 },
27809 {
27810 name: "LoweredAtomicAnd",
27811 argLen: 3,
27812 faultOnNilArg0: true,
27813 hasSideEffects: true,
27814 unsafePoint: true,
27815 asm: mips.AAND,
27816 reg: regInfo{
27817 inputs: []inputInfo{
27818 {1, 469762046},
27819 {0, 140738025226238},
27820 },
27821 },
27822 },
27823 {
27824 name: "LoweredAtomicOr",
27825 argLen: 3,
27826 faultOnNilArg0: true,
27827 hasSideEffects: true,
27828 unsafePoint: true,
27829 asm: mips.AOR,
27830 reg: regInfo{
27831 inputs: []inputInfo{
27832 {1, 469762046},
27833 {0, 140738025226238},
27834 },
27835 },
27836 },
27837 {
27838 name: "LoweredZero",
27839 auxType: auxInt32,
27840 argLen: 3,
27841 faultOnNilArg0: true,
27842 reg: regInfo{
27843 inputs: []inputInfo{
27844 {0, 2},
27845 {1, 335544318},
27846 },
27847 clobbers: 2,
27848 },
27849 },
27850 {
27851 name: "LoweredMove",
27852 auxType: auxInt32,
27853 argLen: 4,
27854 faultOnNilArg0: true,
27855 faultOnNilArg1: true,
27856 reg: regInfo{
27857 inputs: []inputInfo{
27858 {0, 4},
27859 {1, 2},
27860 {2, 335544318},
27861 },
27862 clobbers: 6,
27863 },
27864 },
27865 {
27866 name: "LoweredNilCheck",
27867 argLen: 2,
27868 nilCheck: true,
27869 faultOnNilArg0: true,
27870 reg: regInfo{
27871 inputs: []inputInfo{
27872 {0, 469762046},
27873 },
27874 },
27875 },
27876 {
27877 name: "FPFlagTrue",
27878 argLen: 1,
27879 reg: regInfo{
27880 outputs: []outputInfo{
27881 {0, 335544318},
27882 },
27883 },
27884 },
27885 {
27886 name: "FPFlagFalse",
27887 argLen: 1,
27888 reg: regInfo{
27889 outputs: []outputInfo{
27890 {0, 335544318},
27891 },
27892 },
27893 },
27894 {
27895 name: "LoweredGetClosurePtr",
27896 argLen: 0,
27897 zeroWidth: true,
27898 reg: regInfo{
27899 outputs: []outputInfo{
27900 {0, 4194304},
27901 },
27902 },
27903 },
27904 {
27905 name: "LoweredGetCallerSP",
27906 argLen: 1,
27907 rematerializeable: true,
27908 reg: regInfo{
27909 outputs: []outputInfo{
27910 {0, 335544318},
27911 },
27912 },
27913 },
27914 {
27915 name: "LoweredGetCallerPC",
27916 argLen: 0,
27917 rematerializeable: true,
27918 reg: regInfo{
27919 outputs: []outputInfo{
27920 {0, 335544318},
27921 },
27922 },
27923 },
27924 {
27925 name: "LoweredWB",
27926 auxType: auxInt64,
27927 argLen: 1,
27928 clobberFlags: true,
27929 reg: regInfo{
27930 clobbers: 140737219919872,
27931 outputs: []outputInfo{
27932 {0, 16777216},
27933 },
27934 },
27935 },
27936 {
27937 name: "LoweredPanicBoundsA",
27938 auxType: auxInt64,
27939 argLen: 3,
27940 call: true,
27941 reg: regInfo{
27942 inputs: []inputInfo{
27943 {0, 8},
27944 {1, 16},
27945 },
27946 },
27947 },
27948 {
27949 name: "LoweredPanicBoundsB",
27950 auxType: auxInt64,
27951 argLen: 3,
27952 call: true,
27953 reg: regInfo{
27954 inputs: []inputInfo{
27955 {0, 4},
27956 {1, 8},
27957 },
27958 },
27959 },
27960 {
27961 name: "LoweredPanicBoundsC",
27962 auxType: auxInt64,
27963 argLen: 3,
27964 call: true,
27965 reg: regInfo{
27966 inputs: []inputInfo{
27967 {0, 2},
27968 {1, 4},
27969 },
27970 },
27971 },
27972 {
27973 name: "LoweredPanicExtendA",
27974 auxType: auxInt64,
27975 argLen: 4,
27976 call: true,
27977 reg: regInfo{
27978 inputs: []inputInfo{
27979 {0, 32},
27980 {1, 8},
27981 {2, 16},
27982 },
27983 },
27984 },
27985 {
27986 name: "LoweredPanicExtendB",
27987 auxType: auxInt64,
27988 argLen: 4,
27989 call: true,
27990 reg: regInfo{
27991 inputs: []inputInfo{
27992 {0, 32},
27993 {1, 4},
27994 {2, 8},
27995 },
27996 },
27997 },
27998 {
27999 name: "LoweredPanicExtendC",
28000 auxType: auxInt64,
28001 argLen: 4,
28002 call: true,
28003 reg: regInfo{
28004 inputs: []inputInfo{
28005 {0, 32},
28006 {1, 2},
28007 {2, 4},
28008 },
28009 },
28010 },
28011
28012 {
28013 name: "ADDV",
28014 argLen: 2,
28015 commutative: true,
28016 asm: mips.AADDVU,
28017 reg: regInfo{
28018 inputs: []inputInfo{
28019 {0, 234881022},
28020 {1, 234881022},
28021 },
28022 outputs: []outputInfo{
28023 {0, 167772158},
28024 },
28025 },
28026 },
28027 {
28028 name: "ADDVconst",
28029 auxType: auxInt64,
28030 argLen: 1,
28031 asm: mips.AADDVU,
28032 reg: regInfo{
28033 inputs: []inputInfo{
28034 {0, 268435454},
28035 },
28036 outputs: []outputInfo{
28037 {0, 167772158},
28038 },
28039 },
28040 },
28041 {
28042 name: "SUBV",
28043 argLen: 2,
28044 asm: mips.ASUBVU,
28045 reg: regInfo{
28046 inputs: []inputInfo{
28047 {0, 234881022},
28048 {1, 234881022},
28049 },
28050 outputs: []outputInfo{
28051 {0, 167772158},
28052 },
28053 },
28054 },
28055 {
28056 name: "SUBVconst",
28057 auxType: auxInt64,
28058 argLen: 1,
28059 asm: mips.ASUBVU,
28060 reg: regInfo{
28061 inputs: []inputInfo{
28062 {0, 234881022},
28063 },
28064 outputs: []outputInfo{
28065 {0, 167772158},
28066 },
28067 },
28068 },
28069 {
28070 name: "MULV",
28071 argLen: 2,
28072 commutative: true,
28073 asm: mips.AMULV,
28074 reg: regInfo{
28075 inputs: []inputInfo{
28076 {0, 234881022},
28077 {1, 234881022},
28078 },
28079 outputs: []outputInfo{
28080 {0, 1152921504606846976},
28081 {1, 2305843009213693952},
28082 },
28083 },
28084 },
28085 {
28086 name: "MULVU",
28087 argLen: 2,
28088 commutative: true,
28089 asm: mips.AMULVU,
28090 reg: regInfo{
28091 inputs: []inputInfo{
28092 {0, 234881022},
28093 {1, 234881022},
28094 },
28095 outputs: []outputInfo{
28096 {0, 1152921504606846976},
28097 {1, 2305843009213693952},
28098 },
28099 },
28100 },
28101 {
28102 name: "DIVV",
28103 argLen: 2,
28104 asm: mips.ADIVV,
28105 reg: regInfo{
28106 inputs: []inputInfo{
28107 {0, 234881022},
28108 {1, 234881022},
28109 },
28110 outputs: []outputInfo{
28111 {0, 1152921504606846976},
28112 {1, 2305843009213693952},
28113 },
28114 },
28115 },
28116 {
28117 name: "DIVVU",
28118 argLen: 2,
28119 asm: mips.ADIVVU,
28120 reg: regInfo{
28121 inputs: []inputInfo{
28122 {0, 234881022},
28123 {1, 234881022},
28124 },
28125 outputs: []outputInfo{
28126 {0, 1152921504606846976},
28127 {1, 2305843009213693952},
28128 },
28129 },
28130 },
28131 {
28132 name: "ADDF",
28133 argLen: 2,
28134 commutative: true,
28135 asm: mips.AADDF,
28136 reg: regInfo{
28137 inputs: []inputInfo{
28138 {0, 1152921504338411520},
28139 {1, 1152921504338411520},
28140 },
28141 outputs: []outputInfo{
28142 {0, 1152921504338411520},
28143 },
28144 },
28145 },
28146 {
28147 name: "ADDD",
28148 argLen: 2,
28149 commutative: true,
28150 asm: mips.AADDD,
28151 reg: regInfo{
28152 inputs: []inputInfo{
28153 {0, 1152921504338411520},
28154 {1, 1152921504338411520},
28155 },
28156 outputs: []outputInfo{
28157 {0, 1152921504338411520},
28158 },
28159 },
28160 },
28161 {
28162 name: "SUBF",
28163 argLen: 2,
28164 asm: mips.ASUBF,
28165 reg: regInfo{
28166 inputs: []inputInfo{
28167 {0, 1152921504338411520},
28168 {1, 1152921504338411520},
28169 },
28170 outputs: []outputInfo{
28171 {0, 1152921504338411520},
28172 },
28173 },
28174 },
28175 {
28176 name: "SUBD",
28177 argLen: 2,
28178 asm: mips.ASUBD,
28179 reg: regInfo{
28180 inputs: []inputInfo{
28181 {0, 1152921504338411520},
28182 {1, 1152921504338411520},
28183 },
28184 outputs: []outputInfo{
28185 {0, 1152921504338411520},
28186 },
28187 },
28188 },
28189 {
28190 name: "MULF",
28191 argLen: 2,
28192 commutative: true,
28193 asm: mips.AMULF,
28194 reg: regInfo{
28195 inputs: []inputInfo{
28196 {0, 1152921504338411520},
28197 {1, 1152921504338411520},
28198 },
28199 outputs: []outputInfo{
28200 {0, 1152921504338411520},
28201 },
28202 },
28203 },
28204 {
28205 name: "MULD",
28206 argLen: 2,
28207 commutative: true,
28208 asm: mips.AMULD,
28209 reg: regInfo{
28210 inputs: []inputInfo{
28211 {0, 1152921504338411520},
28212 {1, 1152921504338411520},
28213 },
28214 outputs: []outputInfo{
28215 {0, 1152921504338411520},
28216 },
28217 },
28218 },
28219 {
28220 name: "DIVF",
28221 argLen: 2,
28222 asm: mips.ADIVF,
28223 reg: regInfo{
28224 inputs: []inputInfo{
28225 {0, 1152921504338411520},
28226 {1, 1152921504338411520},
28227 },
28228 outputs: []outputInfo{
28229 {0, 1152921504338411520},
28230 },
28231 },
28232 },
28233 {
28234 name: "DIVD",
28235 argLen: 2,
28236 asm: mips.ADIVD,
28237 reg: regInfo{
28238 inputs: []inputInfo{
28239 {0, 1152921504338411520},
28240 {1, 1152921504338411520},
28241 },
28242 outputs: []outputInfo{
28243 {0, 1152921504338411520},
28244 },
28245 },
28246 },
28247 {
28248 name: "AND",
28249 argLen: 2,
28250 commutative: true,
28251 asm: mips.AAND,
28252 reg: regInfo{
28253 inputs: []inputInfo{
28254 {0, 234881022},
28255 {1, 234881022},
28256 },
28257 outputs: []outputInfo{
28258 {0, 167772158},
28259 },
28260 },
28261 },
28262 {
28263 name: "ANDconst",
28264 auxType: auxInt64,
28265 argLen: 1,
28266 asm: mips.AAND,
28267 reg: regInfo{
28268 inputs: []inputInfo{
28269 {0, 234881022},
28270 },
28271 outputs: []outputInfo{
28272 {0, 167772158},
28273 },
28274 },
28275 },
28276 {
28277 name: "OR",
28278 argLen: 2,
28279 commutative: true,
28280 asm: mips.AOR,
28281 reg: regInfo{
28282 inputs: []inputInfo{
28283 {0, 234881022},
28284 {1, 234881022},
28285 },
28286 outputs: []outputInfo{
28287 {0, 167772158},
28288 },
28289 },
28290 },
28291 {
28292 name: "ORconst",
28293 auxType: auxInt64,
28294 argLen: 1,
28295 asm: mips.AOR,
28296 reg: regInfo{
28297 inputs: []inputInfo{
28298 {0, 234881022},
28299 },
28300 outputs: []outputInfo{
28301 {0, 167772158},
28302 },
28303 },
28304 },
28305 {
28306 name: "XOR",
28307 argLen: 2,
28308 commutative: true,
28309 asm: mips.AXOR,
28310 reg: regInfo{
28311 inputs: []inputInfo{
28312 {0, 234881022},
28313 {1, 234881022},
28314 },
28315 outputs: []outputInfo{
28316 {0, 167772158},
28317 },
28318 },
28319 },
28320 {
28321 name: "XORconst",
28322 auxType: auxInt64,
28323 argLen: 1,
28324 asm: mips.AXOR,
28325 reg: regInfo{
28326 inputs: []inputInfo{
28327 {0, 234881022},
28328 },
28329 outputs: []outputInfo{
28330 {0, 167772158},
28331 },
28332 },
28333 },
28334 {
28335 name: "NOR",
28336 argLen: 2,
28337 commutative: true,
28338 asm: mips.ANOR,
28339 reg: regInfo{
28340 inputs: []inputInfo{
28341 {0, 234881022},
28342 {1, 234881022},
28343 },
28344 outputs: []outputInfo{
28345 {0, 167772158},
28346 },
28347 },
28348 },
28349 {
28350 name: "NORconst",
28351 auxType: auxInt64,
28352 argLen: 1,
28353 asm: mips.ANOR,
28354 reg: regInfo{
28355 inputs: []inputInfo{
28356 {0, 234881022},
28357 },
28358 outputs: []outputInfo{
28359 {0, 167772158},
28360 },
28361 },
28362 },
28363 {
28364 name: "NEGV",
28365 argLen: 1,
28366 reg: regInfo{
28367 inputs: []inputInfo{
28368 {0, 234881022},
28369 },
28370 outputs: []outputInfo{
28371 {0, 167772158},
28372 },
28373 },
28374 },
28375 {
28376 name: "NEGF",
28377 argLen: 1,
28378 asm: mips.ANEGF,
28379 reg: regInfo{
28380 inputs: []inputInfo{
28381 {0, 1152921504338411520},
28382 },
28383 outputs: []outputInfo{
28384 {0, 1152921504338411520},
28385 },
28386 },
28387 },
28388 {
28389 name: "NEGD",
28390 argLen: 1,
28391 asm: mips.ANEGD,
28392 reg: regInfo{
28393 inputs: []inputInfo{
28394 {0, 1152921504338411520},
28395 },
28396 outputs: []outputInfo{
28397 {0, 1152921504338411520},
28398 },
28399 },
28400 },
28401 {
28402 name: "ABSD",
28403 argLen: 1,
28404 asm: mips.AABSD,
28405 reg: regInfo{
28406 inputs: []inputInfo{
28407 {0, 1152921504338411520},
28408 },
28409 outputs: []outputInfo{
28410 {0, 1152921504338411520},
28411 },
28412 },
28413 },
28414 {
28415 name: "SQRTD",
28416 argLen: 1,
28417 asm: mips.ASQRTD,
28418 reg: regInfo{
28419 inputs: []inputInfo{
28420 {0, 1152921504338411520},
28421 },
28422 outputs: []outputInfo{
28423 {0, 1152921504338411520},
28424 },
28425 },
28426 },
28427 {
28428 name: "SQRTF",
28429 argLen: 1,
28430 asm: mips.ASQRTF,
28431 reg: regInfo{
28432 inputs: []inputInfo{
28433 {0, 1152921504338411520},
28434 },
28435 outputs: []outputInfo{
28436 {0, 1152921504338411520},
28437 },
28438 },
28439 },
28440 {
28441 name: "SLLV",
28442 argLen: 2,
28443 asm: mips.ASLLV,
28444 reg: regInfo{
28445 inputs: []inputInfo{
28446 {0, 234881022},
28447 {1, 234881022},
28448 },
28449 outputs: []outputInfo{
28450 {0, 167772158},
28451 },
28452 },
28453 },
28454 {
28455 name: "SLLVconst",
28456 auxType: auxInt64,
28457 argLen: 1,
28458 asm: mips.ASLLV,
28459 reg: regInfo{
28460 inputs: []inputInfo{
28461 {0, 234881022},
28462 },
28463 outputs: []outputInfo{
28464 {0, 167772158},
28465 },
28466 },
28467 },
28468 {
28469 name: "SRLV",
28470 argLen: 2,
28471 asm: mips.ASRLV,
28472 reg: regInfo{
28473 inputs: []inputInfo{
28474 {0, 234881022},
28475 {1, 234881022},
28476 },
28477 outputs: []outputInfo{
28478 {0, 167772158},
28479 },
28480 },
28481 },
28482 {
28483 name: "SRLVconst",
28484 auxType: auxInt64,
28485 argLen: 1,
28486 asm: mips.ASRLV,
28487 reg: regInfo{
28488 inputs: []inputInfo{
28489 {0, 234881022},
28490 },
28491 outputs: []outputInfo{
28492 {0, 167772158},
28493 },
28494 },
28495 },
28496 {
28497 name: "SRAV",
28498 argLen: 2,
28499 asm: mips.ASRAV,
28500 reg: regInfo{
28501 inputs: []inputInfo{
28502 {0, 234881022},
28503 {1, 234881022},
28504 },
28505 outputs: []outputInfo{
28506 {0, 167772158},
28507 },
28508 },
28509 },
28510 {
28511 name: "SRAVconst",
28512 auxType: auxInt64,
28513 argLen: 1,
28514 asm: mips.ASRAV,
28515 reg: regInfo{
28516 inputs: []inputInfo{
28517 {0, 234881022},
28518 },
28519 outputs: []outputInfo{
28520 {0, 167772158},
28521 },
28522 },
28523 },
28524 {
28525 name: "SGT",
28526 argLen: 2,
28527 asm: mips.ASGT,
28528 reg: regInfo{
28529 inputs: []inputInfo{
28530 {0, 234881022},
28531 {1, 234881022},
28532 },
28533 outputs: []outputInfo{
28534 {0, 167772158},
28535 },
28536 },
28537 },
28538 {
28539 name: "SGTconst",
28540 auxType: auxInt64,
28541 argLen: 1,
28542 asm: mips.ASGT,
28543 reg: regInfo{
28544 inputs: []inputInfo{
28545 {0, 234881022},
28546 },
28547 outputs: []outputInfo{
28548 {0, 167772158},
28549 },
28550 },
28551 },
28552 {
28553 name: "SGTU",
28554 argLen: 2,
28555 asm: mips.ASGTU,
28556 reg: regInfo{
28557 inputs: []inputInfo{
28558 {0, 234881022},
28559 {1, 234881022},
28560 },
28561 outputs: []outputInfo{
28562 {0, 167772158},
28563 },
28564 },
28565 },
28566 {
28567 name: "SGTUconst",
28568 auxType: auxInt64,
28569 argLen: 1,
28570 asm: mips.ASGTU,
28571 reg: regInfo{
28572 inputs: []inputInfo{
28573 {0, 234881022},
28574 },
28575 outputs: []outputInfo{
28576 {0, 167772158},
28577 },
28578 },
28579 },
28580 {
28581 name: "CMPEQF",
28582 argLen: 2,
28583 asm: mips.ACMPEQF,
28584 reg: regInfo{
28585 inputs: []inputInfo{
28586 {0, 1152921504338411520},
28587 {1, 1152921504338411520},
28588 },
28589 },
28590 },
28591 {
28592 name: "CMPEQD",
28593 argLen: 2,
28594 asm: mips.ACMPEQD,
28595 reg: regInfo{
28596 inputs: []inputInfo{
28597 {0, 1152921504338411520},
28598 {1, 1152921504338411520},
28599 },
28600 },
28601 },
28602 {
28603 name: "CMPGEF",
28604 argLen: 2,
28605 asm: mips.ACMPGEF,
28606 reg: regInfo{
28607 inputs: []inputInfo{
28608 {0, 1152921504338411520},
28609 {1, 1152921504338411520},
28610 },
28611 },
28612 },
28613 {
28614 name: "CMPGED",
28615 argLen: 2,
28616 asm: mips.ACMPGED,
28617 reg: regInfo{
28618 inputs: []inputInfo{
28619 {0, 1152921504338411520},
28620 {1, 1152921504338411520},
28621 },
28622 },
28623 },
28624 {
28625 name: "CMPGTF",
28626 argLen: 2,
28627 asm: mips.ACMPGTF,
28628 reg: regInfo{
28629 inputs: []inputInfo{
28630 {0, 1152921504338411520},
28631 {1, 1152921504338411520},
28632 },
28633 },
28634 },
28635 {
28636 name: "CMPGTD",
28637 argLen: 2,
28638 asm: mips.ACMPGTD,
28639 reg: regInfo{
28640 inputs: []inputInfo{
28641 {0, 1152921504338411520},
28642 {1, 1152921504338411520},
28643 },
28644 },
28645 },
28646 {
28647 name: "MOVVconst",
28648 auxType: auxInt64,
28649 argLen: 0,
28650 rematerializeable: true,
28651 asm: mips.AMOVV,
28652 reg: regInfo{
28653 outputs: []outputInfo{
28654 {0, 167772158},
28655 },
28656 },
28657 },
28658 {
28659 name: "MOVFconst",
28660 auxType: auxFloat64,
28661 argLen: 0,
28662 rematerializeable: true,
28663 asm: mips.AMOVF,
28664 reg: regInfo{
28665 outputs: []outputInfo{
28666 {0, 1152921504338411520},
28667 },
28668 },
28669 },
28670 {
28671 name: "MOVDconst",
28672 auxType: auxFloat64,
28673 argLen: 0,
28674 rematerializeable: true,
28675 asm: mips.AMOVD,
28676 reg: regInfo{
28677 outputs: []outputInfo{
28678 {0, 1152921504338411520},
28679 },
28680 },
28681 },
28682 {
28683 name: "MOVVaddr",
28684 auxType: auxSymOff,
28685 argLen: 1,
28686 rematerializeable: true,
28687 symEffect: SymAddr,
28688 asm: mips.AMOVV,
28689 reg: regInfo{
28690 inputs: []inputInfo{
28691 {0, 4611686018460942336},
28692 },
28693 outputs: []outputInfo{
28694 {0, 167772158},
28695 },
28696 },
28697 },
28698 {
28699 name: "MOVBload",
28700 auxType: auxSymOff,
28701 argLen: 2,
28702 faultOnNilArg0: true,
28703 symEffect: SymRead,
28704 asm: mips.AMOVB,
28705 reg: regInfo{
28706 inputs: []inputInfo{
28707 {0, 4611686018695823358},
28708 },
28709 outputs: []outputInfo{
28710 {0, 167772158},
28711 },
28712 },
28713 },
28714 {
28715 name: "MOVBUload",
28716 auxType: auxSymOff,
28717 argLen: 2,
28718 faultOnNilArg0: true,
28719 symEffect: SymRead,
28720 asm: mips.AMOVBU,
28721 reg: regInfo{
28722 inputs: []inputInfo{
28723 {0, 4611686018695823358},
28724 },
28725 outputs: []outputInfo{
28726 {0, 167772158},
28727 },
28728 },
28729 },
28730 {
28731 name: "MOVHload",
28732 auxType: auxSymOff,
28733 argLen: 2,
28734 faultOnNilArg0: true,
28735 symEffect: SymRead,
28736 asm: mips.AMOVH,
28737 reg: regInfo{
28738 inputs: []inputInfo{
28739 {0, 4611686018695823358},
28740 },
28741 outputs: []outputInfo{
28742 {0, 167772158},
28743 },
28744 },
28745 },
28746 {
28747 name: "MOVHUload",
28748 auxType: auxSymOff,
28749 argLen: 2,
28750 faultOnNilArg0: true,
28751 symEffect: SymRead,
28752 asm: mips.AMOVHU,
28753 reg: regInfo{
28754 inputs: []inputInfo{
28755 {0, 4611686018695823358},
28756 },
28757 outputs: []outputInfo{
28758 {0, 167772158},
28759 },
28760 },
28761 },
28762 {
28763 name: "MOVWload",
28764 auxType: auxSymOff,
28765 argLen: 2,
28766 faultOnNilArg0: true,
28767 symEffect: SymRead,
28768 asm: mips.AMOVW,
28769 reg: regInfo{
28770 inputs: []inputInfo{
28771 {0, 4611686018695823358},
28772 },
28773 outputs: []outputInfo{
28774 {0, 167772158},
28775 },
28776 },
28777 },
28778 {
28779 name: "MOVWUload",
28780 auxType: auxSymOff,
28781 argLen: 2,
28782 faultOnNilArg0: true,
28783 symEffect: SymRead,
28784 asm: mips.AMOVWU,
28785 reg: regInfo{
28786 inputs: []inputInfo{
28787 {0, 4611686018695823358},
28788 },
28789 outputs: []outputInfo{
28790 {0, 167772158},
28791 },
28792 },
28793 },
28794 {
28795 name: "MOVVload",
28796 auxType: auxSymOff,
28797 argLen: 2,
28798 faultOnNilArg0: true,
28799 symEffect: SymRead,
28800 asm: mips.AMOVV,
28801 reg: regInfo{
28802 inputs: []inputInfo{
28803 {0, 4611686018695823358},
28804 },
28805 outputs: []outputInfo{
28806 {0, 167772158},
28807 },
28808 },
28809 },
28810 {
28811 name: "MOVFload",
28812 auxType: auxSymOff,
28813 argLen: 2,
28814 faultOnNilArg0: true,
28815 symEffect: SymRead,
28816 asm: mips.AMOVF,
28817 reg: regInfo{
28818 inputs: []inputInfo{
28819 {0, 4611686018695823358},
28820 },
28821 outputs: []outputInfo{
28822 {0, 1152921504338411520},
28823 },
28824 },
28825 },
28826 {
28827 name: "MOVDload",
28828 auxType: auxSymOff,
28829 argLen: 2,
28830 faultOnNilArg0: true,
28831 symEffect: SymRead,
28832 asm: mips.AMOVD,
28833 reg: regInfo{
28834 inputs: []inputInfo{
28835 {0, 4611686018695823358},
28836 },
28837 outputs: []outputInfo{
28838 {0, 1152921504338411520},
28839 },
28840 },
28841 },
28842 {
28843 name: "MOVBstore",
28844 auxType: auxSymOff,
28845 argLen: 3,
28846 faultOnNilArg0: true,
28847 symEffect: SymWrite,
28848 asm: mips.AMOVB,
28849 reg: regInfo{
28850 inputs: []inputInfo{
28851 {1, 234881022},
28852 {0, 4611686018695823358},
28853 },
28854 },
28855 },
28856 {
28857 name: "MOVHstore",
28858 auxType: auxSymOff,
28859 argLen: 3,
28860 faultOnNilArg0: true,
28861 symEffect: SymWrite,
28862 asm: mips.AMOVH,
28863 reg: regInfo{
28864 inputs: []inputInfo{
28865 {1, 234881022},
28866 {0, 4611686018695823358},
28867 },
28868 },
28869 },
28870 {
28871 name: "MOVWstore",
28872 auxType: auxSymOff,
28873 argLen: 3,
28874 faultOnNilArg0: true,
28875 symEffect: SymWrite,
28876 asm: mips.AMOVW,
28877 reg: regInfo{
28878 inputs: []inputInfo{
28879 {1, 234881022},
28880 {0, 4611686018695823358},
28881 },
28882 },
28883 },
28884 {
28885 name: "MOVVstore",
28886 auxType: auxSymOff,
28887 argLen: 3,
28888 faultOnNilArg0: true,
28889 symEffect: SymWrite,
28890 asm: mips.AMOVV,
28891 reg: regInfo{
28892 inputs: []inputInfo{
28893 {1, 234881022},
28894 {0, 4611686018695823358},
28895 },
28896 },
28897 },
28898 {
28899 name: "MOVFstore",
28900 auxType: auxSymOff,
28901 argLen: 3,
28902 faultOnNilArg0: true,
28903 symEffect: SymWrite,
28904 asm: mips.AMOVF,
28905 reg: regInfo{
28906 inputs: []inputInfo{
28907 {0, 4611686018695823358},
28908 {1, 1152921504338411520},
28909 },
28910 },
28911 },
28912 {
28913 name: "MOVDstore",
28914 auxType: auxSymOff,
28915 argLen: 3,
28916 faultOnNilArg0: true,
28917 symEffect: SymWrite,
28918 asm: mips.AMOVD,
28919 reg: regInfo{
28920 inputs: []inputInfo{
28921 {0, 4611686018695823358},
28922 {1, 1152921504338411520},
28923 },
28924 },
28925 },
28926 {
28927 name: "MOVBstorezero",
28928 auxType: auxSymOff,
28929 argLen: 2,
28930 faultOnNilArg0: true,
28931 symEffect: SymWrite,
28932 asm: mips.AMOVB,
28933 reg: regInfo{
28934 inputs: []inputInfo{
28935 {0, 4611686018695823358},
28936 },
28937 },
28938 },
28939 {
28940 name: "MOVHstorezero",
28941 auxType: auxSymOff,
28942 argLen: 2,
28943 faultOnNilArg0: true,
28944 symEffect: SymWrite,
28945 asm: mips.AMOVH,
28946 reg: regInfo{
28947 inputs: []inputInfo{
28948 {0, 4611686018695823358},
28949 },
28950 },
28951 },
28952 {
28953 name: "MOVWstorezero",
28954 auxType: auxSymOff,
28955 argLen: 2,
28956 faultOnNilArg0: true,
28957 symEffect: SymWrite,
28958 asm: mips.AMOVW,
28959 reg: regInfo{
28960 inputs: []inputInfo{
28961 {0, 4611686018695823358},
28962 },
28963 },
28964 },
28965 {
28966 name: "MOVVstorezero",
28967 auxType: auxSymOff,
28968 argLen: 2,
28969 faultOnNilArg0: true,
28970 symEffect: SymWrite,
28971 asm: mips.AMOVV,
28972 reg: regInfo{
28973 inputs: []inputInfo{
28974 {0, 4611686018695823358},
28975 },
28976 },
28977 },
28978 {
28979 name: "MOVWfpgp",
28980 argLen: 1,
28981 asm: mips.AMOVW,
28982 reg: regInfo{
28983 inputs: []inputInfo{
28984 {0, 1152921504338411520},
28985 },
28986 outputs: []outputInfo{
28987 {0, 167772158},
28988 },
28989 },
28990 },
28991 {
28992 name: "MOVWgpfp",
28993 argLen: 1,
28994 asm: mips.AMOVW,
28995 reg: regInfo{
28996 inputs: []inputInfo{
28997 {0, 167772158},
28998 },
28999 outputs: []outputInfo{
29000 {0, 1152921504338411520},
29001 },
29002 },
29003 },
29004 {
29005 name: "MOVVfpgp",
29006 argLen: 1,
29007 asm: mips.AMOVV,
29008 reg: regInfo{
29009 inputs: []inputInfo{
29010 {0, 1152921504338411520},
29011 },
29012 outputs: []outputInfo{
29013 {0, 167772158},
29014 },
29015 },
29016 },
29017 {
29018 name: "MOVVgpfp",
29019 argLen: 1,
29020 asm: mips.AMOVV,
29021 reg: regInfo{
29022 inputs: []inputInfo{
29023 {0, 167772158},
29024 },
29025 outputs: []outputInfo{
29026 {0, 1152921504338411520},
29027 },
29028 },
29029 },
29030 {
29031 name: "MOVBreg",
29032 argLen: 1,
29033 asm: mips.AMOVB,
29034 reg: regInfo{
29035 inputs: []inputInfo{
29036 {0, 234881022},
29037 },
29038 outputs: []outputInfo{
29039 {0, 167772158},
29040 },
29041 },
29042 },
29043 {
29044 name: "MOVBUreg",
29045 argLen: 1,
29046 asm: mips.AMOVBU,
29047 reg: regInfo{
29048 inputs: []inputInfo{
29049 {0, 234881022},
29050 },
29051 outputs: []outputInfo{
29052 {0, 167772158},
29053 },
29054 },
29055 },
29056 {
29057 name: "MOVHreg",
29058 argLen: 1,
29059 asm: mips.AMOVH,
29060 reg: regInfo{
29061 inputs: []inputInfo{
29062 {0, 234881022},
29063 },
29064 outputs: []outputInfo{
29065 {0, 167772158},
29066 },
29067 },
29068 },
29069 {
29070 name: "MOVHUreg",
29071 argLen: 1,
29072 asm: mips.AMOVHU,
29073 reg: regInfo{
29074 inputs: []inputInfo{
29075 {0, 234881022},
29076 },
29077 outputs: []outputInfo{
29078 {0, 167772158},
29079 },
29080 },
29081 },
29082 {
29083 name: "MOVWreg",
29084 argLen: 1,
29085 asm: mips.AMOVW,
29086 reg: regInfo{
29087 inputs: []inputInfo{
29088 {0, 234881022},
29089 },
29090 outputs: []outputInfo{
29091 {0, 167772158},
29092 },
29093 },
29094 },
29095 {
29096 name: "MOVWUreg",
29097 argLen: 1,
29098 asm: mips.AMOVWU,
29099 reg: regInfo{
29100 inputs: []inputInfo{
29101 {0, 234881022},
29102 },
29103 outputs: []outputInfo{
29104 {0, 167772158},
29105 },
29106 },
29107 },
29108 {
29109 name: "MOVVreg",
29110 argLen: 1,
29111 asm: mips.AMOVV,
29112 reg: regInfo{
29113 inputs: []inputInfo{
29114 {0, 234881022},
29115 },
29116 outputs: []outputInfo{
29117 {0, 167772158},
29118 },
29119 },
29120 },
29121 {
29122 name: "MOVVnop",
29123 argLen: 1,
29124 resultInArg0: true,
29125 reg: regInfo{
29126 inputs: []inputInfo{
29127 {0, 167772158},
29128 },
29129 outputs: []outputInfo{
29130 {0, 167772158},
29131 },
29132 },
29133 },
29134 {
29135 name: "MOVWF",
29136 argLen: 1,
29137 asm: mips.AMOVWF,
29138 reg: regInfo{
29139 inputs: []inputInfo{
29140 {0, 1152921504338411520},
29141 },
29142 outputs: []outputInfo{
29143 {0, 1152921504338411520},
29144 },
29145 },
29146 },
29147 {
29148 name: "MOVWD",
29149 argLen: 1,
29150 asm: mips.AMOVWD,
29151 reg: regInfo{
29152 inputs: []inputInfo{
29153 {0, 1152921504338411520},
29154 },
29155 outputs: []outputInfo{
29156 {0, 1152921504338411520},
29157 },
29158 },
29159 },
29160 {
29161 name: "MOVVF",
29162 argLen: 1,
29163 asm: mips.AMOVVF,
29164 reg: regInfo{
29165 inputs: []inputInfo{
29166 {0, 1152921504338411520},
29167 },
29168 outputs: []outputInfo{
29169 {0, 1152921504338411520},
29170 },
29171 },
29172 },
29173 {
29174 name: "MOVVD",
29175 argLen: 1,
29176 asm: mips.AMOVVD,
29177 reg: regInfo{
29178 inputs: []inputInfo{
29179 {0, 1152921504338411520},
29180 },
29181 outputs: []outputInfo{
29182 {0, 1152921504338411520},
29183 },
29184 },
29185 },
29186 {
29187 name: "TRUNCFW",
29188 argLen: 1,
29189 asm: mips.ATRUNCFW,
29190 reg: regInfo{
29191 inputs: []inputInfo{
29192 {0, 1152921504338411520},
29193 },
29194 outputs: []outputInfo{
29195 {0, 1152921504338411520},
29196 },
29197 },
29198 },
29199 {
29200 name: "TRUNCDW",
29201 argLen: 1,
29202 asm: mips.ATRUNCDW,
29203 reg: regInfo{
29204 inputs: []inputInfo{
29205 {0, 1152921504338411520},
29206 },
29207 outputs: []outputInfo{
29208 {0, 1152921504338411520},
29209 },
29210 },
29211 },
29212 {
29213 name: "TRUNCFV",
29214 argLen: 1,
29215 asm: mips.ATRUNCFV,
29216 reg: regInfo{
29217 inputs: []inputInfo{
29218 {0, 1152921504338411520},
29219 },
29220 outputs: []outputInfo{
29221 {0, 1152921504338411520},
29222 },
29223 },
29224 },
29225 {
29226 name: "TRUNCDV",
29227 argLen: 1,
29228 asm: mips.ATRUNCDV,
29229 reg: regInfo{
29230 inputs: []inputInfo{
29231 {0, 1152921504338411520},
29232 },
29233 outputs: []outputInfo{
29234 {0, 1152921504338411520},
29235 },
29236 },
29237 },
29238 {
29239 name: "MOVFD",
29240 argLen: 1,
29241 asm: mips.AMOVFD,
29242 reg: regInfo{
29243 inputs: []inputInfo{
29244 {0, 1152921504338411520},
29245 },
29246 outputs: []outputInfo{
29247 {0, 1152921504338411520},
29248 },
29249 },
29250 },
29251 {
29252 name: "MOVDF",
29253 argLen: 1,
29254 asm: mips.AMOVDF,
29255 reg: regInfo{
29256 inputs: []inputInfo{
29257 {0, 1152921504338411520},
29258 },
29259 outputs: []outputInfo{
29260 {0, 1152921504338411520},
29261 },
29262 },
29263 },
29264 {
29265 name: "CALLstatic",
29266 auxType: auxCallOff,
29267 argLen: 1,
29268 clobberFlags: true,
29269 call: true,
29270 reg: regInfo{
29271 clobbers: 4611686018393833470,
29272 },
29273 },
29274 {
29275 name: "CALLtail",
29276 auxType: auxCallOff,
29277 argLen: 1,
29278 clobberFlags: true,
29279 call: true,
29280 tailCall: true,
29281 reg: regInfo{
29282 clobbers: 4611686018393833470,
29283 },
29284 },
29285 {
29286 name: "CALLclosure",
29287 auxType: auxCallOff,
29288 argLen: 3,
29289 clobberFlags: true,
29290 call: true,
29291 reg: regInfo{
29292 inputs: []inputInfo{
29293 {1, 4194304},
29294 {0, 201326590},
29295 },
29296 clobbers: 4611686018393833470,
29297 },
29298 },
29299 {
29300 name: "CALLinter",
29301 auxType: auxCallOff,
29302 argLen: 2,
29303 clobberFlags: true,
29304 call: true,
29305 reg: regInfo{
29306 inputs: []inputInfo{
29307 {0, 167772158},
29308 },
29309 clobbers: 4611686018393833470,
29310 },
29311 },
29312 {
29313 name: "DUFFZERO",
29314 auxType: auxInt64,
29315 argLen: 2,
29316 faultOnNilArg0: true,
29317 reg: regInfo{
29318 inputs: []inputInfo{
29319 {0, 167772158},
29320 },
29321 clobbers: 134217730,
29322 },
29323 },
29324 {
29325 name: "DUFFCOPY",
29326 auxType: auxInt64,
29327 argLen: 3,
29328 faultOnNilArg0: true,
29329 faultOnNilArg1: true,
29330 reg: regInfo{
29331 inputs: []inputInfo{
29332 {0, 4},
29333 {1, 2},
29334 },
29335 clobbers: 134217734,
29336 },
29337 },
29338 {
29339 name: "LoweredZero",
29340 auxType: auxInt64,
29341 argLen: 3,
29342 clobberFlags: true,
29343 faultOnNilArg0: true,
29344 reg: regInfo{
29345 inputs: []inputInfo{
29346 {0, 2},
29347 {1, 167772158},
29348 },
29349 clobbers: 2,
29350 },
29351 },
29352 {
29353 name: "LoweredMove",
29354 auxType: auxInt64,
29355 argLen: 4,
29356 clobberFlags: true,
29357 faultOnNilArg0: true,
29358 faultOnNilArg1: true,
29359 reg: regInfo{
29360 inputs: []inputInfo{
29361 {0, 4},
29362 {1, 2},
29363 {2, 167772158},
29364 },
29365 clobbers: 6,
29366 },
29367 },
29368 {
29369 name: "LoweredAtomicAnd32",
29370 argLen: 3,
29371 faultOnNilArg0: true,
29372 hasSideEffects: true,
29373 unsafePoint: true,
29374 asm: mips.AAND,
29375 reg: regInfo{
29376 inputs: []inputInfo{
29377 {1, 234881022},
29378 {0, 4611686018695823358},
29379 },
29380 },
29381 },
29382 {
29383 name: "LoweredAtomicOr32",
29384 argLen: 3,
29385 faultOnNilArg0: true,
29386 hasSideEffects: true,
29387 unsafePoint: true,
29388 asm: mips.AOR,
29389 reg: regInfo{
29390 inputs: []inputInfo{
29391 {1, 234881022},
29392 {0, 4611686018695823358},
29393 },
29394 },
29395 },
29396 {
29397 name: "LoweredAtomicLoad8",
29398 argLen: 2,
29399 faultOnNilArg0: true,
29400 reg: regInfo{
29401 inputs: []inputInfo{
29402 {0, 4611686018695823358},
29403 },
29404 outputs: []outputInfo{
29405 {0, 167772158},
29406 },
29407 },
29408 },
29409 {
29410 name: "LoweredAtomicLoad32",
29411 argLen: 2,
29412 faultOnNilArg0: true,
29413 reg: regInfo{
29414 inputs: []inputInfo{
29415 {0, 4611686018695823358},
29416 },
29417 outputs: []outputInfo{
29418 {0, 167772158},
29419 },
29420 },
29421 },
29422 {
29423 name: "LoweredAtomicLoad64",
29424 argLen: 2,
29425 faultOnNilArg0: true,
29426 reg: regInfo{
29427 inputs: []inputInfo{
29428 {0, 4611686018695823358},
29429 },
29430 outputs: []outputInfo{
29431 {0, 167772158},
29432 },
29433 },
29434 },
29435 {
29436 name: "LoweredAtomicStore8",
29437 argLen: 3,
29438 faultOnNilArg0: true,
29439 hasSideEffects: true,
29440 reg: regInfo{
29441 inputs: []inputInfo{
29442 {1, 234881022},
29443 {0, 4611686018695823358},
29444 },
29445 },
29446 },
29447 {
29448 name: "LoweredAtomicStore32",
29449 argLen: 3,
29450 faultOnNilArg0: true,
29451 hasSideEffects: true,
29452 reg: regInfo{
29453 inputs: []inputInfo{
29454 {1, 234881022},
29455 {0, 4611686018695823358},
29456 },
29457 },
29458 },
29459 {
29460 name: "LoweredAtomicStore64",
29461 argLen: 3,
29462 faultOnNilArg0: true,
29463 hasSideEffects: true,
29464 reg: regInfo{
29465 inputs: []inputInfo{
29466 {1, 234881022},
29467 {0, 4611686018695823358},
29468 },
29469 },
29470 },
29471 {
29472 name: "LoweredAtomicStorezero32",
29473 argLen: 2,
29474 faultOnNilArg0: true,
29475 hasSideEffects: true,
29476 reg: regInfo{
29477 inputs: []inputInfo{
29478 {0, 4611686018695823358},
29479 },
29480 },
29481 },
29482 {
29483 name: "LoweredAtomicStorezero64",
29484 argLen: 2,
29485 faultOnNilArg0: true,
29486 hasSideEffects: true,
29487 reg: regInfo{
29488 inputs: []inputInfo{
29489 {0, 4611686018695823358},
29490 },
29491 },
29492 },
29493 {
29494 name: "LoweredAtomicExchange32",
29495 argLen: 3,
29496 resultNotInArgs: true,
29497 faultOnNilArg0: true,
29498 hasSideEffects: true,
29499 unsafePoint: true,
29500 reg: regInfo{
29501 inputs: []inputInfo{
29502 {1, 234881022},
29503 {0, 4611686018695823358},
29504 },
29505 outputs: []outputInfo{
29506 {0, 167772158},
29507 },
29508 },
29509 },
29510 {
29511 name: "LoweredAtomicExchange64",
29512 argLen: 3,
29513 resultNotInArgs: true,
29514 faultOnNilArg0: true,
29515 hasSideEffects: true,
29516 unsafePoint: true,
29517 reg: regInfo{
29518 inputs: []inputInfo{
29519 {1, 234881022},
29520 {0, 4611686018695823358},
29521 },
29522 outputs: []outputInfo{
29523 {0, 167772158},
29524 },
29525 },
29526 },
29527 {
29528 name: "LoweredAtomicAdd32",
29529 argLen: 3,
29530 resultNotInArgs: true,
29531 faultOnNilArg0: true,
29532 hasSideEffects: true,
29533 unsafePoint: true,
29534 reg: regInfo{
29535 inputs: []inputInfo{
29536 {1, 234881022},
29537 {0, 4611686018695823358},
29538 },
29539 outputs: []outputInfo{
29540 {0, 167772158},
29541 },
29542 },
29543 },
29544 {
29545 name: "LoweredAtomicAdd64",
29546 argLen: 3,
29547 resultNotInArgs: true,
29548 faultOnNilArg0: true,
29549 hasSideEffects: true,
29550 unsafePoint: true,
29551 reg: regInfo{
29552 inputs: []inputInfo{
29553 {1, 234881022},
29554 {0, 4611686018695823358},
29555 },
29556 outputs: []outputInfo{
29557 {0, 167772158},
29558 },
29559 },
29560 },
29561 {
29562 name: "LoweredAtomicAddconst32",
29563 auxType: auxInt32,
29564 argLen: 2,
29565 resultNotInArgs: true,
29566 faultOnNilArg0: true,
29567 hasSideEffects: true,
29568 unsafePoint: true,
29569 reg: regInfo{
29570 inputs: []inputInfo{
29571 {0, 4611686018695823358},
29572 },
29573 outputs: []outputInfo{
29574 {0, 167772158},
29575 },
29576 },
29577 },
29578 {
29579 name: "LoweredAtomicAddconst64",
29580 auxType: auxInt64,
29581 argLen: 2,
29582 resultNotInArgs: true,
29583 faultOnNilArg0: true,
29584 hasSideEffects: true,
29585 unsafePoint: true,
29586 reg: regInfo{
29587 inputs: []inputInfo{
29588 {0, 4611686018695823358},
29589 },
29590 outputs: []outputInfo{
29591 {0, 167772158},
29592 },
29593 },
29594 },
29595 {
29596 name: "LoweredAtomicCas32",
29597 argLen: 4,
29598 resultNotInArgs: true,
29599 faultOnNilArg0: true,
29600 hasSideEffects: true,
29601 unsafePoint: true,
29602 reg: regInfo{
29603 inputs: []inputInfo{
29604 {1, 234881022},
29605 {2, 234881022},
29606 {0, 4611686018695823358},
29607 },
29608 outputs: []outputInfo{
29609 {0, 167772158},
29610 },
29611 },
29612 },
29613 {
29614 name: "LoweredAtomicCas64",
29615 argLen: 4,
29616 resultNotInArgs: true,
29617 faultOnNilArg0: true,
29618 hasSideEffects: true,
29619 unsafePoint: true,
29620 reg: regInfo{
29621 inputs: []inputInfo{
29622 {1, 234881022},
29623 {2, 234881022},
29624 {0, 4611686018695823358},
29625 },
29626 outputs: []outputInfo{
29627 {0, 167772158},
29628 },
29629 },
29630 },
29631 {
29632 name: "LoweredNilCheck",
29633 argLen: 2,
29634 nilCheck: true,
29635 faultOnNilArg0: true,
29636 reg: regInfo{
29637 inputs: []inputInfo{
29638 {0, 234881022},
29639 },
29640 },
29641 },
29642 {
29643 name: "FPFlagTrue",
29644 argLen: 1,
29645 reg: regInfo{
29646 outputs: []outputInfo{
29647 {0, 167772158},
29648 },
29649 },
29650 },
29651 {
29652 name: "FPFlagFalse",
29653 argLen: 1,
29654 reg: regInfo{
29655 outputs: []outputInfo{
29656 {0, 167772158},
29657 },
29658 },
29659 },
29660 {
29661 name: "LoweredGetClosurePtr",
29662 argLen: 0,
29663 zeroWidth: true,
29664 reg: regInfo{
29665 outputs: []outputInfo{
29666 {0, 4194304},
29667 },
29668 },
29669 },
29670 {
29671 name: "LoweredGetCallerSP",
29672 argLen: 1,
29673 rematerializeable: true,
29674 reg: regInfo{
29675 outputs: []outputInfo{
29676 {0, 167772158},
29677 },
29678 },
29679 },
29680 {
29681 name: "LoweredGetCallerPC",
29682 argLen: 0,
29683 rematerializeable: true,
29684 reg: regInfo{
29685 outputs: []outputInfo{
29686 {0, 167772158},
29687 },
29688 },
29689 },
29690 {
29691 name: "LoweredWB",
29692 auxType: auxInt64,
29693 argLen: 1,
29694 clobberFlags: true,
29695 reg: regInfo{
29696 clobbers: 4611686018293170176,
29697 outputs: []outputInfo{
29698 {0, 16777216},
29699 },
29700 },
29701 },
29702 {
29703 name: "LoweredPanicBoundsA",
29704 auxType: auxInt64,
29705 argLen: 3,
29706 call: true,
29707 reg: regInfo{
29708 inputs: []inputInfo{
29709 {0, 8},
29710 {1, 16},
29711 },
29712 },
29713 },
29714 {
29715 name: "LoweredPanicBoundsB",
29716 auxType: auxInt64,
29717 argLen: 3,
29718 call: true,
29719 reg: regInfo{
29720 inputs: []inputInfo{
29721 {0, 4},
29722 {1, 8},
29723 },
29724 },
29725 },
29726 {
29727 name: "LoweredPanicBoundsC",
29728 auxType: auxInt64,
29729 argLen: 3,
29730 call: true,
29731 reg: regInfo{
29732 inputs: []inputInfo{
29733 {0, 2},
29734 {1, 4},
29735 },
29736 },
29737 },
29738
29739 {
29740 name: "ADD",
29741 argLen: 2,
29742 commutative: true,
29743 asm: ppc64.AADD,
29744 reg: regInfo{
29745 inputs: []inputInfo{
29746 {0, 1073733630},
29747 {1, 1073733630},
29748 },
29749 outputs: []outputInfo{
29750 {0, 1073733624},
29751 },
29752 },
29753 },
29754 {
29755 name: "ADDCC",
29756 argLen: 2,
29757 commutative: true,
29758 asm: ppc64.AADDCC,
29759 reg: regInfo{
29760 inputs: []inputInfo{
29761 {0, 1073733630},
29762 {1, 1073733630},
29763 },
29764 outputs: []outputInfo{
29765 {0, 1073733624},
29766 },
29767 },
29768 },
29769 {
29770 name: "ADDconst",
29771 auxType: auxInt64,
29772 argLen: 1,
29773 asm: ppc64.AADD,
29774 reg: regInfo{
29775 inputs: []inputInfo{
29776 {0, 1073733630},
29777 },
29778 outputs: []outputInfo{
29779 {0, 1073733624},
29780 },
29781 },
29782 },
29783 {
29784 name: "ADDCCconst",
29785 auxType: auxInt64,
29786 argLen: 1,
29787 asm: ppc64.AADDCCC,
29788 reg: regInfo{
29789 inputs: []inputInfo{
29790 {0, 1073733630},
29791 },
29792 clobbers: 9223372036854775808,
29793 outputs: []outputInfo{
29794 {0, 1073733624},
29795 },
29796 },
29797 },
29798 {
29799 name: "FADD",
29800 argLen: 2,
29801 commutative: true,
29802 asm: ppc64.AFADD,
29803 reg: regInfo{
29804 inputs: []inputInfo{
29805 {0, 9223372032559808512},
29806 {1, 9223372032559808512},
29807 },
29808 outputs: []outputInfo{
29809 {0, 9223372032559808512},
29810 },
29811 },
29812 },
29813 {
29814 name: "FADDS",
29815 argLen: 2,
29816 commutative: true,
29817 asm: ppc64.AFADDS,
29818 reg: regInfo{
29819 inputs: []inputInfo{
29820 {0, 9223372032559808512},
29821 {1, 9223372032559808512},
29822 },
29823 outputs: []outputInfo{
29824 {0, 9223372032559808512},
29825 },
29826 },
29827 },
29828 {
29829 name: "SUB",
29830 argLen: 2,
29831 asm: ppc64.ASUB,
29832 reg: regInfo{
29833 inputs: []inputInfo{
29834 {0, 1073733630},
29835 {1, 1073733630},
29836 },
29837 outputs: []outputInfo{
29838 {0, 1073733624},
29839 },
29840 },
29841 },
29842 {
29843 name: "SUBCC",
29844 argLen: 2,
29845 asm: ppc64.ASUBCC,
29846 reg: regInfo{
29847 inputs: []inputInfo{
29848 {0, 1073733630},
29849 {1, 1073733630},
29850 },
29851 outputs: []outputInfo{
29852 {0, 1073733624},
29853 },
29854 },
29855 },
29856 {
29857 name: "SUBFCconst",
29858 auxType: auxInt64,
29859 argLen: 1,
29860 asm: ppc64.ASUBC,
29861 reg: regInfo{
29862 inputs: []inputInfo{
29863 {0, 1073733630},
29864 },
29865 clobbers: 9223372036854775808,
29866 outputs: []outputInfo{
29867 {0, 1073733624},
29868 },
29869 },
29870 },
29871 {
29872 name: "FSUB",
29873 argLen: 2,
29874 asm: ppc64.AFSUB,
29875 reg: regInfo{
29876 inputs: []inputInfo{
29877 {0, 9223372032559808512},
29878 {1, 9223372032559808512},
29879 },
29880 outputs: []outputInfo{
29881 {0, 9223372032559808512},
29882 },
29883 },
29884 },
29885 {
29886 name: "FSUBS",
29887 argLen: 2,
29888 asm: ppc64.AFSUBS,
29889 reg: regInfo{
29890 inputs: []inputInfo{
29891 {0, 9223372032559808512},
29892 {1, 9223372032559808512},
29893 },
29894 outputs: []outputInfo{
29895 {0, 9223372032559808512},
29896 },
29897 },
29898 },
29899 {
29900 name: "XSMINJDP",
29901 argLen: 2,
29902 asm: ppc64.AXSMINJDP,
29903 reg: regInfo{
29904 inputs: []inputInfo{
29905 {0, 9223372032559808512},
29906 {1, 9223372032559808512},
29907 },
29908 outputs: []outputInfo{
29909 {0, 9223372032559808512},
29910 },
29911 },
29912 },
29913 {
29914 name: "XSMAXJDP",
29915 argLen: 2,
29916 asm: ppc64.AXSMAXJDP,
29917 reg: regInfo{
29918 inputs: []inputInfo{
29919 {0, 9223372032559808512},
29920 {1, 9223372032559808512},
29921 },
29922 outputs: []outputInfo{
29923 {0, 9223372032559808512},
29924 },
29925 },
29926 },
29927 {
29928 name: "MULLD",
29929 argLen: 2,
29930 commutative: true,
29931 asm: ppc64.AMULLD,
29932 reg: regInfo{
29933 inputs: []inputInfo{
29934 {0, 1073733630},
29935 {1, 1073733630},
29936 },
29937 outputs: []outputInfo{
29938 {0, 1073733624},
29939 },
29940 },
29941 },
29942 {
29943 name: "MULLW",
29944 argLen: 2,
29945 commutative: true,
29946 asm: ppc64.AMULLW,
29947 reg: regInfo{
29948 inputs: []inputInfo{
29949 {0, 1073733630},
29950 {1, 1073733630},
29951 },
29952 outputs: []outputInfo{
29953 {0, 1073733624},
29954 },
29955 },
29956 },
29957 {
29958 name: "MULLDconst",
29959 auxType: auxInt32,
29960 argLen: 1,
29961 asm: ppc64.AMULLD,
29962 reg: regInfo{
29963 inputs: []inputInfo{
29964 {0, 1073733630},
29965 },
29966 outputs: []outputInfo{
29967 {0, 1073733624},
29968 },
29969 },
29970 },
29971 {
29972 name: "MULLWconst",
29973 auxType: auxInt32,
29974 argLen: 1,
29975 asm: ppc64.AMULLW,
29976 reg: regInfo{
29977 inputs: []inputInfo{
29978 {0, 1073733630},
29979 },
29980 outputs: []outputInfo{
29981 {0, 1073733624},
29982 },
29983 },
29984 },
29985 {
29986 name: "MADDLD",
29987 argLen: 3,
29988 asm: ppc64.AMADDLD,
29989 reg: regInfo{
29990 inputs: []inputInfo{
29991 {0, 1073733630},
29992 {1, 1073733630},
29993 {2, 1073733630},
29994 },
29995 outputs: []outputInfo{
29996 {0, 1073733624},
29997 },
29998 },
29999 },
30000 {
30001 name: "MULHD",
30002 argLen: 2,
30003 commutative: true,
30004 asm: ppc64.AMULHD,
30005 reg: regInfo{
30006 inputs: []inputInfo{
30007 {0, 1073733630},
30008 {1, 1073733630},
30009 },
30010 outputs: []outputInfo{
30011 {0, 1073733624},
30012 },
30013 },
30014 },
30015 {
30016 name: "MULHW",
30017 argLen: 2,
30018 commutative: true,
30019 asm: ppc64.AMULHW,
30020 reg: regInfo{
30021 inputs: []inputInfo{
30022 {0, 1073733630},
30023 {1, 1073733630},
30024 },
30025 outputs: []outputInfo{
30026 {0, 1073733624},
30027 },
30028 },
30029 },
30030 {
30031 name: "MULHDU",
30032 argLen: 2,
30033 commutative: true,
30034 asm: ppc64.AMULHDU,
30035 reg: regInfo{
30036 inputs: []inputInfo{
30037 {0, 1073733630},
30038 {1, 1073733630},
30039 },
30040 outputs: []outputInfo{
30041 {0, 1073733624},
30042 },
30043 },
30044 },
30045 {
30046 name: "MULHDUCC",
30047 argLen: 2,
30048 commutative: true,
30049 asm: ppc64.AMULHDUCC,
30050 reg: regInfo{
30051 inputs: []inputInfo{
30052 {0, 1073733630},
30053 {1, 1073733630},
30054 },
30055 outputs: []outputInfo{
30056 {0, 1073733624},
30057 },
30058 },
30059 },
30060 {
30061 name: "MULHWU",
30062 argLen: 2,
30063 commutative: true,
30064 asm: ppc64.AMULHWU,
30065 reg: regInfo{
30066 inputs: []inputInfo{
30067 {0, 1073733630},
30068 {1, 1073733630},
30069 },
30070 outputs: []outputInfo{
30071 {0, 1073733624},
30072 },
30073 },
30074 },
30075 {
30076 name: "FMUL",
30077 argLen: 2,
30078 commutative: true,
30079 asm: ppc64.AFMUL,
30080 reg: regInfo{
30081 inputs: []inputInfo{
30082 {0, 9223372032559808512},
30083 {1, 9223372032559808512},
30084 },
30085 outputs: []outputInfo{
30086 {0, 9223372032559808512},
30087 },
30088 },
30089 },
30090 {
30091 name: "FMULS",
30092 argLen: 2,
30093 commutative: true,
30094 asm: ppc64.AFMULS,
30095 reg: regInfo{
30096 inputs: []inputInfo{
30097 {0, 9223372032559808512},
30098 {1, 9223372032559808512},
30099 },
30100 outputs: []outputInfo{
30101 {0, 9223372032559808512},
30102 },
30103 },
30104 },
30105 {
30106 name: "FMADD",
30107 argLen: 3,
30108 asm: ppc64.AFMADD,
30109 reg: regInfo{
30110 inputs: []inputInfo{
30111 {0, 9223372032559808512},
30112 {1, 9223372032559808512},
30113 {2, 9223372032559808512},
30114 },
30115 outputs: []outputInfo{
30116 {0, 9223372032559808512},
30117 },
30118 },
30119 },
30120 {
30121 name: "FMADDS",
30122 argLen: 3,
30123 asm: ppc64.AFMADDS,
30124 reg: regInfo{
30125 inputs: []inputInfo{
30126 {0, 9223372032559808512},
30127 {1, 9223372032559808512},
30128 {2, 9223372032559808512},
30129 },
30130 outputs: []outputInfo{
30131 {0, 9223372032559808512},
30132 },
30133 },
30134 },
30135 {
30136 name: "FMSUB",
30137 argLen: 3,
30138 asm: ppc64.AFMSUB,
30139 reg: regInfo{
30140 inputs: []inputInfo{
30141 {0, 9223372032559808512},
30142 {1, 9223372032559808512},
30143 {2, 9223372032559808512},
30144 },
30145 outputs: []outputInfo{
30146 {0, 9223372032559808512},
30147 },
30148 },
30149 },
30150 {
30151 name: "FMSUBS",
30152 argLen: 3,
30153 asm: ppc64.AFMSUBS,
30154 reg: regInfo{
30155 inputs: []inputInfo{
30156 {0, 9223372032559808512},
30157 {1, 9223372032559808512},
30158 {2, 9223372032559808512},
30159 },
30160 outputs: []outputInfo{
30161 {0, 9223372032559808512},
30162 },
30163 },
30164 },
30165 {
30166 name: "SRAD",
30167 argLen: 2,
30168 asm: ppc64.ASRAD,
30169 reg: regInfo{
30170 inputs: []inputInfo{
30171 {0, 1073733630},
30172 {1, 1073733630},
30173 },
30174 clobbers: 9223372036854775808,
30175 outputs: []outputInfo{
30176 {0, 1073733624},
30177 },
30178 },
30179 },
30180 {
30181 name: "SRAW",
30182 argLen: 2,
30183 asm: ppc64.ASRAW,
30184 reg: regInfo{
30185 inputs: []inputInfo{
30186 {0, 1073733630},
30187 {1, 1073733630},
30188 },
30189 clobbers: 9223372036854775808,
30190 outputs: []outputInfo{
30191 {0, 1073733624},
30192 },
30193 },
30194 },
30195 {
30196 name: "SRD",
30197 argLen: 2,
30198 asm: ppc64.ASRD,
30199 reg: regInfo{
30200 inputs: []inputInfo{
30201 {0, 1073733630},
30202 {1, 1073733630},
30203 },
30204 outputs: []outputInfo{
30205 {0, 1073733624},
30206 },
30207 },
30208 },
30209 {
30210 name: "SRW",
30211 argLen: 2,
30212 asm: ppc64.ASRW,
30213 reg: regInfo{
30214 inputs: []inputInfo{
30215 {0, 1073733630},
30216 {1, 1073733630},
30217 },
30218 outputs: []outputInfo{
30219 {0, 1073733624},
30220 },
30221 },
30222 },
30223 {
30224 name: "SLD",
30225 argLen: 2,
30226 asm: ppc64.ASLD,
30227 reg: regInfo{
30228 inputs: []inputInfo{
30229 {0, 1073733630},
30230 {1, 1073733630},
30231 },
30232 outputs: []outputInfo{
30233 {0, 1073733624},
30234 },
30235 },
30236 },
30237 {
30238 name: "SLW",
30239 argLen: 2,
30240 asm: ppc64.ASLW,
30241 reg: regInfo{
30242 inputs: []inputInfo{
30243 {0, 1073733630},
30244 {1, 1073733630},
30245 },
30246 outputs: []outputInfo{
30247 {0, 1073733624},
30248 },
30249 },
30250 },
30251 {
30252 name: "ROTL",
30253 argLen: 2,
30254 asm: ppc64.AROTL,
30255 reg: regInfo{
30256 inputs: []inputInfo{
30257 {0, 1073733630},
30258 {1, 1073733630},
30259 },
30260 outputs: []outputInfo{
30261 {0, 1073733624},
30262 },
30263 },
30264 },
30265 {
30266 name: "ROTLW",
30267 argLen: 2,
30268 asm: ppc64.AROTLW,
30269 reg: regInfo{
30270 inputs: []inputInfo{
30271 {0, 1073733630},
30272 {1, 1073733630},
30273 },
30274 outputs: []outputInfo{
30275 {0, 1073733624},
30276 },
30277 },
30278 },
30279 {
30280 name: "CLRLSLWI",
30281 auxType: auxInt32,
30282 argLen: 1,
30283 asm: ppc64.ACLRLSLWI,
30284 reg: regInfo{
30285 inputs: []inputInfo{
30286 {0, 1073733630},
30287 },
30288 outputs: []outputInfo{
30289 {0, 1073733624},
30290 },
30291 },
30292 },
30293 {
30294 name: "CLRLSLDI",
30295 auxType: auxInt32,
30296 argLen: 1,
30297 asm: ppc64.ACLRLSLDI,
30298 reg: regInfo{
30299 inputs: []inputInfo{
30300 {0, 1073733630},
30301 },
30302 outputs: []outputInfo{
30303 {0, 1073733624},
30304 },
30305 },
30306 },
30307 {
30308 name: "ADDC",
30309 argLen: 2,
30310 commutative: true,
30311 asm: ppc64.AADDC,
30312 reg: regInfo{
30313 inputs: []inputInfo{
30314 {0, 1073733630},
30315 {1, 1073733630},
30316 },
30317 clobbers: 9223372036854775808,
30318 outputs: []outputInfo{
30319 {1, 9223372036854775808},
30320 {0, 1073733624},
30321 },
30322 },
30323 },
30324 {
30325 name: "SUBC",
30326 argLen: 2,
30327 asm: ppc64.ASUBC,
30328 reg: regInfo{
30329 inputs: []inputInfo{
30330 {0, 1073733630},
30331 {1, 1073733630},
30332 },
30333 clobbers: 9223372036854775808,
30334 outputs: []outputInfo{
30335 {1, 9223372036854775808},
30336 {0, 1073733624},
30337 },
30338 },
30339 },
30340 {
30341 name: "ADDCconst",
30342 auxType: auxInt64,
30343 argLen: 1,
30344 asm: ppc64.AADDC,
30345 reg: regInfo{
30346 inputs: []inputInfo{
30347 {0, 1073733630},
30348 },
30349 outputs: []outputInfo{
30350 {1, 9223372036854775808},
30351 {0, 1073733624},
30352 },
30353 },
30354 },
30355 {
30356 name: "SUBCconst",
30357 auxType: auxInt64,
30358 argLen: 1,
30359 asm: ppc64.ASUBC,
30360 reg: regInfo{
30361 inputs: []inputInfo{
30362 {0, 1073733630},
30363 },
30364 outputs: []outputInfo{
30365 {1, 9223372036854775808},
30366 {0, 1073733624},
30367 },
30368 },
30369 },
30370 {
30371 name: "ADDE",
30372 argLen: 3,
30373 commutative: true,
30374 asm: ppc64.AADDE,
30375 reg: regInfo{
30376 inputs: []inputInfo{
30377 {2, 9223372036854775808},
30378 {0, 1073733630},
30379 {1, 1073733630},
30380 },
30381 clobbers: 9223372036854775808,
30382 outputs: []outputInfo{
30383 {1, 9223372036854775808},
30384 {0, 1073733624},
30385 },
30386 },
30387 },
30388 {
30389 name: "ADDZE",
30390 argLen: 2,
30391 asm: ppc64.AADDZE,
30392 reg: regInfo{
30393 inputs: []inputInfo{
30394 {1, 9223372036854775808},
30395 {0, 1073733630},
30396 },
30397 clobbers: 9223372036854775808,
30398 outputs: []outputInfo{
30399 {1, 9223372036854775808},
30400 {0, 1073733624},
30401 },
30402 },
30403 },
30404 {
30405 name: "SUBE",
30406 argLen: 3,
30407 asm: ppc64.ASUBE,
30408 reg: regInfo{
30409 inputs: []inputInfo{
30410 {2, 9223372036854775808},
30411 {0, 1073733630},
30412 {1, 1073733630},
30413 },
30414 clobbers: 9223372036854775808,
30415 outputs: []outputInfo{
30416 {1, 9223372036854775808},
30417 {0, 1073733624},
30418 },
30419 },
30420 },
30421 {
30422 name: "ADDZEzero",
30423 argLen: 1,
30424 asm: ppc64.AADDZE,
30425 reg: regInfo{
30426 inputs: []inputInfo{
30427 {0, 9223372036854775808},
30428 },
30429 clobbers: 9223372036854775808,
30430 outputs: []outputInfo{
30431 {0, 1073733624},
30432 },
30433 },
30434 },
30435 {
30436 name: "SUBZEzero",
30437 argLen: 1,
30438 asm: ppc64.ASUBZE,
30439 reg: regInfo{
30440 inputs: []inputInfo{
30441 {0, 9223372036854775808},
30442 },
30443 clobbers: 9223372036854775808,
30444 outputs: []outputInfo{
30445 {0, 1073733624},
30446 },
30447 },
30448 },
30449 {
30450 name: "SRADconst",
30451 auxType: auxInt64,
30452 argLen: 1,
30453 asm: ppc64.ASRAD,
30454 reg: regInfo{
30455 inputs: []inputInfo{
30456 {0, 1073733630},
30457 },
30458 clobbers: 9223372036854775808,
30459 outputs: []outputInfo{
30460 {0, 1073733624},
30461 },
30462 },
30463 },
30464 {
30465 name: "SRAWconst",
30466 auxType: auxInt64,
30467 argLen: 1,
30468 asm: ppc64.ASRAW,
30469 reg: regInfo{
30470 inputs: []inputInfo{
30471 {0, 1073733630},
30472 },
30473 clobbers: 9223372036854775808,
30474 outputs: []outputInfo{
30475 {0, 1073733624},
30476 },
30477 },
30478 },
30479 {
30480 name: "SRDconst",
30481 auxType: auxInt64,
30482 argLen: 1,
30483 asm: ppc64.ASRD,
30484 reg: regInfo{
30485 inputs: []inputInfo{
30486 {0, 1073733630},
30487 },
30488 outputs: []outputInfo{
30489 {0, 1073733624},
30490 },
30491 },
30492 },
30493 {
30494 name: "SRWconst",
30495 auxType: auxInt64,
30496 argLen: 1,
30497 asm: ppc64.ASRW,
30498 reg: regInfo{
30499 inputs: []inputInfo{
30500 {0, 1073733630},
30501 },
30502 outputs: []outputInfo{
30503 {0, 1073733624},
30504 },
30505 },
30506 },
30507 {
30508 name: "SLDconst",
30509 auxType: auxInt64,
30510 argLen: 1,
30511 asm: ppc64.ASLD,
30512 reg: regInfo{
30513 inputs: []inputInfo{
30514 {0, 1073733630},
30515 },
30516 outputs: []outputInfo{
30517 {0, 1073733624},
30518 },
30519 },
30520 },
30521 {
30522 name: "SLWconst",
30523 auxType: auxInt64,
30524 argLen: 1,
30525 asm: ppc64.ASLW,
30526 reg: regInfo{
30527 inputs: []inputInfo{
30528 {0, 1073733630},
30529 },
30530 outputs: []outputInfo{
30531 {0, 1073733624},
30532 },
30533 },
30534 },
30535 {
30536 name: "ROTLconst",
30537 auxType: auxInt64,
30538 argLen: 1,
30539 asm: ppc64.AROTL,
30540 reg: regInfo{
30541 inputs: []inputInfo{
30542 {0, 1073733630},
30543 },
30544 outputs: []outputInfo{
30545 {0, 1073733624},
30546 },
30547 },
30548 },
30549 {
30550 name: "ROTLWconst",
30551 auxType: auxInt64,
30552 argLen: 1,
30553 asm: ppc64.AROTLW,
30554 reg: regInfo{
30555 inputs: []inputInfo{
30556 {0, 1073733630},
30557 },
30558 outputs: []outputInfo{
30559 {0, 1073733624},
30560 },
30561 },
30562 },
30563 {
30564 name: "EXTSWSLconst",
30565 auxType: auxInt64,
30566 argLen: 1,
30567 asm: ppc64.AEXTSWSLI,
30568 reg: regInfo{
30569 inputs: []inputInfo{
30570 {0, 1073733630},
30571 },
30572 outputs: []outputInfo{
30573 {0, 1073733624},
30574 },
30575 },
30576 },
30577 {
30578 name: "RLWINM",
30579 auxType: auxInt64,
30580 argLen: 1,
30581 asm: ppc64.ARLWNM,
30582 reg: regInfo{
30583 inputs: []inputInfo{
30584 {0, 1073733630},
30585 },
30586 outputs: []outputInfo{
30587 {0, 1073733624},
30588 },
30589 },
30590 },
30591 {
30592 name: "RLWNM",
30593 auxType: auxInt64,
30594 argLen: 2,
30595 asm: ppc64.ARLWNM,
30596 reg: regInfo{
30597 inputs: []inputInfo{
30598 {0, 1073733630},
30599 {1, 1073733630},
30600 },
30601 outputs: []outputInfo{
30602 {0, 1073733624},
30603 },
30604 },
30605 },
30606 {
30607 name: "RLWMI",
30608 auxType: auxInt64,
30609 argLen: 2,
30610 resultInArg0: true,
30611 asm: ppc64.ARLWMI,
30612 reg: regInfo{
30613 inputs: []inputInfo{
30614 {0, 1073733624},
30615 {1, 1073733630},
30616 },
30617 outputs: []outputInfo{
30618 {0, 1073733624},
30619 },
30620 },
30621 },
30622 {
30623 name: "RLDICL",
30624 auxType: auxInt64,
30625 argLen: 1,
30626 asm: ppc64.ARLDICL,
30627 reg: regInfo{
30628 inputs: []inputInfo{
30629 {0, 1073733630},
30630 },
30631 outputs: []outputInfo{
30632 {0, 1073733624},
30633 },
30634 },
30635 },
30636 {
30637 name: "RLDICLCC",
30638 auxType: auxInt64,
30639 argLen: 1,
30640 asm: ppc64.ARLDICLCC,
30641 reg: regInfo{
30642 inputs: []inputInfo{
30643 {0, 1073733630},
30644 },
30645 outputs: []outputInfo{
30646 {0, 1073733624},
30647 },
30648 },
30649 },
30650 {
30651 name: "RLDICR",
30652 auxType: auxInt64,
30653 argLen: 1,
30654 asm: ppc64.ARLDICR,
30655 reg: regInfo{
30656 inputs: []inputInfo{
30657 {0, 1073733630},
30658 },
30659 outputs: []outputInfo{
30660 {0, 1073733624},
30661 },
30662 },
30663 },
30664 {
30665 name: "CNTLZD",
30666 argLen: 1,
30667 asm: ppc64.ACNTLZD,
30668 reg: regInfo{
30669 inputs: []inputInfo{
30670 {0, 1073733630},
30671 },
30672 outputs: []outputInfo{
30673 {0, 1073733624},
30674 },
30675 },
30676 },
30677 {
30678 name: "CNTLZDCC",
30679 argLen: 1,
30680 asm: ppc64.ACNTLZDCC,
30681 reg: regInfo{
30682 inputs: []inputInfo{
30683 {0, 1073733630},
30684 },
30685 outputs: []outputInfo{
30686 {0, 1073733624},
30687 },
30688 },
30689 },
30690 {
30691 name: "CNTLZW",
30692 argLen: 1,
30693 asm: ppc64.ACNTLZW,
30694 reg: regInfo{
30695 inputs: []inputInfo{
30696 {0, 1073733630},
30697 },
30698 outputs: []outputInfo{
30699 {0, 1073733624},
30700 },
30701 },
30702 },
30703 {
30704 name: "CNTTZD",
30705 argLen: 1,
30706 asm: ppc64.ACNTTZD,
30707 reg: regInfo{
30708 inputs: []inputInfo{
30709 {0, 1073733630},
30710 },
30711 outputs: []outputInfo{
30712 {0, 1073733624},
30713 },
30714 },
30715 },
30716 {
30717 name: "CNTTZW",
30718 argLen: 1,
30719 asm: ppc64.ACNTTZW,
30720 reg: regInfo{
30721 inputs: []inputInfo{
30722 {0, 1073733630},
30723 },
30724 outputs: []outputInfo{
30725 {0, 1073733624},
30726 },
30727 },
30728 },
30729 {
30730 name: "POPCNTD",
30731 argLen: 1,
30732 asm: ppc64.APOPCNTD,
30733 reg: regInfo{
30734 inputs: []inputInfo{
30735 {0, 1073733630},
30736 },
30737 outputs: []outputInfo{
30738 {0, 1073733624},
30739 },
30740 },
30741 },
30742 {
30743 name: "POPCNTW",
30744 argLen: 1,
30745 asm: ppc64.APOPCNTW,
30746 reg: regInfo{
30747 inputs: []inputInfo{
30748 {0, 1073733630},
30749 },
30750 outputs: []outputInfo{
30751 {0, 1073733624},
30752 },
30753 },
30754 },
30755 {
30756 name: "POPCNTB",
30757 argLen: 1,
30758 asm: ppc64.APOPCNTB,
30759 reg: regInfo{
30760 inputs: []inputInfo{
30761 {0, 1073733630},
30762 },
30763 outputs: []outputInfo{
30764 {0, 1073733624},
30765 },
30766 },
30767 },
30768 {
30769 name: "FDIV",
30770 argLen: 2,
30771 asm: ppc64.AFDIV,
30772 reg: regInfo{
30773 inputs: []inputInfo{
30774 {0, 9223372032559808512},
30775 {1, 9223372032559808512},
30776 },
30777 outputs: []outputInfo{
30778 {0, 9223372032559808512},
30779 },
30780 },
30781 },
30782 {
30783 name: "FDIVS",
30784 argLen: 2,
30785 asm: ppc64.AFDIVS,
30786 reg: regInfo{
30787 inputs: []inputInfo{
30788 {0, 9223372032559808512},
30789 {1, 9223372032559808512},
30790 },
30791 outputs: []outputInfo{
30792 {0, 9223372032559808512},
30793 },
30794 },
30795 },
30796 {
30797 name: "DIVD",
30798 argLen: 2,
30799 asm: ppc64.ADIVD,
30800 reg: regInfo{
30801 inputs: []inputInfo{
30802 {0, 1073733630},
30803 {1, 1073733630},
30804 },
30805 outputs: []outputInfo{
30806 {0, 1073733624},
30807 },
30808 },
30809 },
30810 {
30811 name: "DIVW",
30812 argLen: 2,
30813 asm: ppc64.ADIVW,
30814 reg: regInfo{
30815 inputs: []inputInfo{
30816 {0, 1073733630},
30817 {1, 1073733630},
30818 },
30819 outputs: []outputInfo{
30820 {0, 1073733624},
30821 },
30822 },
30823 },
30824 {
30825 name: "DIVDU",
30826 argLen: 2,
30827 asm: ppc64.ADIVDU,
30828 reg: regInfo{
30829 inputs: []inputInfo{
30830 {0, 1073733630},
30831 {1, 1073733630},
30832 },
30833 outputs: []outputInfo{
30834 {0, 1073733624},
30835 },
30836 },
30837 },
30838 {
30839 name: "DIVWU",
30840 argLen: 2,
30841 asm: ppc64.ADIVWU,
30842 reg: regInfo{
30843 inputs: []inputInfo{
30844 {0, 1073733630},
30845 {1, 1073733630},
30846 },
30847 outputs: []outputInfo{
30848 {0, 1073733624},
30849 },
30850 },
30851 },
30852 {
30853 name: "MODUD",
30854 argLen: 2,
30855 asm: ppc64.AMODUD,
30856 reg: regInfo{
30857 inputs: []inputInfo{
30858 {0, 1073733630},
30859 {1, 1073733630},
30860 },
30861 outputs: []outputInfo{
30862 {0, 1073733624},
30863 },
30864 },
30865 },
30866 {
30867 name: "MODSD",
30868 argLen: 2,
30869 asm: ppc64.AMODSD,
30870 reg: regInfo{
30871 inputs: []inputInfo{
30872 {0, 1073733630},
30873 {1, 1073733630},
30874 },
30875 outputs: []outputInfo{
30876 {0, 1073733624},
30877 },
30878 },
30879 },
30880 {
30881 name: "MODUW",
30882 argLen: 2,
30883 asm: ppc64.AMODUW,
30884 reg: regInfo{
30885 inputs: []inputInfo{
30886 {0, 1073733630},
30887 {1, 1073733630},
30888 },
30889 outputs: []outputInfo{
30890 {0, 1073733624},
30891 },
30892 },
30893 },
30894 {
30895 name: "MODSW",
30896 argLen: 2,
30897 asm: ppc64.AMODSW,
30898 reg: regInfo{
30899 inputs: []inputInfo{
30900 {0, 1073733630},
30901 {1, 1073733630},
30902 },
30903 outputs: []outputInfo{
30904 {0, 1073733624},
30905 },
30906 },
30907 },
30908 {
30909 name: "FCTIDZ",
30910 argLen: 1,
30911 asm: ppc64.AFCTIDZ,
30912 reg: regInfo{
30913 inputs: []inputInfo{
30914 {0, 9223372032559808512},
30915 },
30916 outputs: []outputInfo{
30917 {0, 9223372032559808512},
30918 },
30919 },
30920 },
30921 {
30922 name: "FCTIWZ",
30923 argLen: 1,
30924 asm: ppc64.AFCTIWZ,
30925 reg: regInfo{
30926 inputs: []inputInfo{
30927 {0, 9223372032559808512},
30928 },
30929 outputs: []outputInfo{
30930 {0, 9223372032559808512},
30931 },
30932 },
30933 },
30934 {
30935 name: "FCFID",
30936 argLen: 1,
30937 asm: ppc64.AFCFID,
30938 reg: regInfo{
30939 inputs: []inputInfo{
30940 {0, 9223372032559808512},
30941 },
30942 outputs: []outputInfo{
30943 {0, 9223372032559808512},
30944 },
30945 },
30946 },
30947 {
30948 name: "FCFIDS",
30949 argLen: 1,
30950 asm: ppc64.AFCFIDS,
30951 reg: regInfo{
30952 inputs: []inputInfo{
30953 {0, 9223372032559808512},
30954 },
30955 outputs: []outputInfo{
30956 {0, 9223372032559808512},
30957 },
30958 },
30959 },
30960 {
30961 name: "FRSP",
30962 argLen: 1,
30963 asm: ppc64.AFRSP,
30964 reg: regInfo{
30965 inputs: []inputInfo{
30966 {0, 9223372032559808512},
30967 },
30968 outputs: []outputInfo{
30969 {0, 9223372032559808512},
30970 },
30971 },
30972 },
30973 {
30974 name: "MFVSRD",
30975 argLen: 1,
30976 asm: ppc64.AMFVSRD,
30977 reg: regInfo{
30978 inputs: []inputInfo{
30979 {0, 9223372032559808512},
30980 },
30981 outputs: []outputInfo{
30982 {0, 1073733624},
30983 },
30984 },
30985 },
30986 {
30987 name: "MTVSRD",
30988 argLen: 1,
30989 asm: ppc64.AMTVSRD,
30990 reg: regInfo{
30991 inputs: []inputInfo{
30992 {0, 1073733624},
30993 },
30994 outputs: []outputInfo{
30995 {0, 9223372032559808512},
30996 },
30997 },
30998 },
30999 {
31000 name: "AND",
31001 argLen: 2,
31002 commutative: true,
31003 asm: ppc64.AAND,
31004 reg: regInfo{
31005 inputs: []inputInfo{
31006 {0, 1073733630},
31007 {1, 1073733630},
31008 },
31009 outputs: []outputInfo{
31010 {0, 1073733624},
31011 },
31012 },
31013 },
31014 {
31015 name: "ANDN",
31016 argLen: 2,
31017 asm: ppc64.AANDN,
31018 reg: regInfo{
31019 inputs: []inputInfo{
31020 {0, 1073733630},
31021 {1, 1073733630},
31022 },
31023 outputs: []outputInfo{
31024 {0, 1073733624},
31025 },
31026 },
31027 },
31028 {
31029 name: "ANDNCC",
31030 argLen: 2,
31031 asm: ppc64.AANDNCC,
31032 reg: regInfo{
31033 inputs: []inputInfo{
31034 {0, 1073733630},
31035 {1, 1073733630},
31036 },
31037 outputs: []outputInfo{
31038 {0, 1073733624},
31039 },
31040 },
31041 },
31042 {
31043 name: "ANDCC",
31044 argLen: 2,
31045 commutative: true,
31046 asm: ppc64.AANDCC,
31047 reg: regInfo{
31048 inputs: []inputInfo{
31049 {0, 1073733630},
31050 {1, 1073733630},
31051 },
31052 outputs: []outputInfo{
31053 {0, 1073733624},
31054 },
31055 },
31056 },
31057 {
31058 name: "OR",
31059 argLen: 2,
31060 commutative: true,
31061 asm: ppc64.AOR,
31062 reg: regInfo{
31063 inputs: []inputInfo{
31064 {0, 1073733630},
31065 {1, 1073733630},
31066 },
31067 outputs: []outputInfo{
31068 {0, 1073733624},
31069 },
31070 },
31071 },
31072 {
31073 name: "ORN",
31074 argLen: 2,
31075 asm: ppc64.AORN,
31076 reg: regInfo{
31077 inputs: []inputInfo{
31078 {0, 1073733630},
31079 {1, 1073733630},
31080 },
31081 outputs: []outputInfo{
31082 {0, 1073733624},
31083 },
31084 },
31085 },
31086 {
31087 name: "ORCC",
31088 argLen: 2,
31089 commutative: true,
31090 asm: ppc64.AORCC,
31091 reg: regInfo{
31092 inputs: []inputInfo{
31093 {0, 1073733630},
31094 {1, 1073733630},
31095 },
31096 outputs: []outputInfo{
31097 {0, 1073733624},
31098 },
31099 },
31100 },
31101 {
31102 name: "NOR",
31103 argLen: 2,
31104 commutative: true,
31105 asm: ppc64.ANOR,
31106 reg: regInfo{
31107 inputs: []inputInfo{
31108 {0, 1073733630},
31109 {1, 1073733630},
31110 },
31111 outputs: []outputInfo{
31112 {0, 1073733624},
31113 },
31114 },
31115 },
31116 {
31117 name: "NORCC",
31118 argLen: 2,
31119 commutative: true,
31120 asm: ppc64.ANORCC,
31121 reg: regInfo{
31122 inputs: []inputInfo{
31123 {0, 1073733630},
31124 {1, 1073733630},
31125 },
31126 outputs: []outputInfo{
31127 {0, 1073733624},
31128 },
31129 },
31130 },
31131 {
31132 name: "XOR",
31133 argLen: 2,
31134 commutative: true,
31135 asm: ppc64.AXOR,
31136 reg: regInfo{
31137 inputs: []inputInfo{
31138 {0, 1073733630},
31139 {1, 1073733630},
31140 },
31141 outputs: []outputInfo{
31142 {0, 1073733624},
31143 },
31144 },
31145 },
31146 {
31147 name: "XORCC",
31148 argLen: 2,
31149 commutative: true,
31150 asm: ppc64.AXORCC,
31151 reg: regInfo{
31152 inputs: []inputInfo{
31153 {0, 1073733630},
31154 {1, 1073733630},
31155 },
31156 outputs: []outputInfo{
31157 {0, 1073733624},
31158 },
31159 },
31160 },
31161 {
31162 name: "EQV",
31163 argLen: 2,
31164 commutative: true,
31165 asm: ppc64.AEQV,
31166 reg: regInfo{
31167 inputs: []inputInfo{
31168 {0, 1073733630},
31169 {1, 1073733630},
31170 },
31171 outputs: []outputInfo{
31172 {0, 1073733624},
31173 },
31174 },
31175 },
31176 {
31177 name: "NEG",
31178 argLen: 1,
31179 asm: ppc64.ANEG,
31180 reg: regInfo{
31181 inputs: []inputInfo{
31182 {0, 1073733630},
31183 },
31184 outputs: []outputInfo{
31185 {0, 1073733624},
31186 },
31187 },
31188 },
31189 {
31190 name: "NEGCC",
31191 argLen: 1,
31192 asm: ppc64.ANEGCC,
31193 reg: regInfo{
31194 inputs: []inputInfo{
31195 {0, 1073733630},
31196 },
31197 outputs: []outputInfo{
31198 {0, 1073733624},
31199 },
31200 },
31201 },
31202 {
31203 name: "BRD",
31204 argLen: 1,
31205 asm: ppc64.ABRD,
31206 reg: regInfo{
31207 inputs: []inputInfo{
31208 {0, 1073733630},
31209 },
31210 outputs: []outputInfo{
31211 {0, 1073733624},
31212 },
31213 },
31214 },
31215 {
31216 name: "BRW",
31217 argLen: 1,
31218 asm: ppc64.ABRW,
31219 reg: regInfo{
31220 inputs: []inputInfo{
31221 {0, 1073733630},
31222 },
31223 outputs: []outputInfo{
31224 {0, 1073733624},
31225 },
31226 },
31227 },
31228 {
31229 name: "BRH",
31230 argLen: 1,
31231 asm: ppc64.ABRH,
31232 reg: regInfo{
31233 inputs: []inputInfo{
31234 {0, 1073733630},
31235 },
31236 outputs: []outputInfo{
31237 {0, 1073733624},
31238 },
31239 },
31240 },
31241 {
31242 name: "FNEG",
31243 argLen: 1,
31244 asm: ppc64.AFNEG,
31245 reg: regInfo{
31246 inputs: []inputInfo{
31247 {0, 9223372032559808512},
31248 },
31249 outputs: []outputInfo{
31250 {0, 9223372032559808512},
31251 },
31252 },
31253 },
31254 {
31255 name: "FSQRT",
31256 argLen: 1,
31257 asm: ppc64.AFSQRT,
31258 reg: regInfo{
31259 inputs: []inputInfo{
31260 {0, 9223372032559808512},
31261 },
31262 outputs: []outputInfo{
31263 {0, 9223372032559808512},
31264 },
31265 },
31266 },
31267 {
31268 name: "FSQRTS",
31269 argLen: 1,
31270 asm: ppc64.AFSQRTS,
31271 reg: regInfo{
31272 inputs: []inputInfo{
31273 {0, 9223372032559808512},
31274 },
31275 outputs: []outputInfo{
31276 {0, 9223372032559808512},
31277 },
31278 },
31279 },
31280 {
31281 name: "FFLOOR",
31282 argLen: 1,
31283 asm: ppc64.AFRIM,
31284 reg: regInfo{
31285 inputs: []inputInfo{
31286 {0, 9223372032559808512},
31287 },
31288 outputs: []outputInfo{
31289 {0, 9223372032559808512},
31290 },
31291 },
31292 },
31293 {
31294 name: "FCEIL",
31295 argLen: 1,
31296 asm: ppc64.AFRIP,
31297 reg: regInfo{
31298 inputs: []inputInfo{
31299 {0, 9223372032559808512},
31300 },
31301 outputs: []outputInfo{
31302 {0, 9223372032559808512},
31303 },
31304 },
31305 },
31306 {
31307 name: "FTRUNC",
31308 argLen: 1,
31309 asm: ppc64.AFRIZ,
31310 reg: regInfo{
31311 inputs: []inputInfo{
31312 {0, 9223372032559808512},
31313 },
31314 outputs: []outputInfo{
31315 {0, 9223372032559808512},
31316 },
31317 },
31318 },
31319 {
31320 name: "FROUND",
31321 argLen: 1,
31322 asm: ppc64.AFRIN,
31323 reg: regInfo{
31324 inputs: []inputInfo{
31325 {0, 9223372032559808512},
31326 },
31327 outputs: []outputInfo{
31328 {0, 9223372032559808512},
31329 },
31330 },
31331 },
31332 {
31333 name: "FABS",
31334 argLen: 1,
31335 asm: ppc64.AFABS,
31336 reg: regInfo{
31337 inputs: []inputInfo{
31338 {0, 9223372032559808512},
31339 },
31340 outputs: []outputInfo{
31341 {0, 9223372032559808512},
31342 },
31343 },
31344 },
31345 {
31346 name: "FNABS",
31347 argLen: 1,
31348 asm: ppc64.AFNABS,
31349 reg: regInfo{
31350 inputs: []inputInfo{
31351 {0, 9223372032559808512},
31352 },
31353 outputs: []outputInfo{
31354 {0, 9223372032559808512},
31355 },
31356 },
31357 },
31358 {
31359 name: "FCPSGN",
31360 argLen: 2,
31361 asm: ppc64.AFCPSGN,
31362 reg: regInfo{
31363 inputs: []inputInfo{
31364 {0, 9223372032559808512},
31365 {1, 9223372032559808512},
31366 },
31367 outputs: []outputInfo{
31368 {0, 9223372032559808512},
31369 },
31370 },
31371 },
31372 {
31373 name: "ORconst",
31374 auxType: auxInt64,
31375 argLen: 1,
31376 asm: ppc64.AOR,
31377 reg: regInfo{
31378 inputs: []inputInfo{
31379 {0, 1073733630},
31380 },
31381 outputs: []outputInfo{
31382 {0, 1073733624},
31383 },
31384 },
31385 },
31386 {
31387 name: "XORconst",
31388 auxType: auxInt64,
31389 argLen: 1,
31390 asm: ppc64.AXOR,
31391 reg: regInfo{
31392 inputs: []inputInfo{
31393 {0, 1073733630},
31394 },
31395 outputs: []outputInfo{
31396 {0, 1073733624},
31397 },
31398 },
31399 },
31400 {
31401 name: "ANDCCconst",
31402 auxType: auxInt64,
31403 argLen: 1,
31404 asm: ppc64.AANDCC,
31405 reg: regInfo{
31406 inputs: []inputInfo{
31407 {0, 1073733630},
31408 },
31409 outputs: []outputInfo{
31410 {0, 1073733624},
31411 },
31412 },
31413 },
31414 {
31415 name: "ANDconst",
31416 auxType: auxInt64,
31417 argLen: 1,
31418 clobberFlags: true,
31419 asm: ppc64.AANDCC,
31420 reg: regInfo{
31421 inputs: []inputInfo{
31422 {0, 1073733630},
31423 },
31424 outputs: []outputInfo{
31425 {0, 1073733624},
31426 },
31427 },
31428 },
31429 {
31430 name: "MOVBreg",
31431 argLen: 1,
31432 asm: ppc64.AMOVB,
31433 reg: regInfo{
31434 inputs: []inputInfo{
31435 {0, 1073733630},
31436 },
31437 outputs: []outputInfo{
31438 {0, 1073733624},
31439 },
31440 },
31441 },
31442 {
31443 name: "MOVBZreg",
31444 argLen: 1,
31445 asm: ppc64.AMOVBZ,
31446 reg: regInfo{
31447 inputs: []inputInfo{
31448 {0, 1073733630},
31449 },
31450 outputs: []outputInfo{
31451 {0, 1073733624},
31452 },
31453 },
31454 },
31455 {
31456 name: "MOVHreg",
31457 argLen: 1,
31458 asm: ppc64.AMOVH,
31459 reg: regInfo{
31460 inputs: []inputInfo{
31461 {0, 1073733630},
31462 },
31463 outputs: []outputInfo{
31464 {0, 1073733624},
31465 },
31466 },
31467 },
31468 {
31469 name: "MOVHZreg",
31470 argLen: 1,
31471 asm: ppc64.AMOVHZ,
31472 reg: regInfo{
31473 inputs: []inputInfo{
31474 {0, 1073733630},
31475 },
31476 outputs: []outputInfo{
31477 {0, 1073733624},
31478 },
31479 },
31480 },
31481 {
31482 name: "MOVWreg",
31483 argLen: 1,
31484 asm: ppc64.AMOVW,
31485 reg: regInfo{
31486 inputs: []inputInfo{
31487 {0, 1073733630},
31488 },
31489 outputs: []outputInfo{
31490 {0, 1073733624},
31491 },
31492 },
31493 },
31494 {
31495 name: "MOVWZreg",
31496 argLen: 1,
31497 asm: ppc64.AMOVWZ,
31498 reg: regInfo{
31499 inputs: []inputInfo{
31500 {0, 1073733630},
31501 },
31502 outputs: []outputInfo{
31503 {0, 1073733624},
31504 },
31505 },
31506 },
31507 {
31508 name: "MOVBZload",
31509 auxType: auxSymOff,
31510 argLen: 2,
31511 faultOnNilArg0: true,
31512 symEffect: SymRead,
31513 asm: ppc64.AMOVBZ,
31514 reg: regInfo{
31515 inputs: []inputInfo{
31516 {0, 1073733630},
31517 },
31518 outputs: []outputInfo{
31519 {0, 1073733624},
31520 },
31521 },
31522 },
31523 {
31524 name: "MOVHload",
31525 auxType: auxSymOff,
31526 argLen: 2,
31527 faultOnNilArg0: true,
31528 symEffect: SymRead,
31529 asm: ppc64.AMOVH,
31530 reg: regInfo{
31531 inputs: []inputInfo{
31532 {0, 1073733630},
31533 },
31534 outputs: []outputInfo{
31535 {0, 1073733624},
31536 },
31537 },
31538 },
31539 {
31540 name: "MOVHZload",
31541 auxType: auxSymOff,
31542 argLen: 2,
31543 faultOnNilArg0: true,
31544 symEffect: SymRead,
31545 asm: ppc64.AMOVHZ,
31546 reg: regInfo{
31547 inputs: []inputInfo{
31548 {0, 1073733630},
31549 },
31550 outputs: []outputInfo{
31551 {0, 1073733624},
31552 },
31553 },
31554 },
31555 {
31556 name: "MOVWload",
31557 auxType: auxSymOff,
31558 argLen: 2,
31559 faultOnNilArg0: true,
31560 symEffect: SymRead,
31561 asm: ppc64.AMOVW,
31562 reg: regInfo{
31563 inputs: []inputInfo{
31564 {0, 1073733630},
31565 },
31566 outputs: []outputInfo{
31567 {0, 1073733624},
31568 },
31569 },
31570 },
31571 {
31572 name: "MOVWZload",
31573 auxType: auxSymOff,
31574 argLen: 2,
31575 faultOnNilArg0: true,
31576 symEffect: SymRead,
31577 asm: ppc64.AMOVWZ,
31578 reg: regInfo{
31579 inputs: []inputInfo{
31580 {0, 1073733630},
31581 },
31582 outputs: []outputInfo{
31583 {0, 1073733624},
31584 },
31585 },
31586 },
31587 {
31588 name: "MOVDload",
31589 auxType: auxSymOff,
31590 argLen: 2,
31591 faultOnNilArg0: true,
31592 symEffect: SymRead,
31593 asm: ppc64.AMOVD,
31594 reg: regInfo{
31595 inputs: []inputInfo{
31596 {0, 1073733630},
31597 },
31598 outputs: []outputInfo{
31599 {0, 1073733624},
31600 },
31601 },
31602 },
31603 {
31604 name: "MOVDBRload",
31605 argLen: 2,
31606 faultOnNilArg0: true,
31607 asm: ppc64.AMOVDBR,
31608 reg: regInfo{
31609 inputs: []inputInfo{
31610 {0, 1073733630},
31611 },
31612 outputs: []outputInfo{
31613 {0, 1073733624},
31614 },
31615 },
31616 },
31617 {
31618 name: "MOVWBRload",
31619 argLen: 2,
31620 faultOnNilArg0: true,
31621 asm: ppc64.AMOVWBR,
31622 reg: regInfo{
31623 inputs: []inputInfo{
31624 {0, 1073733630},
31625 },
31626 outputs: []outputInfo{
31627 {0, 1073733624},
31628 },
31629 },
31630 },
31631 {
31632 name: "MOVHBRload",
31633 argLen: 2,
31634 faultOnNilArg0: true,
31635 asm: ppc64.AMOVHBR,
31636 reg: regInfo{
31637 inputs: []inputInfo{
31638 {0, 1073733630},
31639 },
31640 outputs: []outputInfo{
31641 {0, 1073733624},
31642 },
31643 },
31644 },
31645 {
31646 name: "MOVBZloadidx",
31647 argLen: 3,
31648 asm: ppc64.AMOVBZ,
31649 reg: regInfo{
31650 inputs: []inputInfo{
31651 {1, 1073733624},
31652 {0, 1073733630},
31653 },
31654 outputs: []outputInfo{
31655 {0, 1073733624},
31656 },
31657 },
31658 },
31659 {
31660 name: "MOVHloadidx",
31661 argLen: 3,
31662 asm: ppc64.AMOVH,
31663 reg: regInfo{
31664 inputs: []inputInfo{
31665 {1, 1073733624},
31666 {0, 1073733630},
31667 },
31668 outputs: []outputInfo{
31669 {0, 1073733624},
31670 },
31671 },
31672 },
31673 {
31674 name: "MOVHZloadidx",
31675 argLen: 3,
31676 asm: ppc64.AMOVHZ,
31677 reg: regInfo{
31678 inputs: []inputInfo{
31679 {1, 1073733624},
31680 {0, 1073733630},
31681 },
31682 outputs: []outputInfo{
31683 {0, 1073733624},
31684 },
31685 },
31686 },
31687 {
31688 name: "MOVWloadidx",
31689 argLen: 3,
31690 asm: ppc64.AMOVW,
31691 reg: regInfo{
31692 inputs: []inputInfo{
31693 {1, 1073733624},
31694 {0, 1073733630},
31695 },
31696 outputs: []outputInfo{
31697 {0, 1073733624},
31698 },
31699 },
31700 },
31701 {
31702 name: "MOVWZloadidx",
31703 argLen: 3,
31704 asm: ppc64.AMOVWZ,
31705 reg: regInfo{
31706 inputs: []inputInfo{
31707 {1, 1073733624},
31708 {0, 1073733630},
31709 },
31710 outputs: []outputInfo{
31711 {0, 1073733624},
31712 },
31713 },
31714 },
31715 {
31716 name: "MOVDloadidx",
31717 argLen: 3,
31718 asm: ppc64.AMOVD,
31719 reg: regInfo{
31720 inputs: []inputInfo{
31721 {1, 1073733624},
31722 {0, 1073733630},
31723 },
31724 outputs: []outputInfo{
31725 {0, 1073733624},
31726 },
31727 },
31728 },
31729 {
31730 name: "MOVHBRloadidx",
31731 argLen: 3,
31732 asm: ppc64.AMOVHBR,
31733 reg: regInfo{
31734 inputs: []inputInfo{
31735 {1, 1073733624},
31736 {0, 1073733630},
31737 },
31738 outputs: []outputInfo{
31739 {0, 1073733624},
31740 },
31741 },
31742 },
31743 {
31744 name: "MOVWBRloadidx",
31745 argLen: 3,
31746 asm: ppc64.AMOVWBR,
31747 reg: regInfo{
31748 inputs: []inputInfo{
31749 {1, 1073733624},
31750 {0, 1073733630},
31751 },
31752 outputs: []outputInfo{
31753 {0, 1073733624},
31754 },
31755 },
31756 },
31757 {
31758 name: "MOVDBRloadidx",
31759 argLen: 3,
31760 asm: ppc64.AMOVDBR,
31761 reg: regInfo{
31762 inputs: []inputInfo{
31763 {1, 1073733624},
31764 {0, 1073733630},
31765 },
31766 outputs: []outputInfo{
31767 {0, 1073733624},
31768 },
31769 },
31770 },
31771 {
31772 name: "FMOVDloadidx",
31773 argLen: 3,
31774 asm: ppc64.AFMOVD,
31775 reg: regInfo{
31776 inputs: []inputInfo{
31777 {0, 1073733630},
31778 {1, 1073733630},
31779 },
31780 outputs: []outputInfo{
31781 {0, 9223372032559808512},
31782 },
31783 },
31784 },
31785 {
31786 name: "FMOVSloadidx",
31787 argLen: 3,
31788 asm: ppc64.AFMOVS,
31789 reg: regInfo{
31790 inputs: []inputInfo{
31791 {0, 1073733630},
31792 {1, 1073733630},
31793 },
31794 outputs: []outputInfo{
31795 {0, 9223372032559808512},
31796 },
31797 },
31798 },
31799 {
31800 name: "DCBT",
31801 auxType: auxInt64,
31802 argLen: 2,
31803 hasSideEffects: true,
31804 asm: ppc64.ADCBT,
31805 reg: regInfo{
31806 inputs: []inputInfo{
31807 {0, 1073733630},
31808 },
31809 },
31810 },
31811 {
31812 name: "MOVDBRstore",
31813 argLen: 3,
31814 faultOnNilArg0: true,
31815 asm: ppc64.AMOVDBR,
31816 reg: regInfo{
31817 inputs: []inputInfo{
31818 {0, 1073733630},
31819 {1, 1073733630},
31820 },
31821 },
31822 },
31823 {
31824 name: "MOVWBRstore",
31825 argLen: 3,
31826 faultOnNilArg0: true,
31827 asm: ppc64.AMOVWBR,
31828 reg: regInfo{
31829 inputs: []inputInfo{
31830 {0, 1073733630},
31831 {1, 1073733630},
31832 },
31833 },
31834 },
31835 {
31836 name: "MOVHBRstore",
31837 argLen: 3,
31838 faultOnNilArg0: true,
31839 asm: ppc64.AMOVHBR,
31840 reg: regInfo{
31841 inputs: []inputInfo{
31842 {0, 1073733630},
31843 {1, 1073733630},
31844 },
31845 },
31846 },
31847 {
31848 name: "FMOVDload",
31849 auxType: auxSymOff,
31850 argLen: 2,
31851 faultOnNilArg0: true,
31852 symEffect: SymRead,
31853 asm: ppc64.AFMOVD,
31854 reg: regInfo{
31855 inputs: []inputInfo{
31856 {0, 1073733630},
31857 },
31858 outputs: []outputInfo{
31859 {0, 9223372032559808512},
31860 },
31861 },
31862 },
31863 {
31864 name: "FMOVSload",
31865 auxType: auxSymOff,
31866 argLen: 2,
31867 faultOnNilArg0: true,
31868 symEffect: SymRead,
31869 asm: ppc64.AFMOVS,
31870 reg: regInfo{
31871 inputs: []inputInfo{
31872 {0, 1073733630},
31873 },
31874 outputs: []outputInfo{
31875 {0, 9223372032559808512},
31876 },
31877 },
31878 },
31879 {
31880 name: "MOVBstore",
31881 auxType: auxSymOff,
31882 argLen: 3,
31883 faultOnNilArg0: true,
31884 symEffect: SymWrite,
31885 asm: ppc64.AMOVB,
31886 reg: regInfo{
31887 inputs: []inputInfo{
31888 {0, 1073733630},
31889 {1, 1073733630},
31890 },
31891 },
31892 },
31893 {
31894 name: "MOVHstore",
31895 auxType: auxSymOff,
31896 argLen: 3,
31897 faultOnNilArg0: true,
31898 symEffect: SymWrite,
31899 asm: ppc64.AMOVH,
31900 reg: regInfo{
31901 inputs: []inputInfo{
31902 {0, 1073733630},
31903 {1, 1073733630},
31904 },
31905 },
31906 },
31907 {
31908 name: "MOVWstore",
31909 auxType: auxSymOff,
31910 argLen: 3,
31911 faultOnNilArg0: true,
31912 symEffect: SymWrite,
31913 asm: ppc64.AMOVW,
31914 reg: regInfo{
31915 inputs: []inputInfo{
31916 {0, 1073733630},
31917 {1, 1073733630},
31918 },
31919 },
31920 },
31921 {
31922 name: "MOVDstore",
31923 auxType: auxSymOff,
31924 argLen: 3,
31925 faultOnNilArg0: true,
31926 symEffect: SymWrite,
31927 asm: ppc64.AMOVD,
31928 reg: regInfo{
31929 inputs: []inputInfo{
31930 {0, 1073733630},
31931 {1, 1073733630},
31932 },
31933 },
31934 },
31935 {
31936 name: "FMOVDstore",
31937 auxType: auxSymOff,
31938 argLen: 3,
31939 faultOnNilArg0: true,
31940 symEffect: SymWrite,
31941 asm: ppc64.AFMOVD,
31942 reg: regInfo{
31943 inputs: []inputInfo{
31944 {0, 1073733630},
31945 {1, 9223372032559808512},
31946 },
31947 },
31948 },
31949 {
31950 name: "FMOVSstore",
31951 auxType: auxSymOff,
31952 argLen: 3,
31953 faultOnNilArg0: true,
31954 symEffect: SymWrite,
31955 asm: ppc64.AFMOVS,
31956 reg: regInfo{
31957 inputs: []inputInfo{
31958 {0, 1073733630},
31959 {1, 9223372032559808512},
31960 },
31961 },
31962 },
31963 {
31964 name: "MOVBstoreidx",
31965 argLen: 4,
31966 asm: ppc64.AMOVB,
31967 reg: regInfo{
31968 inputs: []inputInfo{
31969 {0, 1073733630},
31970 {1, 1073733630},
31971 {2, 1073733630},
31972 },
31973 },
31974 },
31975 {
31976 name: "MOVHstoreidx",
31977 argLen: 4,
31978 asm: ppc64.AMOVH,
31979 reg: regInfo{
31980 inputs: []inputInfo{
31981 {0, 1073733630},
31982 {1, 1073733630},
31983 {2, 1073733630},
31984 },
31985 },
31986 },
31987 {
31988 name: "MOVWstoreidx",
31989 argLen: 4,
31990 asm: ppc64.AMOVW,
31991 reg: regInfo{
31992 inputs: []inputInfo{
31993 {0, 1073733630},
31994 {1, 1073733630},
31995 {2, 1073733630},
31996 },
31997 },
31998 },
31999 {
32000 name: "MOVDstoreidx",
32001 argLen: 4,
32002 asm: ppc64.AMOVD,
32003 reg: regInfo{
32004 inputs: []inputInfo{
32005 {0, 1073733630},
32006 {1, 1073733630},
32007 {2, 1073733630},
32008 },
32009 },
32010 },
32011 {
32012 name: "FMOVDstoreidx",
32013 argLen: 4,
32014 asm: ppc64.AFMOVD,
32015 reg: regInfo{
32016 inputs: []inputInfo{
32017 {0, 1073733630},
32018 {1, 1073733630},
32019 {2, 9223372032559808512},
32020 },
32021 },
32022 },
32023 {
32024 name: "FMOVSstoreidx",
32025 argLen: 4,
32026 asm: ppc64.AFMOVS,
32027 reg: regInfo{
32028 inputs: []inputInfo{
32029 {0, 1073733630},
32030 {1, 1073733630},
32031 {2, 9223372032559808512},
32032 },
32033 },
32034 },
32035 {
32036 name: "MOVHBRstoreidx",
32037 argLen: 4,
32038 asm: ppc64.AMOVHBR,
32039 reg: regInfo{
32040 inputs: []inputInfo{
32041 {0, 1073733630},
32042 {1, 1073733630},
32043 {2, 1073733630},
32044 },
32045 },
32046 },
32047 {
32048 name: "MOVWBRstoreidx",
32049 argLen: 4,
32050 asm: ppc64.AMOVWBR,
32051 reg: regInfo{
32052 inputs: []inputInfo{
32053 {0, 1073733630},
32054 {1, 1073733630},
32055 {2, 1073733630},
32056 },
32057 },
32058 },
32059 {
32060 name: "MOVDBRstoreidx",
32061 argLen: 4,
32062 asm: ppc64.AMOVDBR,
32063 reg: regInfo{
32064 inputs: []inputInfo{
32065 {0, 1073733630},
32066 {1, 1073733630},
32067 {2, 1073733630},
32068 },
32069 },
32070 },
32071 {
32072 name: "MOVBstorezero",
32073 auxType: auxSymOff,
32074 argLen: 2,
32075 faultOnNilArg0: true,
32076 symEffect: SymWrite,
32077 asm: ppc64.AMOVB,
32078 reg: regInfo{
32079 inputs: []inputInfo{
32080 {0, 1073733630},
32081 },
32082 },
32083 },
32084 {
32085 name: "MOVHstorezero",
32086 auxType: auxSymOff,
32087 argLen: 2,
32088 faultOnNilArg0: true,
32089 symEffect: SymWrite,
32090 asm: ppc64.AMOVH,
32091 reg: regInfo{
32092 inputs: []inputInfo{
32093 {0, 1073733630},
32094 },
32095 },
32096 },
32097 {
32098 name: "MOVWstorezero",
32099 auxType: auxSymOff,
32100 argLen: 2,
32101 faultOnNilArg0: true,
32102 symEffect: SymWrite,
32103 asm: ppc64.AMOVW,
32104 reg: regInfo{
32105 inputs: []inputInfo{
32106 {0, 1073733630},
32107 },
32108 },
32109 },
32110 {
32111 name: "MOVDstorezero",
32112 auxType: auxSymOff,
32113 argLen: 2,
32114 faultOnNilArg0: true,
32115 symEffect: SymWrite,
32116 asm: ppc64.AMOVD,
32117 reg: regInfo{
32118 inputs: []inputInfo{
32119 {0, 1073733630},
32120 },
32121 },
32122 },
32123 {
32124 name: "MOVDaddr",
32125 auxType: auxSymOff,
32126 argLen: 1,
32127 rematerializeable: true,
32128 symEffect: SymAddr,
32129 asm: ppc64.AMOVD,
32130 reg: regInfo{
32131 inputs: []inputInfo{
32132 {0, 1073733630},
32133 },
32134 outputs: []outputInfo{
32135 {0, 1073733624},
32136 },
32137 },
32138 },
32139 {
32140 name: "MOVDconst",
32141 auxType: auxInt64,
32142 argLen: 0,
32143 rematerializeable: true,
32144 asm: ppc64.AMOVD,
32145 reg: regInfo{
32146 outputs: []outputInfo{
32147 {0, 1073733624},
32148 },
32149 },
32150 },
32151 {
32152 name: "FMOVDconst",
32153 auxType: auxFloat64,
32154 argLen: 0,
32155 rematerializeable: true,
32156 asm: ppc64.AFMOVD,
32157 reg: regInfo{
32158 outputs: []outputInfo{
32159 {0, 9223372032559808512},
32160 },
32161 },
32162 },
32163 {
32164 name: "FMOVSconst",
32165 auxType: auxFloat32,
32166 argLen: 0,
32167 rematerializeable: true,
32168 asm: ppc64.AFMOVS,
32169 reg: regInfo{
32170 outputs: []outputInfo{
32171 {0, 9223372032559808512},
32172 },
32173 },
32174 },
32175 {
32176 name: "FCMPU",
32177 argLen: 2,
32178 asm: ppc64.AFCMPU,
32179 reg: regInfo{
32180 inputs: []inputInfo{
32181 {0, 9223372032559808512},
32182 {1, 9223372032559808512},
32183 },
32184 },
32185 },
32186 {
32187 name: "CMP",
32188 argLen: 2,
32189 asm: ppc64.ACMP,
32190 reg: regInfo{
32191 inputs: []inputInfo{
32192 {0, 1073733630},
32193 {1, 1073733630},
32194 },
32195 },
32196 },
32197 {
32198 name: "CMPU",
32199 argLen: 2,
32200 asm: ppc64.ACMPU,
32201 reg: regInfo{
32202 inputs: []inputInfo{
32203 {0, 1073733630},
32204 {1, 1073733630},
32205 },
32206 },
32207 },
32208 {
32209 name: "CMPW",
32210 argLen: 2,
32211 asm: ppc64.ACMPW,
32212 reg: regInfo{
32213 inputs: []inputInfo{
32214 {0, 1073733630},
32215 {1, 1073733630},
32216 },
32217 },
32218 },
32219 {
32220 name: "CMPWU",
32221 argLen: 2,
32222 asm: ppc64.ACMPWU,
32223 reg: regInfo{
32224 inputs: []inputInfo{
32225 {0, 1073733630},
32226 {1, 1073733630},
32227 },
32228 },
32229 },
32230 {
32231 name: "CMPconst",
32232 auxType: auxInt64,
32233 argLen: 1,
32234 asm: ppc64.ACMP,
32235 reg: regInfo{
32236 inputs: []inputInfo{
32237 {0, 1073733630},
32238 },
32239 },
32240 },
32241 {
32242 name: "CMPUconst",
32243 auxType: auxInt64,
32244 argLen: 1,
32245 asm: ppc64.ACMPU,
32246 reg: regInfo{
32247 inputs: []inputInfo{
32248 {0, 1073733630},
32249 },
32250 },
32251 },
32252 {
32253 name: "CMPWconst",
32254 auxType: auxInt32,
32255 argLen: 1,
32256 asm: ppc64.ACMPW,
32257 reg: regInfo{
32258 inputs: []inputInfo{
32259 {0, 1073733630},
32260 },
32261 },
32262 },
32263 {
32264 name: "CMPWUconst",
32265 auxType: auxInt32,
32266 argLen: 1,
32267 asm: ppc64.ACMPWU,
32268 reg: regInfo{
32269 inputs: []inputInfo{
32270 {0, 1073733630},
32271 },
32272 },
32273 },
32274 {
32275 name: "ISEL",
32276 auxType: auxInt32,
32277 argLen: 3,
32278 asm: ppc64.AISEL,
32279 reg: regInfo{
32280 inputs: []inputInfo{
32281 {0, 1073733624},
32282 {1, 1073733624},
32283 },
32284 outputs: []outputInfo{
32285 {0, 1073733624},
32286 },
32287 },
32288 },
32289 {
32290 name: "ISELZ",
32291 auxType: auxInt32,
32292 argLen: 2,
32293 asm: ppc64.AISEL,
32294 reg: regInfo{
32295 inputs: []inputInfo{
32296 {0, 1073733624},
32297 },
32298 outputs: []outputInfo{
32299 {0, 1073733624},
32300 },
32301 },
32302 },
32303 {
32304 name: "SETBC",
32305 auxType: auxInt32,
32306 argLen: 1,
32307 asm: ppc64.ASETBC,
32308 reg: regInfo{
32309 outputs: []outputInfo{
32310 {0, 1073733624},
32311 },
32312 },
32313 },
32314 {
32315 name: "SETBCR",
32316 auxType: auxInt32,
32317 argLen: 1,
32318 asm: ppc64.ASETBCR,
32319 reg: regInfo{
32320 outputs: []outputInfo{
32321 {0, 1073733624},
32322 },
32323 },
32324 },
32325 {
32326 name: "Equal",
32327 argLen: 1,
32328 reg: regInfo{
32329 outputs: []outputInfo{
32330 {0, 1073733624},
32331 },
32332 },
32333 },
32334 {
32335 name: "NotEqual",
32336 argLen: 1,
32337 reg: regInfo{
32338 outputs: []outputInfo{
32339 {0, 1073733624},
32340 },
32341 },
32342 },
32343 {
32344 name: "LessThan",
32345 argLen: 1,
32346 reg: regInfo{
32347 outputs: []outputInfo{
32348 {0, 1073733624},
32349 },
32350 },
32351 },
32352 {
32353 name: "FLessThan",
32354 argLen: 1,
32355 reg: regInfo{
32356 outputs: []outputInfo{
32357 {0, 1073733624},
32358 },
32359 },
32360 },
32361 {
32362 name: "LessEqual",
32363 argLen: 1,
32364 reg: regInfo{
32365 outputs: []outputInfo{
32366 {0, 1073733624},
32367 },
32368 },
32369 },
32370 {
32371 name: "FLessEqual",
32372 argLen: 1,
32373 reg: regInfo{
32374 outputs: []outputInfo{
32375 {0, 1073733624},
32376 },
32377 },
32378 },
32379 {
32380 name: "GreaterThan",
32381 argLen: 1,
32382 reg: regInfo{
32383 outputs: []outputInfo{
32384 {0, 1073733624},
32385 },
32386 },
32387 },
32388 {
32389 name: "FGreaterThan",
32390 argLen: 1,
32391 reg: regInfo{
32392 outputs: []outputInfo{
32393 {0, 1073733624},
32394 },
32395 },
32396 },
32397 {
32398 name: "GreaterEqual",
32399 argLen: 1,
32400 reg: regInfo{
32401 outputs: []outputInfo{
32402 {0, 1073733624},
32403 },
32404 },
32405 },
32406 {
32407 name: "FGreaterEqual",
32408 argLen: 1,
32409 reg: regInfo{
32410 outputs: []outputInfo{
32411 {0, 1073733624},
32412 },
32413 },
32414 },
32415 {
32416 name: "LoweredGetClosurePtr",
32417 argLen: 0,
32418 zeroWidth: true,
32419 reg: regInfo{
32420 outputs: []outputInfo{
32421 {0, 2048},
32422 },
32423 },
32424 },
32425 {
32426 name: "LoweredGetCallerSP",
32427 argLen: 1,
32428 rematerializeable: true,
32429 reg: regInfo{
32430 outputs: []outputInfo{
32431 {0, 1073733624},
32432 },
32433 },
32434 },
32435 {
32436 name: "LoweredGetCallerPC",
32437 argLen: 0,
32438 rematerializeable: true,
32439 reg: regInfo{
32440 outputs: []outputInfo{
32441 {0, 1073733624},
32442 },
32443 },
32444 },
32445 {
32446 name: "LoweredNilCheck",
32447 argLen: 2,
32448 clobberFlags: true,
32449 nilCheck: true,
32450 faultOnNilArg0: true,
32451 reg: regInfo{
32452 inputs: []inputInfo{
32453 {0, 1073733630},
32454 },
32455 clobbers: 2147483648,
32456 },
32457 },
32458 {
32459 name: "LoweredRound32F",
32460 argLen: 1,
32461 resultInArg0: true,
32462 zeroWidth: true,
32463 reg: regInfo{
32464 inputs: []inputInfo{
32465 {0, 9223372032559808512},
32466 },
32467 outputs: []outputInfo{
32468 {0, 9223372032559808512},
32469 },
32470 },
32471 },
32472 {
32473 name: "LoweredRound64F",
32474 argLen: 1,
32475 resultInArg0: true,
32476 zeroWidth: true,
32477 reg: regInfo{
32478 inputs: []inputInfo{
32479 {0, 9223372032559808512},
32480 },
32481 outputs: []outputInfo{
32482 {0, 9223372032559808512},
32483 },
32484 },
32485 },
32486 {
32487 name: "CALLstatic",
32488 auxType: auxCallOff,
32489 argLen: -1,
32490 clobberFlags: true,
32491 call: true,
32492 reg: regInfo{
32493 clobbers: 18446744071562059768,
32494 },
32495 },
32496 {
32497 name: "CALLtail",
32498 auxType: auxCallOff,
32499 argLen: -1,
32500 clobberFlags: true,
32501 call: true,
32502 tailCall: true,
32503 reg: regInfo{
32504 clobbers: 18446744071562059768,
32505 },
32506 },
32507 {
32508 name: "CALLclosure",
32509 auxType: auxCallOff,
32510 argLen: -1,
32511 clobberFlags: true,
32512 call: true,
32513 reg: regInfo{
32514 inputs: []inputInfo{
32515 {0, 4096},
32516 {1, 2048},
32517 },
32518 clobbers: 18446744071562059768,
32519 },
32520 },
32521 {
32522 name: "CALLinter",
32523 auxType: auxCallOff,
32524 argLen: -1,
32525 clobberFlags: true,
32526 call: true,
32527 reg: regInfo{
32528 inputs: []inputInfo{
32529 {0, 4096},
32530 },
32531 clobbers: 18446744071562059768,
32532 },
32533 },
32534 {
32535 name: "LoweredZero",
32536 auxType: auxInt64,
32537 argLen: 2,
32538 clobberFlags: true,
32539 faultOnNilArg0: true,
32540 unsafePoint: true,
32541 reg: regInfo{
32542 inputs: []inputInfo{
32543 {0, 1048576},
32544 },
32545 clobbers: 1048576,
32546 },
32547 },
32548 {
32549 name: "LoweredZeroShort",
32550 auxType: auxInt64,
32551 argLen: 2,
32552 faultOnNilArg0: true,
32553 unsafePoint: true,
32554 reg: regInfo{
32555 inputs: []inputInfo{
32556 {0, 1073733624},
32557 },
32558 },
32559 },
32560 {
32561 name: "LoweredQuadZeroShort",
32562 auxType: auxInt64,
32563 argLen: 2,
32564 faultOnNilArg0: true,
32565 unsafePoint: true,
32566 reg: regInfo{
32567 inputs: []inputInfo{
32568 {0, 1073733624},
32569 },
32570 },
32571 },
32572 {
32573 name: "LoweredQuadZero",
32574 auxType: auxInt64,
32575 argLen: 2,
32576 clobberFlags: true,
32577 faultOnNilArg0: true,
32578 unsafePoint: true,
32579 reg: regInfo{
32580 inputs: []inputInfo{
32581 {0, 1048576},
32582 },
32583 clobbers: 1048576,
32584 },
32585 },
32586 {
32587 name: "LoweredMove",
32588 auxType: auxInt64,
32589 argLen: 3,
32590 clobberFlags: true,
32591 faultOnNilArg0: true,
32592 faultOnNilArg1: true,
32593 unsafePoint: true,
32594 reg: regInfo{
32595 inputs: []inputInfo{
32596 {0, 1048576},
32597 {1, 2097152},
32598 },
32599 clobbers: 3145728,
32600 },
32601 },
32602 {
32603 name: "LoweredMoveShort",
32604 auxType: auxInt64,
32605 argLen: 3,
32606 faultOnNilArg0: true,
32607 faultOnNilArg1: true,
32608 unsafePoint: true,
32609 reg: regInfo{
32610 inputs: []inputInfo{
32611 {0, 1073733624},
32612 {1, 1073733624},
32613 },
32614 },
32615 },
32616 {
32617 name: "LoweredQuadMove",
32618 auxType: auxInt64,
32619 argLen: 3,
32620 clobberFlags: true,
32621 faultOnNilArg0: true,
32622 faultOnNilArg1: true,
32623 unsafePoint: true,
32624 reg: regInfo{
32625 inputs: []inputInfo{
32626 {0, 1048576},
32627 {1, 2097152},
32628 },
32629 clobbers: 3145728,
32630 },
32631 },
32632 {
32633 name: "LoweredQuadMoveShort",
32634 auxType: auxInt64,
32635 argLen: 3,
32636 faultOnNilArg0: true,
32637 faultOnNilArg1: true,
32638 unsafePoint: true,
32639 reg: regInfo{
32640 inputs: []inputInfo{
32641 {0, 1073733624},
32642 {1, 1073733624},
32643 },
32644 },
32645 },
32646 {
32647 name: "LoweredAtomicStore8",
32648 auxType: auxInt64,
32649 argLen: 3,
32650 faultOnNilArg0: true,
32651 hasSideEffects: true,
32652 reg: regInfo{
32653 inputs: []inputInfo{
32654 {0, 1073733630},
32655 {1, 1073733630},
32656 },
32657 },
32658 },
32659 {
32660 name: "LoweredAtomicStore32",
32661 auxType: auxInt64,
32662 argLen: 3,
32663 faultOnNilArg0: true,
32664 hasSideEffects: true,
32665 reg: regInfo{
32666 inputs: []inputInfo{
32667 {0, 1073733630},
32668 {1, 1073733630},
32669 },
32670 },
32671 },
32672 {
32673 name: "LoweredAtomicStore64",
32674 auxType: auxInt64,
32675 argLen: 3,
32676 faultOnNilArg0: true,
32677 hasSideEffects: true,
32678 reg: regInfo{
32679 inputs: []inputInfo{
32680 {0, 1073733630},
32681 {1, 1073733630},
32682 },
32683 },
32684 },
32685 {
32686 name: "LoweredAtomicLoad8",
32687 auxType: auxInt64,
32688 argLen: 2,
32689 clobberFlags: true,
32690 faultOnNilArg0: true,
32691 reg: regInfo{
32692 inputs: []inputInfo{
32693 {0, 1073733630},
32694 },
32695 outputs: []outputInfo{
32696 {0, 1073733624},
32697 },
32698 },
32699 },
32700 {
32701 name: "LoweredAtomicLoad32",
32702 auxType: auxInt64,
32703 argLen: 2,
32704 clobberFlags: true,
32705 faultOnNilArg0: true,
32706 reg: regInfo{
32707 inputs: []inputInfo{
32708 {0, 1073733630},
32709 },
32710 outputs: []outputInfo{
32711 {0, 1073733624},
32712 },
32713 },
32714 },
32715 {
32716 name: "LoweredAtomicLoad64",
32717 auxType: auxInt64,
32718 argLen: 2,
32719 clobberFlags: true,
32720 faultOnNilArg0: true,
32721 reg: regInfo{
32722 inputs: []inputInfo{
32723 {0, 1073733630},
32724 },
32725 outputs: []outputInfo{
32726 {0, 1073733624},
32727 },
32728 },
32729 },
32730 {
32731 name: "LoweredAtomicLoadPtr",
32732 auxType: auxInt64,
32733 argLen: 2,
32734 clobberFlags: true,
32735 faultOnNilArg0: true,
32736 reg: regInfo{
32737 inputs: []inputInfo{
32738 {0, 1073733630},
32739 },
32740 outputs: []outputInfo{
32741 {0, 1073733624},
32742 },
32743 },
32744 },
32745 {
32746 name: "LoweredAtomicAdd32",
32747 argLen: 3,
32748 resultNotInArgs: true,
32749 clobberFlags: true,
32750 faultOnNilArg0: true,
32751 hasSideEffects: true,
32752 reg: regInfo{
32753 inputs: []inputInfo{
32754 {1, 1073733624},
32755 {0, 1073733630},
32756 },
32757 outputs: []outputInfo{
32758 {0, 1073733624},
32759 },
32760 },
32761 },
32762 {
32763 name: "LoweredAtomicAdd64",
32764 argLen: 3,
32765 resultNotInArgs: true,
32766 clobberFlags: true,
32767 faultOnNilArg0: true,
32768 hasSideEffects: true,
32769 reg: regInfo{
32770 inputs: []inputInfo{
32771 {1, 1073733624},
32772 {0, 1073733630},
32773 },
32774 outputs: []outputInfo{
32775 {0, 1073733624},
32776 },
32777 },
32778 },
32779 {
32780 name: "LoweredAtomicExchange8",
32781 argLen: 3,
32782 resultNotInArgs: true,
32783 clobberFlags: true,
32784 faultOnNilArg0: true,
32785 hasSideEffects: true,
32786 reg: regInfo{
32787 inputs: []inputInfo{
32788 {1, 1073733624},
32789 {0, 1073733630},
32790 },
32791 outputs: []outputInfo{
32792 {0, 1073733624},
32793 },
32794 },
32795 },
32796 {
32797 name: "LoweredAtomicExchange32",
32798 argLen: 3,
32799 resultNotInArgs: true,
32800 clobberFlags: true,
32801 faultOnNilArg0: true,
32802 hasSideEffects: true,
32803 reg: regInfo{
32804 inputs: []inputInfo{
32805 {1, 1073733624},
32806 {0, 1073733630},
32807 },
32808 outputs: []outputInfo{
32809 {0, 1073733624},
32810 },
32811 },
32812 },
32813 {
32814 name: "LoweredAtomicExchange64",
32815 argLen: 3,
32816 resultNotInArgs: true,
32817 clobberFlags: true,
32818 faultOnNilArg0: true,
32819 hasSideEffects: true,
32820 reg: regInfo{
32821 inputs: []inputInfo{
32822 {1, 1073733624},
32823 {0, 1073733630},
32824 },
32825 outputs: []outputInfo{
32826 {0, 1073733624},
32827 },
32828 },
32829 },
32830 {
32831 name: "LoweredAtomicCas64",
32832 auxType: auxInt64,
32833 argLen: 4,
32834 resultNotInArgs: true,
32835 clobberFlags: true,
32836 faultOnNilArg0: true,
32837 hasSideEffects: true,
32838 reg: regInfo{
32839 inputs: []inputInfo{
32840 {1, 1073733624},
32841 {2, 1073733624},
32842 {0, 1073733630},
32843 },
32844 outputs: []outputInfo{
32845 {0, 1073733624},
32846 },
32847 },
32848 },
32849 {
32850 name: "LoweredAtomicCas32",
32851 auxType: auxInt64,
32852 argLen: 4,
32853 resultNotInArgs: true,
32854 clobberFlags: true,
32855 faultOnNilArg0: true,
32856 hasSideEffects: true,
32857 reg: regInfo{
32858 inputs: []inputInfo{
32859 {1, 1073733624},
32860 {2, 1073733624},
32861 {0, 1073733630},
32862 },
32863 outputs: []outputInfo{
32864 {0, 1073733624},
32865 },
32866 },
32867 },
32868 {
32869 name: "LoweredAtomicAnd8",
32870 argLen: 3,
32871 faultOnNilArg0: true,
32872 hasSideEffects: true,
32873 asm: ppc64.AAND,
32874 reg: regInfo{
32875 inputs: []inputInfo{
32876 {0, 1073733630},
32877 {1, 1073733630},
32878 },
32879 },
32880 },
32881 {
32882 name: "LoweredAtomicAnd32",
32883 argLen: 3,
32884 faultOnNilArg0: true,
32885 hasSideEffects: true,
32886 asm: ppc64.AAND,
32887 reg: regInfo{
32888 inputs: []inputInfo{
32889 {0, 1073733630},
32890 {1, 1073733630},
32891 },
32892 },
32893 },
32894 {
32895 name: "LoweredAtomicOr8",
32896 argLen: 3,
32897 faultOnNilArg0: true,
32898 hasSideEffects: true,
32899 asm: ppc64.AOR,
32900 reg: regInfo{
32901 inputs: []inputInfo{
32902 {0, 1073733630},
32903 {1, 1073733630},
32904 },
32905 },
32906 },
32907 {
32908 name: "LoweredAtomicOr32",
32909 argLen: 3,
32910 faultOnNilArg0: true,
32911 hasSideEffects: true,
32912 asm: ppc64.AOR,
32913 reg: regInfo{
32914 inputs: []inputInfo{
32915 {0, 1073733630},
32916 {1, 1073733630},
32917 },
32918 },
32919 },
32920 {
32921 name: "LoweredWB",
32922 auxType: auxInt64,
32923 argLen: 1,
32924 clobberFlags: true,
32925 reg: regInfo{
32926 clobbers: 18446744072632408064,
32927 outputs: []outputInfo{
32928 {0, 536870912},
32929 },
32930 },
32931 },
32932 {
32933 name: "LoweredPubBarrier",
32934 argLen: 1,
32935 hasSideEffects: true,
32936 asm: ppc64.ALWSYNC,
32937 reg: regInfo{},
32938 },
32939 {
32940 name: "LoweredPanicBoundsA",
32941 auxType: auxInt64,
32942 argLen: 3,
32943 call: true,
32944 reg: regInfo{
32945 inputs: []inputInfo{
32946 {0, 32},
32947 {1, 64},
32948 },
32949 },
32950 },
32951 {
32952 name: "LoweredPanicBoundsB",
32953 auxType: auxInt64,
32954 argLen: 3,
32955 call: true,
32956 reg: regInfo{
32957 inputs: []inputInfo{
32958 {0, 16},
32959 {1, 32},
32960 },
32961 },
32962 },
32963 {
32964 name: "LoweredPanicBoundsC",
32965 auxType: auxInt64,
32966 argLen: 3,
32967 call: true,
32968 reg: regInfo{
32969 inputs: []inputInfo{
32970 {0, 8},
32971 {1, 16},
32972 },
32973 },
32974 },
32975 {
32976 name: "InvertFlags",
32977 argLen: 1,
32978 reg: regInfo{},
32979 },
32980 {
32981 name: "FlagEQ",
32982 argLen: 0,
32983 reg: regInfo{},
32984 },
32985 {
32986 name: "FlagLT",
32987 argLen: 0,
32988 reg: regInfo{},
32989 },
32990 {
32991 name: "FlagGT",
32992 argLen: 0,
32993 reg: regInfo{},
32994 },
32995
32996 {
32997 name: "ADD",
32998 argLen: 2,
32999 commutative: true,
33000 asm: riscv.AADD,
33001 reg: regInfo{
33002 inputs: []inputInfo{
33003 {0, 1006632944},
33004 {1, 1006632944},
33005 },
33006 outputs: []outputInfo{
33007 {0, 1006632944},
33008 },
33009 },
33010 },
33011 {
33012 name: "ADDI",
33013 auxType: auxInt64,
33014 argLen: 1,
33015 asm: riscv.AADDI,
33016 reg: regInfo{
33017 inputs: []inputInfo{
33018 {0, 9223372037861408754},
33019 },
33020 outputs: []outputInfo{
33021 {0, 1006632944},
33022 },
33023 },
33024 },
33025 {
33026 name: "ADDIW",
33027 auxType: auxInt64,
33028 argLen: 1,
33029 asm: riscv.AADDIW,
33030 reg: regInfo{
33031 inputs: []inputInfo{
33032 {0, 1006632944},
33033 },
33034 outputs: []outputInfo{
33035 {0, 1006632944},
33036 },
33037 },
33038 },
33039 {
33040 name: "NEG",
33041 argLen: 1,
33042 asm: riscv.ANEG,
33043 reg: regInfo{
33044 inputs: []inputInfo{
33045 {0, 1006632944},
33046 },
33047 outputs: []outputInfo{
33048 {0, 1006632944},
33049 },
33050 },
33051 },
33052 {
33053 name: "NEGW",
33054 argLen: 1,
33055 asm: riscv.ANEGW,
33056 reg: regInfo{
33057 inputs: []inputInfo{
33058 {0, 1006632944},
33059 },
33060 outputs: []outputInfo{
33061 {0, 1006632944},
33062 },
33063 },
33064 },
33065 {
33066 name: "SUB",
33067 argLen: 2,
33068 asm: riscv.ASUB,
33069 reg: regInfo{
33070 inputs: []inputInfo{
33071 {0, 1006632944},
33072 {1, 1006632944},
33073 },
33074 outputs: []outputInfo{
33075 {0, 1006632944},
33076 },
33077 },
33078 },
33079 {
33080 name: "SUBW",
33081 argLen: 2,
33082 asm: riscv.ASUBW,
33083 reg: regInfo{
33084 inputs: []inputInfo{
33085 {0, 1006632944},
33086 {1, 1006632944},
33087 },
33088 outputs: []outputInfo{
33089 {0, 1006632944},
33090 },
33091 },
33092 },
33093 {
33094 name: "MUL",
33095 argLen: 2,
33096 commutative: true,
33097 asm: riscv.AMUL,
33098 reg: regInfo{
33099 inputs: []inputInfo{
33100 {0, 1006632944},
33101 {1, 1006632944},
33102 },
33103 outputs: []outputInfo{
33104 {0, 1006632944},
33105 },
33106 },
33107 },
33108 {
33109 name: "MULW",
33110 argLen: 2,
33111 commutative: true,
33112 asm: riscv.AMULW,
33113 reg: regInfo{
33114 inputs: []inputInfo{
33115 {0, 1006632944},
33116 {1, 1006632944},
33117 },
33118 outputs: []outputInfo{
33119 {0, 1006632944},
33120 },
33121 },
33122 },
33123 {
33124 name: "MULH",
33125 argLen: 2,
33126 commutative: true,
33127 asm: riscv.AMULH,
33128 reg: regInfo{
33129 inputs: []inputInfo{
33130 {0, 1006632944},
33131 {1, 1006632944},
33132 },
33133 outputs: []outputInfo{
33134 {0, 1006632944},
33135 },
33136 },
33137 },
33138 {
33139 name: "MULHU",
33140 argLen: 2,
33141 commutative: true,
33142 asm: riscv.AMULHU,
33143 reg: regInfo{
33144 inputs: []inputInfo{
33145 {0, 1006632944},
33146 {1, 1006632944},
33147 },
33148 outputs: []outputInfo{
33149 {0, 1006632944},
33150 },
33151 },
33152 },
33153 {
33154 name: "LoweredMuluhilo",
33155 argLen: 2,
33156 resultNotInArgs: true,
33157 reg: regInfo{
33158 inputs: []inputInfo{
33159 {0, 1006632944},
33160 {1, 1006632944},
33161 },
33162 outputs: []outputInfo{
33163 {0, 1006632944},
33164 {1, 1006632944},
33165 },
33166 },
33167 },
33168 {
33169 name: "LoweredMuluover",
33170 argLen: 2,
33171 resultNotInArgs: true,
33172 reg: regInfo{
33173 inputs: []inputInfo{
33174 {0, 1006632944},
33175 {1, 1006632944},
33176 },
33177 outputs: []outputInfo{
33178 {0, 1006632944},
33179 {1, 1006632944},
33180 },
33181 },
33182 },
33183 {
33184 name: "DIV",
33185 argLen: 2,
33186 asm: riscv.ADIV,
33187 reg: regInfo{
33188 inputs: []inputInfo{
33189 {0, 1006632944},
33190 {1, 1006632944},
33191 },
33192 outputs: []outputInfo{
33193 {0, 1006632944},
33194 },
33195 },
33196 },
33197 {
33198 name: "DIVU",
33199 argLen: 2,
33200 asm: riscv.ADIVU,
33201 reg: regInfo{
33202 inputs: []inputInfo{
33203 {0, 1006632944},
33204 {1, 1006632944},
33205 },
33206 outputs: []outputInfo{
33207 {0, 1006632944},
33208 },
33209 },
33210 },
33211 {
33212 name: "DIVW",
33213 argLen: 2,
33214 asm: riscv.ADIVW,
33215 reg: regInfo{
33216 inputs: []inputInfo{
33217 {0, 1006632944},
33218 {1, 1006632944},
33219 },
33220 outputs: []outputInfo{
33221 {0, 1006632944},
33222 },
33223 },
33224 },
33225 {
33226 name: "DIVUW",
33227 argLen: 2,
33228 asm: riscv.ADIVUW,
33229 reg: regInfo{
33230 inputs: []inputInfo{
33231 {0, 1006632944},
33232 {1, 1006632944},
33233 },
33234 outputs: []outputInfo{
33235 {0, 1006632944},
33236 },
33237 },
33238 },
33239 {
33240 name: "REM",
33241 argLen: 2,
33242 asm: riscv.AREM,
33243 reg: regInfo{
33244 inputs: []inputInfo{
33245 {0, 1006632944},
33246 {1, 1006632944},
33247 },
33248 outputs: []outputInfo{
33249 {0, 1006632944},
33250 },
33251 },
33252 },
33253 {
33254 name: "REMU",
33255 argLen: 2,
33256 asm: riscv.AREMU,
33257 reg: regInfo{
33258 inputs: []inputInfo{
33259 {0, 1006632944},
33260 {1, 1006632944},
33261 },
33262 outputs: []outputInfo{
33263 {0, 1006632944},
33264 },
33265 },
33266 },
33267 {
33268 name: "REMW",
33269 argLen: 2,
33270 asm: riscv.AREMW,
33271 reg: regInfo{
33272 inputs: []inputInfo{
33273 {0, 1006632944},
33274 {1, 1006632944},
33275 },
33276 outputs: []outputInfo{
33277 {0, 1006632944},
33278 },
33279 },
33280 },
33281 {
33282 name: "REMUW",
33283 argLen: 2,
33284 asm: riscv.AREMUW,
33285 reg: regInfo{
33286 inputs: []inputInfo{
33287 {0, 1006632944},
33288 {1, 1006632944},
33289 },
33290 outputs: []outputInfo{
33291 {0, 1006632944},
33292 },
33293 },
33294 },
33295 {
33296 name: "MOVaddr",
33297 auxType: auxSymOff,
33298 argLen: 1,
33299 rematerializeable: true,
33300 symEffect: SymAddr,
33301 asm: riscv.AMOV,
33302 reg: regInfo{
33303 inputs: []inputInfo{
33304 {0, 9223372037861408754},
33305 },
33306 outputs: []outputInfo{
33307 {0, 1006632944},
33308 },
33309 },
33310 },
33311 {
33312 name: "MOVDconst",
33313 auxType: auxInt64,
33314 argLen: 0,
33315 rematerializeable: true,
33316 asm: riscv.AMOV,
33317 reg: regInfo{
33318 outputs: []outputInfo{
33319 {0, 1006632944},
33320 },
33321 },
33322 },
33323 {
33324 name: "MOVBload",
33325 auxType: auxSymOff,
33326 argLen: 2,
33327 faultOnNilArg0: true,
33328 symEffect: SymRead,
33329 asm: riscv.AMOVB,
33330 reg: regInfo{
33331 inputs: []inputInfo{
33332 {0, 9223372037861408754},
33333 },
33334 outputs: []outputInfo{
33335 {0, 1006632944},
33336 },
33337 },
33338 },
33339 {
33340 name: "MOVHload",
33341 auxType: auxSymOff,
33342 argLen: 2,
33343 faultOnNilArg0: true,
33344 symEffect: SymRead,
33345 asm: riscv.AMOVH,
33346 reg: regInfo{
33347 inputs: []inputInfo{
33348 {0, 9223372037861408754},
33349 },
33350 outputs: []outputInfo{
33351 {0, 1006632944},
33352 },
33353 },
33354 },
33355 {
33356 name: "MOVWload",
33357 auxType: auxSymOff,
33358 argLen: 2,
33359 faultOnNilArg0: true,
33360 symEffect: SymRead,
33361 asm: riscv.AMOVW,
33362 reg: regInfo{
33363 inputs: []inputInfo{
33364 {0, 9223372037861408754},
33365 },
33366 outputs: []outputInfo{
33367 {0, 1006632944},
33368 },
33369 },
33370 },
33371 {
33372 name: "MOVDload",
33373 auxType: auxSymOff,
33374 argLen: 2,
33375 faultOnNilArg0: true,
33376 symEffect: SymRead,
33377 asm: riscv.AMOV,
33378 reg: regInfo{
33379 inputs: []inputInfo{
33380 {0, 9223372037861408754},
33381 },
33382 outputs: []outputInfo{
33383 {0, 1006632944},
33384 },
33385 },
33386 },
33387 {
33388 name: "MOVBUload",
33389 auxType: auxSymOff,
33390 argLen: 2,
33391 faultOnNilArg0: true,
33392 symEffect: SymRead,
33393 asm: riscv.AMOVBU,
33394 reg: regInfo{
33395 inputs: []inputInfo{
33396 {0, 9223372037861408754},
33397 },
33398 outputs: []outputInfo{
33399 {0, 1006632944},
33400 },
33401 },
33402 },
33403 {
33404 name: "MOVHUload",
33405 auxType: auxSymOff,
33406 argLen: 2,
33407 faultOnNilArg0: true,
33408 symEffect: SymRead,
33409 asm: riscv.AMOVHU,
33410 reg: regInfo{
33411 inputs: []inputInfo{
33412 {0, 9223372037861408754},
33413 },
33414 outputs: []outputInfo{
33415 {0, 1006632944},
33416 },
33417 },
33418 },
33419 {
33420 name: "MOVWUload",
33421 auxType: auxSymOff,
33422 argLen: 2,
33423 faultOnNilArg0: true,
33424 symEffect: SymRead,
33425 asm: riscv.AMOVWU,
33426 reg: regInfo{
33427 inputs: []inputInfo{
33428 {0, 9223372037861408754},
33429 },
33430 outputs: []outputInfo{
33431 {0, 1006632944},
33432 },
33433 },
33434 },
33435 {
33436 name: "MOVBstore",
33437 auxType: auxSymOff,
33438 argLen: 3,
33439 faultOnNilArg0: true,
33440 symEffect: SymWrite,
33441 asm: riscv.AMOVB,
33442 reg: regInfo{
33443 inputs: []inputInfo{
33444 {1, 1006632946},
33445 {0, 9223372037861408754},
33446 },
33447 },
33448 },
33449 {
33450 name: "MOVHstore",
33451 auxType: auxSymOff,
33452 argLen: 3,
33453 faultOnNilArg0: true,
33454 symEffect: SymWrite,
33455 asm: riscv.AMOVH,
33456 reg: regInfo{
33457 inputs: []inputInfo{
33458 {1, 1006632946},
33459 {0, 9223372037861408754},
33460 },
33461 },
33462 },
33463 {
33464 name: "MOVWstore",
33465 auxType: auxSymOff,
33466 argLen: 3,
33467 faultOnNilArg0: true,
33468 symEffect: SymWrite,
33469 asm: riscv.AMOVW,
33470 reg: regInfo{
33471 inputs: []inputInfo{
33472 {1, 1006632946},
33473 {0, 9223372037861408754},
33474 },
33475 },
33476 },
33477 {
33478 name: "MOVDstore",
33479 auxType: auxSymOff,
33480 argLen: 3,
33481 faultOnNilArg0: true,
33482 symEffect: SymWrite,
33483 asm: riscv.AMOV,
33484 reg: regInfo{
33485 inputs: []inputInfo{
33486 {1, 1006632946},
33487 {0, 9223372037861408754},
33488 },
33489 },
33490 },
33491 {
33492 name: "MOVBstorezero",
33493 auxType: auxSymOff,
33494 argLen: 2,
33495 faultOnNilArg0: true,
33496 symEffect: SymWrite,
33497 asm: riscv.AMOVB,
33498 reg: regInfo{
33499 inputs: []inputInfo{
33500 {0, 9223372037861408754},
33501 },
33502 },
33503 },
33504 {
33505 name: "MOVHstorezero",
33506 auxType: auxSymOff,
33507 argLen: 2,
33508 faultOnNilArg0: true,
33509 symEffect: SymWrite,
33510 asm: riscv.AMOVH,
33511 reg: regInfo{
33512 inputs: []inputInfo{
33513 {0, 9223372037861408754},
33514 },
33515 },
33516 },
33517 {
33518 name: "MOVWstorezero",
33519 auxType: auxSymOff,
33520 argLen: 2,
33521 faultOnNilArg0: true,
33522 symEffect: SymWrite,
33523 asm: riscv.AMOVW,
33524 reg: regInfo{
33525 inputs: []inputInfo{
33526 {0, 9223372037861408754},
33527 },
33528 },
33529 },
33530 {
33531 name: "MOVDstorezero",
33532 auxType: auxSymOff,
33533 argLen: 2,
33534 faultOnNilArg0: true,
33535 symEffect: SymWrite,
33536 asm: riscv.AMOV,
33537 reg: regInfo{
33538 inputs: []inputInfo{
33539 {0, 9223372037861408754},
33540 },
33541 },
33542 },
33543 {
33544 name: "MOVBreg",
33545 argLen: 1,
33546 asm: riscv.AMOVB,
33547 reg: regInfo{
33548 inputs: []inputInfo{
33549 {0, 1006632944},
33550 },
33551 outputs: []outputInfo{
33552 {0, 1006632944},
33553 },
33554 },
33555 },
33556 {
33557 name: "MOVHreg",
33558 argLen: 1,
33559 asm: riscv.AMOVH,
33560 reg: regInfo{
33561 inputs: []inputInfo{
33562 {0, 1006632944},
33563 },
33564 outputs: []outputInfo{
33565 {0, 1006632944},
33566 },
33567 },
33568 },
33569 {
33570 name: "MOVWreg",
33571 argLen: 1,
33572 asm: riscv.AMOVW,
33573 reg: regInfo{
33574 inputs: []inputInfo{
33575 {0, 1006632944},
33576 },
33577 outputs: []outputInfo{
33578 {0, 1006632944},
33579 },
33580 },
33581 },
33582 {
33583 name: "MOVDreg",
33584 argLen: 1,
33585 asm: riscv.AMOV,
33586 reg: regInfo{
33587 inputs: []inputInfo{
33588 {0, 1006632944},
33589 },
33590 outputs: []outputInfo{
33591 {0, 1006632944},
33592 },
33593 },
33594 },
33595 {
33596 name: "MOVBUreg",
33597 argLen: 1,
33598 asm: riscv.AMOVBU,
33599 reg: regInfo{
33600 inputs: []inputInfo{
33601 {0, 1006632944},
33602 },
33603 outputs: []outputInfo{
33604 {0, 1006632944},
33605 },
33606 },
33607 },
33608 {
33609 name: "MOVHUreg",
33610 argLen: 1,
33611 asm: riscv.AMOVHU,
33612 reg: regInfo{
33613 inputs: []inputInfo{
33614 {0, 1006632944},
33615 },
33616 outputs: []outputInfo{
33617 {0, 1006632944},
33618 },
33619 },
33620 },
33621 {
33622 name: "MOVWUreg",
33623 argLen: 1,
33624 asm: riscv.AMOVWU,
33625 reg: regInfo{
33626 inputs: []inputInfo{
33627 {0, 1006632944},
33628 },
33629 outputs: []outputInfo{
33630 {0, 1006632944},
33631 },
33632 },
33633 },
33634 {
33635 name: "MOVDnop",
33636 argLen: 1,
33637 resultInArg0: true,
33638 reg: regInfo{
33639 inputs: []inputInfo{
33640 {0, 1006632944},
33641 },
33642 outputs: []outputInfo{
33643 {0, 1006632944},
33644 },
33645 },
33646 },
33647 {
33648 name: "SLL",
33649 argLen: 2,
33650 asm: riscv.ASLL,
33651 reg: regInfo{
33652 inputs: []inputInfo{
33653 {0, 1006632944},
33654 {1, 1006632944},
33655 },
33656 outputs: []outputInfo{
33657 {0, 1006632944},
33658 },
33659 },
33660 },
33661 {
33662 name: "SLLW",
33663 argLen: 2,
33664 asm: riscv.ASLLW,
33665 reg: regInfo{
33666 inputs: []inputInfo{
33667 {0, 1006632944},
33668 {1, 1006632944},
33669 },
33670 outputs: []outputInfo{
33671 {0, 1006632944},
33672 },
33673 },
33674 },
33675 {
33676 name: "SRA",
33677 argLen: 2,
33678 asm: riscv.ASRA,
33679 reg: regInfo{
33680 inputs: []inputInfo{
33681 {0, 1006632944},
33682 {1, 1006632944},
33683 },
33684 outputs: []outputInfo{
33685 {0, 1006632944},
33686 },
33687 },
33688 },
33689 {
33690 name: "SRAW",
33691 argLen: 2,
33692 asm: riscv.ASRAW,
33693 reg: regInfo{
33694 inputs: []inputInfo{
33695 {0, 1006632944},
33696 {1, 1006632944},
33697 },
33698 outputs: []outputInfo{
33699 {0, 1006632944},
33700 },
33701 },
33702 },
33703 {
33704 name: "SRL",
33705 argLen: 2,
33706 asm: riscv.ASRL,
33707 reg: regInfo{
33708 inputs: []inputInfo{
33709 {0, 1006632944},
33710 {1, 1006632944},
33711 },
33712 outputs: []outputInfo{
33713 {0, 1006632944},
33714 },
33715 },
33716 },
33717 {
33718 name: "SRLW",
33719 argLen: 2,
33720 asm: riscv.ASRLW,
33721 reg: regInfo{
33722 inputs: []inputInfo{
33723 {0, 1006632944},
33724 {1, 1006632944},
33725 },
33726 outputs: []outputInfo{
33727 {0, 1006632944},
33728 },
33729 },
33730 },
33731 {
33732 name: "SLLI",
33733 auxType: auxInt64,
33734 argLen: 1,
33735 asm: riscv.ASLLI,
33736 reg: regInfo{
33737 inputs: []inputInfo{
33738 {0, 1006632944},
33739 },
33740 outputs: []outputInfo{
33741 {0, 1006632944},
33742 },
33743 },
33744 },
33745 {
33746 name: "SLLIW",
33747 auxType: auxInt64,
33748 argLen: 1,
33749 asm: riscv.ASLLIW,
33750 reg: regInfo{
33751 inputs: []inputInfo{
33752 {0, 1006632944},
33753 },
33754 outputs: []outputInfo{
33755 {0, 1006632944},
33756 },
33757 },
33758 },
33759 {
33760 name: "SRAI",
33761 auxType: auxInt64,
33762 argLen: 1,
33763 asm: riscv.ASRAI,
33764 reg: regInfo{
33765 inputs: []inputInfo{
33766 {0, 1006632944},
33767 },
33768 outputs: []outputInfo{
33769 {0, 1006632944},
33770 },
33771 },
33772 },
33773 {
33774 name: "SRAIW",
33775 auxType: auxInt64,
33776 argLen: 1,
33777 asm: riscv.ASRAIW,
33778 reg: regInfo{
33779 inputs: []inputInfo{
33780 {0, 1006632944},
33781 },
33782 outputs: []outputInfo{
33783 {0, 1006632944},
33784 },
33785 },
33786 },
33787 {
33788 name: "SRLI",
33789 auxType: auxInt64,
33790 argLen: 1,
33791 asm: riscv.ASRLI,
33792 reg: regInfo{
33793 inputs: []inputInfo{
33794 {0, 1006632944},
33795 },
33796 outputs: []outputInfo{
33797 {0, 1006632944},
33798 },
33799 },
33800 },
33801 {
33802 name: "SRLIW",
33803 auxType: auxInt64,
33804 argLen: 1,
33805 asm: riscv.ASRLIW,
33806 reg: regInfo{
33807 inputs: []inputInfo{
33808 {0, 1006632944},
33809 },
33810 outputs: []outputInfo{
33811 {0, 1006632944},
33812 },
33813 },
33814 },
33815 {
33816 name: "SH1ADD",
33817 argLen: 2,
33818 asm: riscv.ASH1ADD,
33819 reg: regInfo{
33820 inputs: []inputInfo{
33821 {0, 1006632944},
33822 {1, 1006632944},
33823 },
33824 outputs: []outputInfo{
33825 {0, 1006632944},
33826 },
33827 },
33828 },
33829 {
33830 name: "SH2ADD",
33831 argLen: 2,
33832 asm: riscv.ASH2ADD,
33833 reg: regInfo{
33834 inputs: []inputInfo{
33835 {0, 1006632944},
33836 {1, 1006632944},
33837 },
33838 outputs: []outputInfo{
33839 {0, 1006632944},
33840 },
33841 },
33842 },
33843 {
33844 name: "SH3ADD",
33845 argLen: 2,
33846 asm: riscv.ASH3ADD,
33847 reg: regInfo{
33848 inputs: []inputInfo{
33849 {0, 1006632944},
33850 {1, 1006632944},
33851 },
33852 outputs: []outputInfo{
33853 {0, 1006632944},
33854 },
33855 },
33856 },
33857 {
33858 name: "AND",
33859 argLen: 2,
33860 commutative: true,
33861 asm: riscv.AAND,
33862 reg: regInfo{
33863 inputs: []inputInfo{
33864 {0, 1006632944},
33865 {1, 1006632944},
33866 },
33867 outputs: []outputInfo{
33868 {0, 1006632944},
33869 },
33870 },
33871 },
33872 {
33873 name: "ANDN",
33874 argLen: 2,
33875 asm: riscv.AANDN,
33876 reg: regInfo{
33877 inputs: []inputInfo{
33878 {0, 1006632944},
33879 {1, 1006632944},
33880 },
33881 outputs: []outputInfo{
33882 {0, 1006632944},
33883 },
33884 },
33885 },
33886 {
33887 name: "ANDI",
33888 auxType: auxInt64,
33889 argLen: 1,
33890 asm: riscv.AANDI,
33891 reg: regInfo{
33892 inputs: []inputInfo{
33893 {0, 1006632944},
33894 },
33895 outputs: []outputInfo{
33896 {0, 1006632944},
33897 },
33898 },
33899 },
33900 {
33901 name: "CLZ",
33902 argLen: 1,
33903 asm: riscv.ACLZ,
33904 reg: regInfo{
33905 inputs: []inputInfo{
33906 {0, 1006632944},
33907 },
33908 outputs: []outputInfo{
33909 {0, 1006632944},
33910 },
33911 },
33912 },
33913 {
33914 name: "CLZW",
33915 argLen: 1,
33916 asm: riscv.ACLZW,
33917 reg: regInfo{
33918 inputs: []inputInfo{
33919 {0, 1006632944},
33920 },
33921 outputs: []outputInfo{
33922 {0, 1006632944},
33923 },
33924 },
33925 },
33926 {
33927 name: "CPOP",
33928 argLen: 1,
33929 asm: riscv.ACPOP,
33930 reg: regInfo{
33931 inputs: []inputInfo{
33932 {0, 1006632944},
33933 },
33934 outputs: []outputInfo{
33935 {0, 1006632944},
33936 },
33937 },
33938 },
33939 {
33940 name: "CPOPW",
33941 argLen: 1,
33942 asm: riscv.ACPOPW,
33943 reg: regInfo{
33944 inputs: []inputInfo{
33945 {0, 1006632944},
33946 },
33947 outputs: []outputInfo{
33948 {0, 1006632944},
33949 },
33950 },
33951 },
33952 {
33953 name: "CTZ",
33954 argLen: 1,
33955 asm: riscv.ACTZ,
33956 reg: regInfo{
33957 inputs: []inputInfo{
33958 {0, 1006632944},
33959 },
33960 outputs: []outputInfo{
33961 {0, 1006632944},
33962 },
33963 },
33964 },
33965 {
33966 name: "CTZW",
33967 argLen: 1,
33968 asm: riscv.ACTZW,
33969 reg: regInfo{
33970 inputs: []inputInfo{
33971 {0, 1006632944},
33972 },
33973 outputs: []outputInfo{
33974 {0, 1006632944},
33975 },
33976 },
33977 },
33978 {
33979 name: "NOT",
33980 argLen: 1,
33981 asm: riscv.ANOT,
33982 reg: regInfo{
33983 inputs: []inputInfo{
33984 {0, 1006632944},
33985 },
33986 outputs: []outputInfo{
33987 {0, 1006632944},
33988 },
33989 },
33990 },
33991 {
33992 name: "OR",
33993 argLen: 2,
33994 commutative: true,
33995 asm: riscv.AOR,
33996 reg: regInfo{
33997 inputs: []inputInfo{
33998 {0, 1006632944},
33999 {1, 1006632944},
34000 },
34001 outputs: []outputInfo{
34002 {0, 1006632944},
34003 },
34004 },
34005 },
34006 {
34007 name: "ORN",
34008 argLen: 2,
34009 asm: riscv.AORN,
34010 reg: regInfo{
34011 inputs: []inputInfo{
34012 {0, 1006632944},
34013 {1, 1006632944},
34014 },
34015 outputs: []outputInfo{
34016 {0, 1006632944},
34017 },
34018 },
34019 },
34020 {
34021 name: "ORI",
34022 auxType: auxInt64,
34023 argLen: 1,
34024 asm: riscv.AORI,
34025 reg: regInfo{
34026 inputs: []inputInfo{
34027 {0, 1006632944},
34028 },
34029 outputs: []outputInfo{
34030 {0, 1006632944},
34031 },
34032 },
34033 },
34034 {
34035 name: "REV8",
34036 argLen: 1,
34037 asm: riscv.AREV8,
34038 reg: regInfo{
34039 inputs: []inputInfo{
34040 {0, 1006632944},
34041 },
34042 outputs: []outputInfo{
34043 {0, 1006632944},
34044 },
34045 },
34046 },
34047 {
34048 name: "ROL",
34049 argLen: 2,
34050 asm: riscv.AROL,
34051 reg: regInfo{
34052 inputs: []inputInfo{
34053 {0, 1006632944},
34054 {1, 1006632944},
34055 },
34056 outputs: []outputInfo{
34057 {0, 1006632944},
34058 },
34059 },
34060 },
34061 {
34062 name: "ROLW",
34063 argLen: 2,
34064 asm: riscv.AROLW,
34065 reg: regInfo{
34066 inputs: []inputInfo{
34067 {0, 1006632944},
34068 {1, 1006632944},
34069 },
34070 outputs: []outputInfo{
34071 {0, 1006632944},
34072 },
34073 },
34074 },
34075 {
34076 name: "ROR",
34077 argLen: 2,
34078 asm: riscv.AROR,
34079 reg: regInfo{
34080 inputs: []inputInfo{
34081 {0, 1006632944},
34082 {1, 1006632944},
34083 },
34084 outputs: []outputInfo{
34085 {0, 1006632944},
34086 },
34087 },
34088 },
34089 {
34090 name: "RORI",
34091 auxType: auxInt64,
34092 argLen: 1,
34093 asm: riscv.ARORI,
34094 reg: regInfo{
34095 inputs: []inputInfo{
34096 {0, 1006632944},
34097 },
34098 outputs: []outputInfo{
34099 {0, 1006632944},
34100 },
34101 },
34102 },
34103 {
34104 name: "RORIW",
34105 auxType: auxInt64,
34106 argLen: 1,
34107 asm: riscv.ARORIW,
34108 reg: regInfo{
34109 inputs: []inputInfo{
34110 {0, 1006632944},
34111 },
34112 outputs: []outputInfo{
34113 {0, 1006632944},
34114 },
34115 },
34116 },
34117 {
34118 name: "RORW",
34119 argLen: 2,
34120 asm: riscv.ARORW,
34121 reg: regInfo{
34122 inputs: []inputInfo{
34123 {0, 1006632944},
34124 {1, 1006632944},
34125 },
34126 outputs: []outputInfo{
34127 {0, 1006632944},
34128 },
34129 },
34130 },
34131 {
34132 name: "XNOR",
34133 argLen: 2,
34134 commutative: true,
34135 asm: riscv.AXNOR,
34136 reg: regInfo{
34137 inputs: []inputInfo{
34138 {0, 1006632944},
34139 {1, 1006632944},
34140 },
34141 outputs: []outputInfo{
34142 {0, 1006632944},
34143 },
34144 },
34145 },
34146 {
34147 name: "XOR",
34148 argLen: 2,
34149 commutative: true,
34150 asm: riscv.AXOR,
34151 reg: regInfo{
34152 inputs: []inputInfo{
34153 {0, 1006632944},
34154 {1, 1006632944},
34155 },
34156 outputs: []outputInfo{
34157 {0, 1006632944},
34158 },
34159 },
34160 },
34161 {
34162 name: "XORI",
34163 auxType: auxInt64,
34164 argLen: 1,
34165 asm: riscv.AXORI,
34166 reg: regInfo{
34167 inputs: []inputInfo{
34168 {0, 1006632944},
34169 },
34170 outputs: []outputInfo{
34171 {0, 1006632944},
34172 },
34173 },
34174 },
34175 {
34176 name: "MIN",
34177 argLen: 2,
34178 commutative: true,
34179 asm: riscv.AMIN,
34180 reg: regInfo{
34181 inputs: []inputInfo{
34182 {0, 1006632944},
34183 {1, 1006632944},
34184 },
34185 outputs: []outputInfo{
34186 {0, 1006632944},
34187 },
34188 },
34189 },
34190 {
34191 name: "MAX",
34192 argLen: 2,
34193 commutative: true,
34194 asm: riscv.AMAX,
34195 reg: regInfo{
34196 inputs: []inputInfo{
34197 {0, 1006632944},
34198 {1, 1006632944},
34199 },
34200 outputs: []outputInfo{
34201 {0, 1006632944},
34202 },
34203 },
34204 },
34205 {
34206 name: "MINU",
34207 argLen: 2,
34208 commutative: true,
34209 asm: riscv.AMINU,
34210 reg: regInfo{
34211 inputs: []inputInfo{
34212 {0, 1006632944},
34213 {1, 1006632944},
34214 },
34215 outputs: []outputInfo{
34216 {0, 1006632944},
34217 },
34218 },
34219 },
34220 {
34221 name: "MAXU",
34222 argLen: 2,
34223 commutative: true,
34224 asm: riscv.AMAXU,
34225 reg: regInfo{
34226 inputs: []inputInfo{
34227 {0, 1006632944},
34228 {1, 1006632944},
34229 },
34230 outputs: []outputInfo{
34231 {0, 1006632944},
34232 },
34233 },
34234 },
34235 {
34236 name: "SEQZ",
34237 argLen: 1,
34238 asm: riscv.ASEQZ,
34239 reg: regInfo{
34240 inputs: []inputInfo{
34241 {0, 1006632944},
34242 },
34243 outputs: []outputInfo{
34244 {0, 1006632944},
34245 },
34246 },
34247 },
34248 {
34249 name: "SNEZ",
34250 argLen: 1,
34251 asm: riscv.ASNEZ,
34252 reg: regInfo{
34253 inputs: []inputInfo{
34254 {0, 1006632944},
34255 },
34256 outputs: []outputInfo{
34257 {0, 1006632944},
34258 },
34259 },
34260 },
34261 {
34262 name: "SLT",
34263 argLen: 2,
34264 asm: riscv.ASLT,
34265 reg: regInfo{
34266 inputs: []inputInfo{
34267 {0, 1006632944},
34268 {1, 1006632944},
34269 },
34270 outputs: []outputInfo{
34271 {0, 1006632944},
34272 },
34273 },
34274 },
34275 {
34276 name: "SLTI",
34277 auxType: auxInt64,
34278 argLen: 1,
34279 asm: riscv.ASLTI,
34280 reg: regInfo{
34281 inputs: []inputInfo{
34282 {0, 1006632944},
34283 },
34284 outputs: []outputInfo{
34285 {0, 1006632944},
34286 },
34287 },
34288 },
34289 {
34290 name: "SLTU",
34291 argLen: 2,
34292 asm: riscv.ASLTU,
34293 reg: regInfo{
34294 inputs: []inputInfo{
34295 {0, 1006632944},
34296 {1, 1006632944},
34297 },
34298 outputs: []outputInfo{
34299 {0, 1006632944},
34300 },
34301 },
34302 },
34303 {
34304 name: "SLTIU",
34305 auxType: auxInt64,
34306 argLen: 1,
34307 asm: riscv.ASLTIU,
34308 reg: regInfo{
34309 inputs: []inputInfo{
34310 {0, 1006632944},
34311 },
34312 outputs: []outputInfo{
34313 {0, 1006632944},
34314 },
34315 },
34316 },
34317 {
34318 name: "LoweredRound32F",
34319 argLen: 1,
34320 resultInArg0: true,
34321 reg: regInfo{
34322 inputs: []inputInfo{
34323 {0, 9223372034707292160},
34324 },
34325 outputs: []outputInfo{
34326 {0, 9223372034707292160},
34327 },
34328 },
34329 },
34330 {
34331 name: "LoweredRound64F",
34332 argLen: 1,
34333 resultInArg0: true,
34334 reg: regInfo{
34335 inputs: []inputInfo{
34336 {0, 9223372034707292160},
34337 },
34338 outputs: []outputInfo{
34339 {0, 9223372034707292160},
34340 },
34341 },
34342 },
34343 {
34344 name: "CALLstatic",
34345 auxType: auxCallOff,
34346 argLen: -1,
34347 call: true,
34348 reg: regInfo{
34349 clobbers: 9223372035781033968,
34350 },
34351 },
34352 {
34353 name: "CALLtail",
34354 auxType: auxCallOff,
34355 argLen: -1,
34356 call: true,
34357 tailCall: true,
34358 reg: regInfo{
34359 clobbers: 9223372035781033968,
34360 },
34361 },
34362 {
34363 name: "CALLclosure",
34364 auxType: auxCallOff,
34365 argLen: -1,
34366 call: true,
34367 reg: regInfo{
34368 inputs: []inputInfo{
34369 {1, 33554432},
34370 {0, 1006632946},
34371 },
34372 clobbers: 9223372035781033968,
34373 },
34374 },
34375 {
34376 name: "CALLinter",
34377 auxType: auxCallOff,
34378 argLen: -1,
34379 call: true,
34380 reg: regInfo{
34381 inputs: []inputInfo{
34382 {0, 1006632944},
34383 },
34384 clobbers: 9223372035781033968,
34385 },
34386 },
34387 {
34388 name: "DUFFZERO",
34389 auxType: auxInt64,
34390 argLen: 2,
34391 faultOnNilArg0: true,
34392 reg: regInfo{
34393 inputs: []inputInfo{
34394 {0, 16777216},
34395 },
34396 clobbers: 16777216,
34397 },
34398 },
34399 {
34400 name: "DUFFCOPY",
34401 auxType: auxInt64,
34402 argLen: 3,
34403 faultOnNilArg0: true,
34404 faultOnNilArg1: true,
34405 reg: regInfo{
34406 inputs: []inputInfo{
34407 {0, 16777216},
34408 {1, 8388608},
34409 },
34410 clobbers: 25165824,
34411 },
34412 },
34413 {
34414 name: "LoweredZero",
34415 auxType: auxInt64,
34416 argLen: 3,
34417 faultOnNilArg0: true,
34418 reg: regInfo{
34419 inputs: []inputInfo{
34420 {0, 16},
34421 {1, 1006632944},
34422 },
34423 clobbers: 16,
34424 },
34425 },
34426 {
34427 name: "LoweredMove",
34428 auxType: auxInt64,
34429 argLen: 4,
34430 faultOnNilArg0: true,
34431 faultOnNilArg1: true,
34432 reg: regInfo{
34433 inputs: []inputInfo{
34434 {0, 16},
34435 {1, 32},
34436 {2, 1006632880},
34437 },
34438 clobbers: 112,
34439 },
34440 },
34441 {
34442 name: "LoweredAtomicLoad8",
34443 argLen: 2,
34444 faultOnNilArg0: true,
34445 reg: regInfo{
34446 inputs: []inputInfo{
34447 {0, 9223372037861408754},
34448 },
34449 outputs: []outputInfo{
34450 {0, 1006632944},
34451 },
34452 },
34453 },
34454 {
34455 name: "LoweredAtomicLoad32",
34456 argLen: 2,
34457 faultOnNilArg0: true,
34458 reg: regInfo{
34459 inputs: []inputInfo{
34460 {0, 9223372037861408754},
34461 },
34462 outputs: []outputInfo{
34463 {0, 1006632944},
34464 },
34465 },
34466 },
34467 {
34468 name: "LoweredAtomicLoad64",
34469 argLen: 2,
34470 faultOnNilArg0: true,
34471 reg: regInfo{
34472 inputs: []inputInfo{
34473 {0, 9223372037861408754},
34474 },
34475 outputs: []outputInfo{
34476 {0, 1006632944},
34477 },
34478 },
34479 },
34480 {
34481 name: "LoweredAtomicStore8",
34482 argLen: 3,
34483 faultOnNilArg0: true,
34484 hasSideEffects: true,
34485 reg: regInfo{
34486 inputs: []inputInfo{
34487 {1, 1006632946},
34488 {0, 9223372037861408754},
34489 },
34490 },
34491 },
34492 {
34493 name: "LoweredAtomicStore32",
34494 argLen: 3,
34495 faultOnNilArg0: true,
34496 hasSideEffects: true,
34497 reg: regInfo{
34498 inputs: []inputInfo{
34499 {1, 1006632946},
34500 {0, 9223372037861408754},
34501 },
34502 },
34503 },
34504 {
34505 name: "LoweredAtomicStore64",
34506 argLen: 3,
34507 faultOnNilArg0: true,
34508 hasSideEffects: true,
34509 reg: regInfo{
34510 inputs: []inputInfo{
34511 {1, 1006632946},
34512 {0, 9223372037861408754},
34513 },
34514 },
34515 },
34516 {
34517 name: "LoweredAtomicExchange32",
34518 argLen: 3,
34519 resultNotInArgs: true,
34520 faultOnNilArg0: true,
34521 hasSideEffects: true,
34522 reg: regInfo{
34523 inputs: []inputInfo{
34524 {1, 1073741808},
34525 {0, 9223372037928517618},
34526 },
34527 outputs: []outputInfo{
34528 {0, 1006632944},
34529 },
34530 },
34531 },
34532 {
34533 name: "LoweredAtomicExchange64",
34534 argLen: 3,
34535 resultNotInArgs: true,
34536 faultOnNilArg0: true,
34537 hasSideEffects: true,
34538 reg: regInfo{
34539 inputs: []inputInfo{
34540 {1, 1073741808},
34541 {0, 9223372037928517618},
34542 },
34543 outputs: []outputInfo{
34544 {0, 1006632944},
34545 },
34546 },
34547 },
34548 {
34549 name: "LoweredAtomicAdd32",
34550 argLen: 3,
34551 resultNotInArgs: true,
34552 faultOnNilArg0: true,
34553 hasSideEffects: true,
34554 unsafePoint: true,
34555 reg: regInfo{
34556 inputs: []inputInfo{
34557 {1, 1073741808},
34558 {0, 9223372037928517618},
34559 },
34560 outputs: []outputInfo{
34561 {0, 1006632944},
34562 },
34563 },
34564 },
34565 {
34566 name: "LoweredAtomicAdd64",
34567 argLen: 3,
34568 resultNotInArgs: true,
34569 faultOnNilArg0: true,
34570 hasSideEffects: true,
34571 unsafePoint: true,
34572 reg: regInfo{
34573 inputs: []inputInfo{
34574 {1, 1073741808},
34575 {0, 9223372037928517618},
34576 },
34577 outputs: []outputInfo{
34578 {0, 1006632944},
34579 },
34580 },
34581 },
34582 {
34583 name: "LoweredAtomicCas32",
34584 argLen: 4,
34585 resultNotInArgs: true,
34586 faultOnNilArg0: true,
34587 hasSideEffects: true,
34588 unsafePoint: true,
34589 reg: regInfo{
34590 inputs: []inputInfo{
34591 {1, 1073741808},
34592 {2, 1073741808},
34593 {0, 9223372037928517618},
34594 },
34595 outputs: []outputInfo{
34596 {0, 1006632944},
34597 },
34598 },
34599 },
34600 {
34601 name: "LoweredAtomicCas64",
34602 argLen: 4,
34603 resultNotInArgs: true,
34604 faultOnNilArg0: true,
34605 hasSideEffects: true,
34606 unsafePoint: true,
34607 reg: regInfo{
34608 inputs: []inputInfo{
34609 {1, 1073741808},
34610 {2, 1073741808},
34611 {0, 9223372037928517618},
34612 },
34613 outputs: []outputInfo{
34614 {0, 1006632944},
34615 },
34616 },
34617 },
34618 {
34619 name: "LoweredAtomicAnd32",
34620 argLen: 3,
34621 faultOnNilArg0: true,
34622 hasSideEffects: true,
34623 asm: riscv.AAMOANDW,
34624 reg: regInfo{
34625 inputs: []inputInfo{
34626 {1, 1073741808},
34627 {0, 9223372037928517618},
34628 },
34629 },
34630 },
34631 {
34632 name: "LoweredAtomicOr32",
34633 argLen: 3,
34634 faultOnNilArg0: true,
34635 hasSideEffects: true,
34636 asm: riscv.AAMOORW,
34637 reg: regInfo{
34638 inputs: []inputInfo{
34639 {1, 1073741808},
34640 {0, 9223372037928517618},
34641 },
34642 },
34643 },
34644 {
34645 name: "LoweredNilCheck",
34646 argLen: 2,
34647 nilCheck: true,
34648 faultOnNilArg0: true,
34649 reg: regInfo{
34650 inputs: []inputInfo{
34651 {0, 1006632946},
34652 },
34653 },
34654 },
34655 {
34656 name: "LoweredGetClosurePtr",
34657 argLen: 0,
34658 reg: regInfo{
34659 outputs: []outputInfo{
34660 {0, 33554432},
34661 },
34662 },
34663 },
34664 {
34665 name: "LoweredGetCallerSP",
34666 argLen: 1,
34667 rematerializeable: true,
34668 reg: regInfo{
34669 outputs: []outputInfo{
34670 {0, 1006632944},
34671 },
34672 },
34673 },
34674 {
34675 name: "LoweredGetCallerPC",
34676 argLen: 0,
34677 rematerializeable: true,
34678 reg: regInfo{
34679 outputs: []outputInfo{
34680 {0, 1006632944},
34681 },
34682 },
34683 },
34684 {
34685 name: "LoweredWB",
34686 auxType: auxInt64,
34687 argLen: 1,
34688 clobberFlags: true,
34689 reg: regInfo{
34690 clobbers: 9223372034707292160,
34691 outputs: []outputInfo{
34692 {0, 8388608},
34693 },
34694 },
34695 },
34696 {
34697 name: "LoweredPubBarrier",
34698 argLen: 1,
34699 hasSideEffects: true,
34700 asm: riscv.AFENCE,
34701 reg: regInfo{},
34702 },
34703 {
34704 name: "LoweredPanicBoundsA",
34705 auxType: auxInt64,
34706 argLen: 3,
34707 call: true,
34708 reg: regInfo{
34709 inputs: []inputInfo{
34710 {0, 64},
34711 {1, 134217728},
34712 },
34713 },
34714 },
34715 {
34716 name: "LoweredPanicBoundsB",
34717 auxType: auxInt64,
34718 argLen: 3,
34719 call: true,
34720 reg: regInfo{
34721 inputs: []inputInfo{
34722 {0, 32},
34723 {1, 64},
34724 },
34725 },
34726 },
34727 {
34728 name: "LoweredPanicBoundsC",
34729 auxType: auxInt64,
34730 argLen: 3,
34731 call: true,
34732 reg: regInfo{
34733 inputs: []inputInfo{
34734 {0, 16},
34735 {1, 32},
34736 },
34737 },
34738 },
34739 {
34740 name: "FADDS",
34741 argLen: 2,
34742 commutative: true,
34743 asm: riscv.AFADDS,
34744 reg: regInfo{
34745 inputs: []inputInfo{
34746 {0, 9223372034707292160},
34747 {1, 9223372034707292160},
34748 },
34749 outputs: []outputInfo{
34750 {0, 9223372034707292160},
34751 },
34752 },
34753 },
34754 {
34755 name: "FSUBS",
34756 argLen: 2,
34757 asm: riscv.AFSUBS,
34758 reg: regInfo{
34759 inputs: []inputInfo{
34760 {0, 9223372034707292160},
34761 {1, 9223372034707292160},
34762 },
34763 outputs: []outputInfo{
34764 {0, 9223372034707292160},
34765 },
34766 },
34767 },
34768 {
34769 name: "FMULS",
34770 argLen: 2,
34771 commutative: true,
34772 asm: riscv.AFMULS,
34773 reg: regInfo{
34774 inputs: []inputInfo{
34775 {0, 9223372034707292160},
34776 {1, 9223372034707292160},
34777 },
34778 outputs: []outputInfo{
34779 {0, 9223372034707292160},
34780 },
34781 },
34782 },
34783 {
34784 name: "FDIVS",
34785 argLen: 2,
34786 asm: riscv.AFDIVS,
34787 reg: regInfo{
34788 inputs: []inputInfo{
34789 {0, 9223372034707292160},
34790 {1, 9223372034707292160},
34791 },
34792 outputs: []outputInfo{
34793 {0, 9223372034707292160},
34794 },
34795 },
34796 },
34797 {
34798 name: "FMADDS",
34799 argLen: 3,
34800 commutative: true,
34801 asm: riscv.AFMADDS,
34802 reg: regInfo{
34803 inputs: []inputInfo{
34804 {0, 9223372034707292160},
34805 {1, 9223372034707292160},
34806 {2, 9223372034707292160},
34807 },
34808 outputs: []outputInfo{
34809 {0, 9223372034707292160},
34810 },
34811 },
34812 },
34813 {
34814 name: "FMSUBS",
34815 argLen: 3,
34816 commutative: true,
34817 asm: riscv.AFMSUBS,
34818 reg: regInfo{
34819 inputs: []inputInfo{
34820 {0, 9223372034707292160},
34821 {1, 9223372034707292160},
34822 {2, 9223372034707292160},
34823 },
34824 outputs: []outputInfo{
34825 {0, 9223372034707292160},
34826 },
34827 },
34828 },
34829 {
34830 name: "FNMADDS",
34831 argLen: 3,
34832 commutative: true,
34833 asm: riscv.AFNMADDS,
34834 reg: regInfo{
34835 inputs: []inputInfo{
34836 {0, 9223372034707292160},
34837 {1, 9223372034707292160},
34838 {2, 9223372034707292160},
34839 },
34840 outputs: []outputInfo{
34841 {0, 9223372034707292160},
34842 },
34843 },
34844 },
34845 {
34846 name: "FNMSUBS",
34847 argLen: 3,
34848 commutative: true,
34849 asm: riscv.AFNMSUBS,
34850 reg: regInfo{
34851 inputs: []inputInfo{
34852 {0, 9223372034707292160},
34853 {1, 9223372034707292160},
34854 {2, 9223372034707292160},
34855 },
34856 outputs: []outputInfo{
34857 {0, 9223372034707292160},
34858 },
34859 },
34860 },
34861 {
34862 name: "FSQRTS",
34863 argLen: 1,
34864 asm: riscv.AFSQRTS,
34865 reg: regInfo{
34866 inputs: []inputInfo{
34867 {0, 9223372034707292160},
34868 },
34869 outputs: []outputInfo{
34870 {0, 9223372034707292160},
34871 },
34872 },
34873 },
34874 {
34875 name: "FNEGS",
34876 argLen: 1,
34877 asm: riscv.AFNEGS,
34878 reg: regInfo{
34879 inputs: []inputInfo{
34880 {0, 9223372034707292160},
34881 },
34882 outputs: []outputInfo{
34883 {0, 9223372034707292160},
34884 },
34885 },
34886 },
34887 {
34888 name: "FMVSX",
34889 argLen: 1,
34890 asm: riscv.AFMVSX,
34891 reg: regInfo{
34892 inputs: []inputInfo{
34893 {0, 1006632944},
34894 },
34895 outputs: []outputInfo{
34896 {0, 9223372034707292160},
34897 },
34898 },
34899 },
34900 {
34901 name: "FCVTSW",
34902 argLen: 1,
34903 asm: riscv.AFCVTSW,
34904 reg: regInfo{
34905 inputs: []inputInfo{
34906 {0, 1006632944},
34907 },
34908 outputs: []outputInfo{
34909 {0, 9223372034707292160},
34910 },
34911 },
34912 },
34913 {
34914 name: "FCVTSL",
34915 argLen: 1,
34916 asm: riscv.AFCVTSL,
34917 reg: regInfo{
34918 inputs: []inputInfo{
34919 {0, 1006632944},
34920 },
34921 outputs: []outputInfo{
34922 {0, 9223372034707292160},
34923 },
34924 },
34925 },
34926 {
34927 name: "FCVTWS",
34928 argLen: 1,
34929 asm: riscv.AFCVTWS,
34930 reg: regInfo{
34931 inputs: []inputInfo{
34932 {0, 9223372034707292160},
34933 },
34934 outputs: []outputInfo{
34935 {0, 1006632944},
34936 },
34937 },
34938 },
34939 {
34940 name: "FCVTLS",
34941 argLen: 1,
34942 asm: riscv.AFCVTLS,
34943 reg: regInfo{
34944 inputs: []inputInfo{
34945 {0, 9223372034707292160},
34946 },
34947 outputs: []outputInfo{
34948 {0, 1006632944},
34949 },
34950 },
34951 },
34952 {
34953 name: "FMOVWload",
34954 auxType: auxSymOff,
34955 argLen: 2,
34956 faultOnNilArg0: true,
34957 symEffect: SymRead,
34958 asm: riscv.AMOVF,
34959 reg: regInfo{
34960 inputs: []inputInfo{
34961 {0, 9223372037861408754},
34962 },
34963 outputs: []outputInfo{
34964 {0, 9223372034707292160},
34965 },
34966 },
34967 },
34968 {
34969 name: "FMOVWstore",
34970 auxType: auxSymOff,
34971 argLen: 3,
34972 faultOnNilArg0: true,
34973 symEffect: SymWrite,
34974 asm: riscv.AMOVF,
34975 reg: regInfo{
34976 inputs: []inputInfo{
34977 {0, 9223372037861408754},
34978 {1, 9223372034707292160},
34979 },
34980 },
34981 },
34982 {
34983 name: "FEQS",
34984 argLen: 2,
34985 commutative: true,
34986 asm: riscv.AFEQS,
34987 reg: regInfo{
34988 inputs: []inputInfo{
34989 {0, 9223372034707292160},
34990 {1, 9223372034707292160},
34991 },
34992 outputs: []outputInfo{
34993 {0, 1006632944},
34994 },
34995 },
34996 },
34997 {
34998 name: "FNES",
34999 argLen: 2,
35000 commutative: true,
35001 asm: riscv.AFNES,
35002 reg: regInfo{
35003 inputs: []inputInfo{
35004 {0, 9223372034707292160},
35005 {1, 9223372034707292160},
35006 },
35007 outputs: []outputInfo{
35008 {0, 1006632944},
35009 },
35010 },
35011 },
35012 {
35013 name: "FLTS",
35014 argLen: 2,
35015 asm: riscv.AFLTS,
35016 reg: regInfo{
35017 inputs: []inputInfo{
35018 {0, 9223372034707292160},
35019 {1, 9223372034707292160},
35020 },
35021 outputs: []outputInfo{
35022 {0, 1006632944},
35023 },
35024 },
35025 },
35026 {
35027 name: "FLES",
35028 argLen: 2,
35029 asm: riscv.AFLES,
35030 reg: regInfo{
35031 inputs: []inputInfo{
35032 {0, 9223372034707292160},
35033 {1, 9223372034707292160},
35034 },
35035 outputs: []outputInfo{
35036 {0, 1006632944},
35037 },
35038 },
35039 },
35040 {
35041 name: "LoweredFMAXS",
35042 argLen: 2,
35043 commutative: true,
35044 resultNotInArgs: true,
35045 asm: riscv.AFMAXS,
35046 reg: regInfo{
35047 inputs: []inputInfo{
35048 {0, 9223372034707292160},
35049 {1, 9223372034707292160},
35050 },
35051 outputs: []outputInfo{
35052 {0, 9223372034707292160},
35053 },
35054 },
35055 },
35056 {
35057 name: "LoweredFMINS",
35058 argLen: 2,
35059 commutative: true,
35060 resultNotInArgs: true,
35061 asm: riscv.AFMINS,
35062 reg: regInfo{
35063 inputs: []inputInfo{
35064 {0, 9223372034707292160},
35065 {1, 9223372034707292160},
35066 },
35067 outputs: []outputInfo{
35068 {0, 9223372034707292160},
35069 },
35070 },
35071 },
35072 {
35073 name: "FADDD",
35074 argLen: 2,
35075 commutative: true,
35076 asm: riscv.AFADDD,
35077 reg: regInfo{
35078 inputs: []inputInfo{
35079 {0, 9223372034707292160},
35080 {1, 9223372034707292160},
35081 },
35082 outputs: []outputInfo{
35083 {0, 9223372034707292160},
35084 },
35085 },
35086 },
35087 {
35088 name: "FSUBD",
35089 argLen: 2,
35090 asm: riscv.AFSUBD,
35091 reg: regInfo{
35092 inputs: []inputInfo{
35093 {0, 9223372034707292160},
35094 {1, 9223372034707292160},
35095 },
35096 outputs: []outputInfo{
35097 {0, 9223372034707292160},
35098 },
35099 },
35100 },
35101 {
35102 name: "FMULD",
35103 argLen: 2,
35104 commutative: true,
35105 asm: riscv.AFMULD,
35106 reg: regInfo{
35107 inputs: []inputInfo{
35108 {0, 9223372034707292160},
35109 {1, 9223372034707292160},
35110 },
35111 outputs: []outputInfo{
35112 {0, 9223372034707292160},
35113 },
35114 },
35115 },
35116 {
35117 name: "FDIVD",
35118 argLen: 2,
35119 asm: riscv.AFDIVD,
35120 reg: regInfo{
35121 inputs: []inputInfo{
35122 {0, 9223372034707292160},
35123 {1, 9223372034707292160},
35124 },
35125 outputs: []outputInfo{
35126 {0, 9223372034707292160},
35127 },
35128 },
35129 },
35130 {
35131 name: "FMADDD",
35132 argLen: 3,
35133 commutative: true,
35134 asm: riscv.AFMADDD,
35135 reg: regInfo{
35136 inputs: []inputInfo{
35137 {0, 9223372034707292160},
35138 {1, 9223372034707292160},
35139 {2, 9223372034707292160},
35140 },
35141 outputs: []outputInfo{
35142 {0, 9223372034707292160},
35143 },
35144 },
35145 },
35146 {
35147 name: "FMSUBD",
35148 argLen: 3,
35149 commutative: true,
35150 asm: riscv.AFMSUBD,
35151 reg: regInfo{
35152 inputs: []inputInfo{
35153 {0, 9223372034707292160},
35154 {1, 9223372034707292160},
35155 {2, 9223372034707292160},
35156 },
35157 outputs: []outputInfo{
35158 {0, 9223372034707292160},
35159 },
35160 },
35161 },
35162 {
35163 name: "FNMADDD",
35164 argLen: 3,
35165 commutative: true,
35166 asm: riscv.AFNMADDD,
35167 reg: regInfo{
35168 inputs: []inputInfo{
35169 {0, 9223372034707292160},
35170 {1, 9223372034707292160},
35171 {2, 9223372034707292160},
35172 },
35173 outputs: []outputInfo{
35174 {0, 9223372034707292160},
35175 },
35176 },
35177 },
35178 {
35179 name: "FNMSUBD",
35180 argLen: 3,
35181 commutative: true,
35182 asm: riscv.AFNMSUBD,
35183 reg: regInfo{
35184 inputs: []inputInfo{
35185 {0, 9223372034707292160},
35186 {1, 9223372034707292160},
35187 {2, 9223372034707292160},
35188 },
35189 outputs: []outputInfo{
35190 {0, 9223372034707292160},
35191 },
35192 },
35193 },
35194 {
35195 name: "FSQRTD",
35196 argLen: 1,
35197 asm: riscv.AFSQRTD,
35198 reg: regInfo{
35199 inputs: []inputInfo{
35200 {0, 9223372034707292160},
35201 },
35202 outputs: []outputInfo{
35203 {0, 9223372034707292160},
35204 },
35205 },
35206 },
35207 {
35208 name: "FNEGD",
35209 argLen: 1,
35210 asm: riscv.AFNEGD,
35211 reg: regInfo{
35212 inputs: []inputInfo{
35213 {0, 9223372034707292160},
35214 },
35215 outputs: []outputInfo{
35216 {0, 9223372034707292160},
35217 },
35218 },
35219 },
35220 {
35221 name: "FABSD",
35222 argLen: 1,
35223 asm: riscv.AFABSD,
35224 reg: regInfo{
35225 inputs: []inputInfo{
35226 {0, 9223372034707292160},
35227 },
35228 outputs: []outputInfo{
35229 {0, 9223372034707292160},
35230 },
35231 },
35232 },
35233 {
35234 name: "FSGNJD",
35235 argLen: 2,
35236 asm: riscv.AFSGNJD,
35237 reg: regInfo{
35238 inputs: []inputInfo{
35239 {0, 9223372034707292160},
35240 {1, 9223372034707292160},
35241 },
35242 outputs: []outputInfo{
35243 {0, 9223372034707292160},
35244 },
35245 },
35246 },
35247 {
35248 name: "FMVDX",
35249 argLen: 1,
35250 asm: riscv.AFMVDX,
35251 reg: regInfo{
35252 inputs: []inputInfo{
35253 {0, 1006632944},
35254 },
35255 outputs: []outputInfo{
35256 {0, 9223372034707292160},
35257 },
35258 },
35259 },
35260 {
35261 name: "FCVTDW",
35262 argLen: 1,
35263 asm: riscv.AFCVTDW,
35264 reg: regInfo{
35265 inputs: []inputInfo{
35266 {0, 1006632944},
35267 },
35268 outputs: []outputInfo{
35269 {0, 9223372034707292160},
35270 },
35271 },
35272 },
35273 {
35274 name: "FCVTDL",
35275 argLen: 1,
35276 asm: riscv.AFCVTDL,
35277 reg: regInfo{
35278 inputs: []inputInfo{
35279 {0, 1006632944},
35280 },
35281 outputs: []outputInfo{
35282 {0, 9223372034707292160},
35283 },
35284 },
35285 },
35286 {
35287 name: "FCVTWD",
35288 argLen: 1,
35289 asm: riscv.AFCVTWD,
35290 reg: regInfo{
35291 inputs: []inputInfo{
35292 {0, 9223372034707292160},
35293 },
35294 outputs: []outputInfo{
35295 {0, 1006632944},
35296 },
35297 },
35298 },
35299 {
35300 name: "FCVTLD",
35301 argLen: 1,
35302 asm: riscv.AFCVTLD,
35303 reg: regInfo{
35304 inputs: []inputInfo{
35305 {0, 9223372034707292160},
35306 },
35307 outputs: []outputInfo{
35308 {0, 1006632944},
35309 },
35310 },
35311 },
35312 {
35313 name: "FCVTDS",
35314 argLen: 1,
35315 asm: riscv.AFCVTDS,
35316 reg: regInfo{
35317 inputs: []inputInfo{
35318 {0, 9223372034707292160},
35319 },
35320 outputs: []outputInfo{
35321 {0, 9223372034707292160},
35322 },
35323 },
35324 },
35325 {
35326 name: "FCVTSD",
35327 argLen: 1,
35328 asm: riscv.AFCVTSD,
35329 reg: regInfo{
35330 inputs: []inputInfo{
35331 {0, 9223372034707292160},
35332 },
35333 outputs: []outputInfo{
35334 {0, 9223372034707292160},
35335 },
35336 },
35337 },
35338 {
35339 name: "FMOVDload",
35340 auxType: auxSymOff,
35341 argLen: 2,
35342 faultOnNilArg0: true,
35343 symEffect: SymRead,
35344 asm: riscv.AMOVD,
35345 reg: regInfo{
35346 inputs: []inputInfo{
35347 {0, 9223372037861408754},
35348 },
35349 outputs: []outputInfo{
35350 {0, 9223372034707292160},
35351 },
35352 },
35353 },
35354 {
35355 name: "FMOVDstore",
35356 auxType: auxSymOff,
35357 argLen: 3,
35358 faultOnNilArg0: true,
35359 symEffect: SymWrite,
35360 asm: riscv.AMOVD,
35361 reg: regInfo{
35362 inputs: []inputInfo{
35363 {0, 9223372037861408754},
35364 {1, 9223372034707292160},
35365 },
35366 },
35367 },
35368 {
35369 name: "FEQD",
35370 argLen: 2,
35371 commutative: true,
35372 asm: riscv.AFEQD,
35373 reg: regInfo{
35374 inputs: []inputInfo{
35375 {0, 9223372034707292160},
35376 {1, 9223372034707292160},
35377 },
35378 outputs: []outputInfo{
35379 {0, 1006632944},
35380 },
35381 },
35382 },
35383 {
35384 name: "FNED",
35385 argLen: 2,
35386 commutative: true,
35387 asm: riscv.AFNED,
35388 reg: regInfo{
35389 inputs: []inputInfo{
35390 {0, 9223372034707292160},
35391 {1, 9223372034707292160},
35392 },
35393 outputs: []outputInfo{
35394 {0, 1006632944},
35395 },
35396 },
35397 },
35398 {
35399 name: "FLTD",
35400 argLen: 2,
35401 asm: riscv.AFLTD,
35402 reg: regInfo{
35403 inputs: []inputInfo{
35404 {0, 9223372034707292160},
35405 {1, 9223372034707292160},
35406 },
35407 outputs: []outputInfo{
35408 {0, 1006632944},
35409 },
35410 },
35411 },
35412 {
35413 name: "FLED",
35414 argLen: 2,
35415 asm: riscv.AFLED,
35416 reg: regInfo{
35417 inputs: []inputInfo{
35418 {0, 9223372034707292160},
35419 {1, 9223372034707292160},
35420 },
35421 outputs: []outputInfo{
35422 {0, 1006632944},
35423 },
35424 },
35425 },
35426 {
35427 name: "LoweredFMIND",
35428 argLen: 2,
35429 commutative: true,
35430 resultNotInArgs: true,
35431 asm: riscv.AFMIND,
35432 reg: regInfo{
35433 inputs: []inputInfo{
35434 {0, 9223372034707292160},
35435 {1, 9223372034707292160},
35436 },
35437 outputs: []outputInfo{
35438 {0, 9223372034707292160},
35439 },
35440 },
35441 },
35442 {
35443 name: "LoweredFMAXD",
35444 argLen: 2,
35445 commutative: true,
35446 resultNotInArgs: true,
35447 asm: riscv.AFMAXD,
35448 reg: regInfo{
35449 inputs: []inputInfo{
35450 {0, 9223372034707292160},
35451 {1, 9223372034707292160},
35452 },
35453 outputs: []outputInfo{
35454 {0, 9223372034707292160},
35455 },
35456 },
35457 },
35458
35459 {
35460 name: "FADDS",
35461 argLen: 2,
35462 commutative: true,
35463 resultInArg0: true,
35464 asm: s390x.AFADDS,
35465 reg: regInfo{
35466 inputs: []inputInfo{
35467 {0, 4294901760},
35468 {1, 4294901760},
35469 },
35470 outputs: []outputInfo{
35471 {0, 4294901760},
35472 },
35473 },
35474 },
35475 {
35476 name: "FADD",
35477 argLen: 2,
35478 commutative: true,
35479 resultInArg0: true,
35480 asm: s390x.AFADD,
35481 reg: regInfo{
35482 inputs: []inputInfo{
35483 {0, 4294901760},
35484 {1, 4294901760},
35485 },
35486 outputs: []outputInfo{
35487 {0, 4294901760},
35488 },
35489 },
35490 },
35491 {
35492 name: "FSUBS",
35493 argLen: 2,
35494 resultInArg0: true,
35495 asm: s390x.AFSUBS,
35496 reg: regInfo{
35497 inputs: []inputInfo{
35498 {0, 4294901760},
35499 {1, 4294901760},
35500 },
35501 outputs: []outputInfo{
35502 {0, 4294901760},
35503 },
35504 },
35505 },
35506 {
35507 name: "FSUB",
35508 argLen: 2,
35509 resultInArg0: true,
35510 asm: s390x.AFSUB,
35511 reg: regInfo{
35512 inputs: []inputInfo{
35513 {0, 4294901760},
35514 {1, 4294901760},
35515 },
35516 outputs: []outputInfo{
35517 {0, 4294901760},
35518 },
35519 },
35520 },
35521 {
35522 name: "FMULS",
35523 argLen: 2,
35524 commutative: true,
35525 resultInArg0: true,
35526 asm: s390x.AFMULS,
35527 reg: regInfo{
35528 inputs: []inputInfo{
35529 {0, 4294901760},
35530 {1, 4294901760},
35531 },
35532 outputs: []outputInfo{
35533 {0, 4294901760},
35534 },
35535 },
35536 },
35537 {
35538 name: "FMUL",
35539 argLen: 2,
35540 commutative: true,
35541 resultInArg0: true,
35542 asm: s390x.AFMUL,
35543 reg: regInfo{
35544 inputs: []inputInfo{
35545 {0, 4294901760},
35546 {1, 4294901760},
35547 },
35548 outputs: []outputInfo{
35549 {0, 4294901760},
35550 },
35551 },
35552 },
35553 {
35554 name: "FDIVS",
35555 argLen: 2,
35556 resultInArg0: true,
35557 asm: s390x.AFDIVS,
35558 reg: regInfo{
35559 inputs: []inputInfo{
35560 {0, 4294901760},
35561 {1, 4294901760},
35562 },
35563 outputs: []outputInfo{
35564 {0, 4294901760},
35565 },
35566 },
35567 },
35568 {
35569 name: "FDIV",
35570 argLen: 2,
35571 resultInArg0: true,
35572 asm: s390x.AFDIV,
35573 reg: regInfo{
35574 inputs: []inputInfo{
35575 {0, 4294901760},
35576 {1, 4294901760},
35577 },
35578 outputs: []outputInfo{
35579 {0, 4294901760},
35580 },
35581 },
35582 },
35583 {
35584 name: "FNEGS",
35585 argLen: 1,
35586 clobberFlags: true,
35587 asm: s390x.AFNEGS,
35588 reg: regInfo{
35589 inputs: []inputInfo{
35590 {0, 4294901760},
35591 },
35592 outputs: []outputInfo{
35593 {0, 4294901760},
35594 },
35595 },
35596 },
35597 {
35598 name: "FNEG",
35599 argLen: 1,
35600 clobberFlags: true,
35601 asm: s390x.AFNEG,
35602 reg: regInfo{
35603 inputs: []inputInfo{
35604 {0, 4294901760},
35605 },
35606 outputs: []outputInfo{
35607 {0, 4294901760},
35608 },
35609 },
35610 },
35611 {
35612 name: "FMADDS",
35613 argLen: 3,
35614 resultInArg0: true,
35615 asm: s390x.AFMADDS,
35616 reg: regInfo{
35617 inputs: []inputInfo{
35618 {0, 4294901760},
35619 {1, 4294901760},
35620 {2, 4294901760},
35621 },
35622 outputs: []outputInfo{
35623 {0, 4294901760},
35624 },
35625 },
35626 },
35627 {
35628 name: "FMADD",
35629 argLen: 3,
35630 resultInArg0: true,
35631 asm: s390x.AFMADD,
35632 reg: regInfo{
35633 inputs: []inputInfo{
35634 {0, 4294901760},
35635 {1, 4294901760},
35636 {2, 4294901760},
35637 },
35638 outputs: []outputInfo{
35639 {0, 4294901760},
35640 },
35641 },
35642 },
35643 {
35644 name: "FMSUBS",
35645 argLen: 3,
35646 resultInArg0: true,
35647 asm: s390x.AFMSUBS,
35648 reg: regInfo{
35649 inputs: []inputInfo{
35650 {0, 4294901760},
35651 {1, 4294901760},
35652 {2, 4294901760},
35653 },
35654 outputs: []outputInfo{
35655 {0, 4294901760},
35656 },
35657 },
35658 },
35659 {
35660 name: "FMSUB",
35661 argLen: 3,
35662 resultInArg0: true,
35663 asm: s390x.AFMSUB,
35664 reg: regInfo{
35665 inputs: []inputInfo{
35666 {0, 4294901760},
35667 {1, 4294901760},
35668 {2, 4294901760},
35669 },
35670 outputs: []outputInfo{
35671 {0, 4294901760},
35672 },
35673 },
35674 },
35675 {
35676 name: "LPDFR",
35677 argLen: 1,
35678 asm: s390x.ALPDFR,
35679 reg: regInfo{
35680 inputs: []inputInfo{
35681 {0, 4294901760},
35682 },
35683 outputs: []outputInfo{
35684 {0, 4294901760},
35685 },
35686 },
35687 },
35688 {
35689 name: "LNDFR",
35690 argLen: 1,
35691 asm: s390x.ALNDFR,
35692 reg: regInfo{
35693 inputs: []inputInfo{
35694 {0, 4294901760},
35695 },
35696 outputs: []outputInfo{
35697 {0, 4294901760},
35698 },
35699 },
35700 },
35701 {
35702 name: "CPSDR",
35703 argLen: 2,
35704 asm: s390x.ACPSDR,
35705 reg: regInfo{
35706 inputs: []inputInfo{
35707 {0, 4294901760},
35708 {1, 4294901760},
35709 },
35710 outputs: []outputInfo{
35711 {0, 4294901760},
35712 },
35713 },
35714 },
35715 {
35716 name: "FIDBR",
35717 auxType: auxInt8,
35718 argLen: 1,
35719 asm: s390x.AFIDBR,
35720 reg: regInfo{
35721 inputs: []inputInfo{
35722 {0, 4294901760},
35723 },
35724 outputs: []outputInfo{
35725 {0, 4294901760},
35726 },
35727 },
35728 },
35729 {
35730 name: "FMOVSload",
35731 auxType: auxSymOff,
35732 argLen: 2,
35733 faultOnNilArg0: true,
35734 symEffect: SymRead,
35735 asm: s390x.AFMOVS,
35736 reg: regInfo{
35737 inputs: []inputInfo{
35738 {0, 4295023614},
35739 },
35740 outputs: []outputInfo{
35741 {0, 4294901760},
35742 },
35743 },
35744 },
35745 {
35746 name: "FMOVDload",
35747 auxType: auxSymOff,
35748 argLen: 2,
35749 faultOnNilArg0: true,
35750 symEffect: SymRead,
35751 asm: s390x.AFMOVD,
35752 reg: regInfo{
35753 inputs: []inputInfo{
35754 {0, 4295023614},
35755 },
35756 outputs: []outputInfo{
35757 {0, 4294901760},
35758 },
35759 },
35760 },
35761 {
35762 name: "FMOVSconst",
35763 auxType: auxFloat32,
35764 argLen: 0,
35765 rematerializeable: true,
35766 asm: s390x.AFMOVS,
35767 reg: regInfo{
35768 outputs: []outputInfo{
35769 {0, 4294901760},
35770 },
35771 },
35772 },
35773 {
35774 name: "FMOVDconst",
35775 auxType: auxFloat64,
35776 argLen: 0,
35777 rematerializeable: true,
35778 asm: s390x.AFMOVD,
35779 reg: regInfo{
35780 outputs: []outputInfo{
35781 {0, 4294901760},
35782 },
35783 },
35784 },
35785 {
35786 name: "FMOVSloadidx",
35787 auxType: auxSymOff,
35788 argLen: 3,
35789 symEffect: SymRead,
35790 asm: s390x.AFMOVS,
35791 reg: regInfo{
35792 inputs: []inputInfo{
35793 {0, 56318},
35794 {1, 56318},
35795 },
35796 outputs: []outputInfo{
35797 {0, 4294901760},
35798 },
35799 },
35800 },
35801 {
35802 name: "FMOVDloadidx",
35803 auxType: auxSymOff,
35804 argLen: 3,
35805 symEffect: SymRead,
35806 asm: s390x.AFMOVD,
35807 reg: regInfo{
35808 inputs: []inputInfo{
35809 {0, 56318},
35810 {1, 56318},
35811 },
35812 outputs: []outputInfo{
35813 {0, 4294901760},
35814 },
35815 },
35816 },
35817 {
35818 name: "FMOVSstore",
35819 auxType: auxSymOff,
35820 argLen: 3,
35821 faultOnNilArg0: true,
35822 symEffect: SymWrite,
35823 asm: s390x.AFMOVS,
35824 reg: regInfo{
35825 inputs: []inputInfo{
35826 {0, 4295023614},
35827 {1, 4294901760},
35828 },
35829 },
35830 },
35831 {
35832 name: "FMOVDstore",
35833 auxType: auxSymOff,
35834 argLen: 3,
35835 faultOnNilArg0: true,
35836 symEffect: SymWrite,
35837 asm: s390x.AFMOVD,
35838 reg: regInfo{
35839 inputs: []inputInfo{
35840 {0, 4295023614},
35841 {1, 4294901760},
35842 },
35843 },
35844 },
35845 {
35846 name: "FMOVSstoreidx",
35847 auxType: auxSymOff,
35848 argLen: 4,
35849 symEffect: SymWrite,
35850 asm: s390x.AFMOVS,
35851 reg: regInfo{
35852 inputs: []inputInfo{
35853 {0, 56318},
35854 {1, 56318},
35855 {2, 4294901760},
35856 },
35857 },
35858 },
35859 {
35860 name: "FMOVDstoreidx",
35861 auxType: auxSymOff,
35862 argLen: 4,
35863 symEffect: SymWrite,
35864 asm: s390x.AFMOVD,
35865 reg: regInfo{
35866 inputs: []inputInfo{
35867 {0, 56318},
35868 {1, 56318},
35869 {2, 4294901760},
35870 },
35871 },
35872 },
35873 {
35874 name: "ADD",
35875 argLen: 2,
35876 commutative: true,
35877 clobberFlags: true,
35878 asm: s390x.AADD,
35879 reg: regInfo{
35880 inputs: []inputInfo{
35881 {1, 23551},
35882 {0, 56319},
35883 },
35884 outputs: []outputInfo{
35885 {0, 23551},
35886 },
35887 },
35888 },
35889 {
35890 name: "ADDW",
35891 argLen: 2,
35892 commutative: true,
35893 clobberFlags: true,
35894 asm: s390x.AADDW,
35895 reg: regInfo{
35896 inputs: []inputInfo{
35897 {1, 23551},
35898 {0, 56319},
35899 },
35900 outputs: []outputInfo{
35901 {0, 23551},
35902 },
35903 },
35904 },
35905 {
35906 name: "ADDconst",
35907 auxType: auxInt32,
35908 argLen: 1,
35909 clobberFlags: true,
35910 asm: s390x.AADD,
35911 reg: regInfo{
35912 inputs: []inputInfo{
35913 {0, 56319},
35914 },
35915 outputs: []outputInfo{
35916 {0, 23551},
35917 },
35918 },
35919 },
35920 {
35921 name: "ADDWconst",
35922 auxType: auxInt32,
35923 argLen: 1,
35924 clobberFlags: true,
35925 asm: s390x.AADDW,
35926 reg: regInfo{
35927 inputs: []inputInfo{
35928 {0, 56319},
35929 },
35930 outputs: []outputInfo{
35931 {0, 23551},
35932 },
35933 },
35934 },
35935 {
35936 name: "ADDload",
35937 auxType: auxSymOff,
35938 argLen: 3,
35939 resultInArg0: true,
35940 clobberFlags: true,
35941 faultOnNilArg1: true,
35942 symEffect: SymRead,
35943 asm: s390x.AADD,
35944 reg: regInfo{
35945 inputs: []inputInfo{
35946 {0, 23551},
35947 {1, 56318},
35948 },
35949 outputs: []outputInfo{
35950 {0, 23551},
35951 },
35952 },
35953 },
35954 {
35955 name: "ADDWload",
35956 auxType: auxSymOff,
35957 argLen: 3,
35958 resultInArg0: true,
35959 clobberFlags: true,
35960 faultOnNilArg1: true,
35961 symEffect: SymRead,
35962 asm: s390x.AADDW,
35963 reg: regInfo{
35964 inputs: []inputInfo{
35965 {0, 23551},
35966 {1, 56318},
35967 },
35968 outputs: []outputInfo{
35969 {0, 23551},
35970 },
35971 },
35972 },
35973 {
35974 name: "SUB",
35975 argLen: 2,
35976 clobberFlags: true,
35977 asm: s390x.ASUB,
35978 reg: regInfo{
35979 inputs: []inputInfo{
35980 {0, 23551},
35981 {1, 23551},
35982 },
35983 outputs: []outputInfo{
35984 {0, 23551},
35985 },
35986 },
35987 },
35988 {
35989 name: "SUBW",
35990 argLen: 2,
35991 clobberFlags: true,
35992 asm: s390x.ASUBW,
35993 reg: regInfo{
35994 inputs: []inputInfo{
35995 {0, 23551},
35996 {1, 23551},
35997 },
35998 outputs: []outputInfo{
35999 {0, 23551},
36000 },
36001 },
36002 },
36003 {
36004 name: "SUBconst",
36005 auxType: auxInt32,
36006 argLen: 1,
36007 resultInArg0: true,
36008 clobberFlags: true,
36009 asm: s390x.ASUB,
36010 reg: regInfo{
36011 inputs: []inputInfo{
36012 {0, 23551},
36013 },
36014 outputs: []outputInfo{
36015 {0, 23551},
36016 },
36017 },
36018 },
36019 {
36020 name: "SUBWconst",
36021 auxType: auxInt32,
36022 argLen: 1,
36023 resultInArg0: true,
36024 clobberFlags: true,
36025 asm: s390x.ASUBW,
36026 reg: regInfo{
36027 inputs: []inputInfo{
36028 {0, 23551},
36029 },
36030 outputs: []outputInfo{
36031 {0, 23551},
36032 },
36033 },
36034 },
36035 {
36036 name: "SUBload",
36037 auxType: auxSymOff,
36038 argLen: 3,
36039 resultInArg0: true,
36040 clobberFlags: true,
36041 faultOnNilArg1: true,
36042 symEffect: SymRead,
36043 asm: s390x.ASUB,
36044 reg: regInfo{
36045 inputs: []inputInfo{
36046 {0, 23551},
36047 {1, 56318},
36048 },
36049 outputs: []outputInfo{
36050 {0, 23551},
36051 },
36052 },
36053 },
36054 {
36055 name: "SUBWload",
36056 auxType: auxSymOff,
36057 argLen: 3,
36058 resultInArg0: true,
36059 clobberFlags: true,
36060 faultOnNilArg1: true,
36061 symEffect: SymRead,
36062 asm: s390x.ASUBW,
36063 reg: regInfo{
36064 inputs: []inputInfo{
36065 {0, 23551},
36066 {1, 56318},
36067 },
36068 outputs: []outputInfo{
36069 {0, 23551},
36070 },
36071 },
36072 },
36073 {
36074 name: "MULLD",
36075 argLen: 2,
36076 commutative: true,
36077 resultInArg0: true,
36078 clobberFlags: true,
36079 asm: s390x.AMULLD,
36080 reg: regInfo{
36081 inputs: []inputInfo{
36082 {0, 23551},
36083 {1, 23551},
36084 },
36085 outputs: []outputInfo{
36086 {0, 23551},
36087 },
36088 },
36089 },
36090 {
36091 name: "MULLW",
36092 argLen: 2,
36093 commutative: true,
36094 resultInArg0: true,
36095 clobberFlags: true,
36096 asm: s390x.AMULLW,
36097 reg: regInfo{
36098 inputs: []inputInfo{
36099 {0, 23551},
36100 {1, 23551},
36101 },
36102 outputs: []outputInfo{
36103 {0, 23551},
36104 },
36105 },
36106 },
36107 {
36108 name: "MULLDconst",
36109 auxType: auxInt32,
36110 argLen: 1,
36111 resultInArg0: true,
36112 clobberFlags: true,
36113 asm: s390x.AMULLD,
36114 reg: regInfo{
36115 inputs: []inputInfo{
36116 {0, 23551},
36117 },
36118 outputs: []outputInfo{
36119 {0, 23551},
36120 },
36121 },
36122 },
36123 {
36124 name: "MULLWconst",
36125 auxType: auxInt32,
36126 argLen: 1,
36127 resultInArg0: true,
36128 clobberFlags: true,
36129 asm: s390x.AMULLW,
36130 reg: regInfo{
36131 inputs: []inputInfo{
36132 {0, 23551},
36133 },
36134 outputs: []outputInfo{
36135 {0, 23551},
36136 },
36137 },
36138 },
36139 {
36140 name: "MULLDload",
36141 auxType: auxSymOff,
36142 argLen: 3,
36143 resultInArg0: true,
36144 clobberFlags: true,
36145 faultOnNilArg1: true,
36146 symEffect: SymRead,
36147 asm: s390x.AMULLD,
36148 reg: regInfo{
36149 inputs: []inputInfo{
36150 {0, 23551},
36151 {1, 56318},
36152 },
36153 outputs: []outputInfo{
36154 {0, 23551},
36155 },
36156 },
36157 },
36158 {
36159 name: "MULLWload",
36160 auxType: auxSymOff,
36161 argLen: 3,
36162 resultInArg0: true,
36163 clobberFlags: true,
36164 faultOnNilArg1: true,
36165 symEffect: SymRead,
36166 asm: s390x.AMULLW,
36167 reg: regInfo{
36168 inputs: []inputInfo{
36169 {0, 23551},
36170 {1, 56318},
36171 },
36172 outputs: []outputInfo{
36173 {0, 23551},
36174 },
36175 },
36176 },
36177 {
36178 name: "MULHD",
36179 argLen: 2,
36180 commutative: true,
36181 resultInArg0: true,
36182 clobberFlags: true,
36183 asm: s390x.AMULHD,
36184 reg: regInfo{
36185 inputs: []inputInfo{
36186 {0, 21503},
36187 {1, 21503},
36188 },
36189 clobbers: 2048,
36190 outputs: []outputInfo{
36191 {0, 21503},
36192 },
36193 },
36194 },
36195 {
36196 name: "MULHDU",
36197 argLen: 2,
36198 commutative: true,
36199 resultInArg0: true,
36200 clobberFlags: true,
36201 asm: s390x.AMULHDU,
36202 reg: regInfo{
36203 inputs: []inputInfo{
36204 {0, 21503},
36205 {1, 21503},
36206 },
36207 clobbers: 2048,
36208 outputs: []outputInfo{
36209 {0, 21503},
36210 },
36211 },
36212 },
36213 {
36214 name: "DIVD",
36215 argLen: 2,
36216 resultInArg0: true,
36217 clobberFlags: true,
36218 asm: s390x.ADIVD,
36219 reg: regInfo{
36220 inputs: []inputInfo{
36221 {0, 21503},
36222 {1, 21503},
36223 },
36224 clobbers: 2048,
36225 outputs: []outputInfo{
36226 {0, 21503},
36227 },
36228 },
36229 },
36230 {
36231 name: "DIVW",
36232 argLen: 2,
36233 resultInArg0: true,
36234 clobberFlags: true,
36235 asm: s390x.ADIVW,
36236 reg: regInfo{
36237 inputs: []inputInfo{
36238 {0, 21503},
36239 {1, 21503},
36240 },
36241 clobbers: 2048,
36242 outputs: []outputInfo{
36243 {0, 21503},
36244 },
36245 },
36246 },
36247 {
36248 name: "DIVDU",
36249 argLen: 2,
36250 resultInArg0: true,
36251 clobberFlags: true,
36252 asm: s390x.ADIVDU,
36253 reg: regInfo{
36254 inputs: []inputInfo{
36255 {0, 21503},
36256 {1, 21503},
36257 },
36258 clobbers: 2048,
36259 outputs: []outputInfo{
36260 {0, 21503},
36261 },
36262 },
36263 },
36264 {
36265 name: "DIVWU",
36266 argLen: 2,
36267 resultInArg0: true,
36268 clobberFlags: true,
36269 asm: s390x.ADIVWU,
36270 reg: regInfo{
36271 inputs: []inputInfo{
36272 {0, 21503},
36273 {1, 21503},
36274 },
36275 clobbers: 2048,
36276 outputs: []outputInfo{
36277 {0, 21503},
36278 },
36279 },
36280 },
36281 {
36282 name: "MODD",
36283 argLen: 2,
36284 resultInArg0: true,
36285 clobberFlags: true,
36286 asm: s390x.AMODD,
36287 reg: regInfo{
36288 inputs: []inputInfo{
36289 {0, 21503},
36290 {1, 21503},
36291 },
36292 clobbers: 2048,
36293 outputs: []outputInfo{
36294 {0, 21503},
36295 },
36296 },
36297 },
36298 {
36299 name: "MODW",
36300 argLen: 2,
36301 resultInArg0: true,
36302 clobberFlags: true,
36303 asm: s390x.AMODW,
36304 reg: regInfo{
36305 inputs: []inputInfo{
36306 {0, 21503},
36307 {1, 21503},
36308 },
36309 clobbers: 2048,
36310 outputs: []outputInfo{
36311 {0, 21503},
36312 },
36313 },
36314 },
36315 {
36316 name: "MODDU",
36317 argLen: 2,
36318 resultInArg0: true,
36319 clobberFlags: true,
36320 asm: s390x.AMODDU,
36321 reg: regInfo{
36322 inputs: []inputInfo{
36323 {0, 21503},
36324 {1, 21503},
36325 },
36326 clobbers: 2048,
36327 outputs: []outputInfo{
36328 {0, 21503},
36329 },
36330 },
36331 },
36332 {
36333 name: "MODWU",
36334 argLen: 2,
36335 resultInArg0: true,
36336 clobberFlags: true,
36337 asm: s390x.AMODWU,
36338 reg: regInfo{
36339 inputs: []inputInfo{
36340 {0, 21503},
36341 {1, 21503},
36342 },
36343 clobbers: 2048,
36344 outputs: []outputInfo{
36345 {0, 21503},
36346 },
36347 },
36348 },
36349 {
36350 name: "AND",
36351 argLen: 2,
36352 commutative: true,
36353 clobberFlags: true,
36354 asm: s390x.AAND,
36355 reg: regInfo{
36356 inputs: []inputInfo{
36357 {0, 23551},
36358 {1, 23551},
36359 },
36360 outputs: []outputInfo{
36361 {0, 23551},
36362 },
36363 },
36364 },
36365 {
36366 name: "ANDW",
36367 argLen: 2,
36368 commutative: true,
36369 clobberFlags: true,
36370 asm: s390x.AANDW,
36371 reg: regInfo{
36372 inputs: []inputInfo{
36373 {0, 23551},
36374 {1, 23551},
36375 },
36376 outputs: []outputInfo{
36377 {0, 23551},
36378 },
36379 },
36380 },
36381 {
36382 name: "ANDconst",
36383 auxType: auxInt64,
36384 argLen: 1,
36385 resultInArg0: true,
36386 clobberFlags: true,
36387 asm: s390x.AAND,
36388 reg: regInfo{
36389 inputs: []inputInfo{
36390 {0, 23551},
36391 },
36392 outputs: []outputInfo{
36393 {0, 23551},
36394 },
36395 },
36396 },
36397 {
36398 name: "ANDWconst",
36399 auxType: auxInt32,
36400 argLen: 1,
36401 resultInArg0: true,
36402 clobberFlags: true,
36403 asm: s390x.AANDW,
36404 reg: regInfo{
36405 inputs: []inputInfo{
36406 {0, 23551},
36407 },
36408 outputs: []outputInfo{
36409 {0, 23551},
36410 },
36411 },
36412 },
36413 {
36414 name: "ANDload",
36415 auxType: auxSymOff,
36416 argLen: 3,
36417 resultInArg0: true,
36418 clobberFlags: true,
36419 faultOnNilArg1: true,
36420 symEffect: SymRead,
36421 asm: s390x.AAND,
36422 reg: regInfo{
36423 inputs: []inputInfo{
36424 {0, 23551},
36425 {1, 56318},
36426 },
36427 outputs: []outputInfo{
36428 {0, 23551},
36429 },
36430 },
36431 },
36432 {
36433 name: "ANDWload",
36434 auxType: auxSymOff,
36435 argLen: 3,
36436 resultInArg0: true,
36437 clobberFlags: true,
36438 faultOnNilArg1: true,
36439 symEffect: SymRead,
36440 asm: s390x.AANDW,
36441 reg: regInfo{
36442 inputs: []inputInfo{
36443 {0, 23551},
36444 {1, 56318},
36445 },
36446 outputs: []outputInfo{
36447 {0, 23551},
36448 },
36449 },
36450 },
36451 {
36452 name: "OR",
36453 argLen: 2,
36454 commutative: true,
36455 clobberFlags: true,
36456 asm: s390x.AOR,
36457 reg: regInfo{
36458 inputs: []inputInfo{
36459 {0, 23551},
36460 {1, 23551},
36461 },
36462 outputs: []outputInfo{
36463 {0, 23551},
36464 },
36465 },
36466 },
36467 {
36468 name: "ORW",
36469 argLen: 2,
36470 commutative: true,
36471 clobberFlags: true,
36472 asm: s390x.AORW,
36473 reg: regInfo{
36474 inputs: []inputInfo{
36475 {0, 23551},
36476 {1, 23551},
36477 },
36478 outputs: []outputInfo{
36479 {0, 23551},
36480 },
36481 },
36482 },
36483 {
36484 name: "ORconst",
36485 auxType: auxInt64,
36486 argLen: 1,
36487 resultInArg0: true,
36488 clobberFlags: true,
36489 asm: s390x.AOR,
36490 reg: regInfo{
36491 inputs: []inputInfo{
36492 {0, 23551},
36493 },
36494 outputs: []outputInfo{
36495 {0, 23551},
36496 },
36497 },
36498 },
36499 {
36500 name: "ORWconst",
36501 auxType: auxInt32,
36502 argLen: 1,
36503 resultInArg0: true,
36504 clobberFlags: true,
36505 asm: s390x.AORW,
36506 reg: regInfo{
36507 inputs: []inputInfo{
36508 {0, 23551},
36509 },
36510 outputs: []outputInfo{
36511 {0, 23551},
36512 },
36513 },
36514 },
36515 {
36516 name: "ORload",
36517 auxType: auxSymOff,
36518 argLen: 3,
36519 resultInArg0: true,
36520 clobberFlags: true,
36521 faultOnNilArg1: true,
36522 symEffect: SymRead,
36523 asm: s390x.AOR,
36524 reg: regInfo{
36525 inputs: []inputInfo{
36526 {0, 23551},
36527 {1, 56318},
36528 },
36529 outputs: []outputInfo{
36530 {0, 23551},
36531 },
36532 },
36533 },
36534 {
36535 name: "ORWload",
36536 auxType: auxSymOff,
36537 argLen: 3,
36538 resultInArg0: true,
36539 clobberFlags: true,
36540 faultOnNilArg1: true,
36541 symEffect: SymRead,
36542 asm: s390x.AORW,
36543 reg: regInfo{
36544 inputs: []inputInfo{
36545 {0, 23551},
36546 {1, 56318},
36547 },
36548 outputs: []outputInfo{
36549 {0, 23551},
36550 },
36551 },
36552 },
36553 {
36554 name: "XOR",
36555 argLen: 2,
36556 commutative: true,
36557 clobberFlags: true,
36558 asm: s390x.AXOR,
36559 reg: regInfo{
36560 inputs: []inputInfo{
36561 {0, 23551},
36562 {1, 23551},
36563 },
36564 outputs: []outputInfo{
36565 {0, 23551},
36566 },
36567 },
36568 },
36569 {
36570 name: "XORW",
36571 argLen: 2,
36572 commutative: true,
36573 clobberFlags: true,
36574 asm: s390x.AXORW,
36575 reg: regInfo{
36576 inputs: []inputInfo{
36577 {0, 23551},
36578 {1, 23551},
36579 },
36580 outputs: []outputInfo{
36581 {0, 23551},
36582 },
36583 },
36584 },
36585 {
36586 name: "XORconst",
36587 auxType: auxInt64,
36588 argLen: 1,
36589 resultInArg0: true,
36590 clobberFlags: true,
36591 asm: s390x.AXOR,
36592 reg: regInfo{
36593 inputs: []inputInfo{
36594 {0, 23551},
36595 },
36596 outputs: []outputInfo{
36597 {0, 23551},
36598 },
36599 },
36600 },
36601 {
36602 name: "XORWconst",
36603 auxType: auxInt32,
36604 argLen: 1,
36605 resultInArg0: true,
36606 clobberFlags: true,
36607 asm: s390x.AXORW,
36608 reg: regInfo{
36609 inputs: []inputInfo{
36610 {0, 23551},
36611 },
36612 outputs: []outputInfo{
36613 {0, 23551},
36614 },
36615 },
36616 },
36617 {
36618 name: "XORload",
36619 auxType: auxSymOff,
36620 argLen: 3,
36621 resultInArg0: true,
36622 clobberFlags: true,
36623 faultOnNilArg1: true,
36624 symEffect: SymRead,
36625 asm: s390x.AXOR,
36626 reg: regInfo{
36627 inputs: []inputInfo{
36628 {0, 23551},
36629 {1, 56318},
36630 },
36631 outputs: []outputInfo{
36632 {0, 23551},
36633 },
36634 },
36635 },
36636 {
36637 name: "XORWload",
36638 auxType: auxSymOff,
36639 argLen: 3,
36640 resultInArg0: true,
36641 clobberFlags: true,
36642 faultOnNilArg1: true,
36643 symEffect: SymRead,
36644 asm: s390x.AXORW,
36645 reg: regInfo{
36646 inputs: []inputInfo{
36647 {0, 23551},
36648 {1, 56318},
36649 },
36650 outputs: []outputInfo{
36651 {0, 23551},
36652 },
36653 },
36654 },
36655 {
36656 name: "ADDC",
36657 argLen: 2,
36658 commutative: true,
36659 asm: s390x.AADDC,
36660 reg: regInfo{
36661 inputs: []inputInfo{
36662 {0, 23551},
36663 {1, 23551},
36664 },
36665 outputs: []outputInfo{
36666 {0, 23551},
36667 },
36668 },
36669 },
36670 {
36671 name: "ADDCconst",
36672 auxType: auxInt16,
36673 argLen: 1,
36674 asm: s390x.AADDC,
36675 reg: regInfo{
36676 inputs: []inputInfo{
36677 {0, 23551},
36678 },
36679 outputs: []outputInfo{
36680 {0, 23551},
36681 },
36682 },
36683 },
36684 {
36685 name: "ADDE",
36686 argLen: 3,
36687 commutative: true,
36688 resultInArg0: true,
36689 asm: s390x.AADDE,
36690 reg: regInfo{
36691 inputs: []inputInfo{
36692 {0, 23551},
36693 {1, 23551},
36694 },
36695 outputs: []outputInfo{
36696 {0, 23551},
36697 },
36698 },
36699 },
36700 {
36701 name: "SUBC",
36702 argLen: 2,
36703 asm: s390x.ASUBC,
36704 reg: regInfo{
36705 inputs: []inputInfo{
36706 {0, 23551},
36707 {1, 23551},
36708 },
36709 outputs: []outputInfo{
36710 {0, 23551},
36711 },
36712 },
36713 },
36714 {
36715 name: "SUBE",
36716 argLen: 3,
36717 resultInArg0: true,
36718 asm: s390x.ASUBE,
36719 reg: regInfo{
36720 inputs: []inputInfo{
36721 {0, 23551},
36722 {1, 23551},
36723 },
36724 outputs: []outputInfo{
36725 {0, 23551},
36726 },
36727 },
36728 },
36729 {
36730 name: "CMP",
36731 argLen: 2,
36732 asm: s390x.ACMP,
36733 reg: regInfo{
36734 inputs: []inputInfo{
36735 {0, 56319},
36736 {1, 56319},
36737 },
36738 },
36739 },
36740 {
36741 name: "CMPW",
36742 argLen: 2,
36743 asm: s390x.ACMPW,
36744 reg: regInfo{
36745 inputs: []inputInfo{
36746 {0, 56319},
36747 {1, 56319},
36748 },
36749 },
36750 },
36751 {
36752 name: "CMPU",
36753 argLen: 2,
36754 asm: s390x.ACMPU,
36755 reg: regInfo{
36756 inputs: []inputInfo{
36757 {0, 56319},
36758 {1, 56319},
36759 },
36760 },
36761 },
36762 {
36763 name: "CMPWU",
36764 argLen: 2,
36765 asm: s390x.ACMPWU,
36766 reg: regInfo{
36767 inputs: []inputInfo{
36768 {0, 56319},
36769 {1, 56319},
36770 },
36771 },
36772 },
36773 {
36774 name: "CMPconst",
36775 auxType: auxInt32,
36776 argLen: 1,
36777 asm: s390x.ACMP,
36778 reg: regInfo{
36779 inputs: []inputInfo{
36780 {0, 56319},
36781 },
36782 },
36783 },
36784 {
36785 name: "CMPWconst",
36786 auxType: auxInt32,
36787 argLen: 1,
36788 asm: s390x.ACMPW,
36789 reg: regInfo{
36790 inputs: []inputInfo{
36791 {0, 56319},
36792 },
36793 },
36794 },
36795 {
36796 name: "CMPUconst",
36797 auxType: auxInt32,
36798 argLen: 1,
36799 asm: s390x.ACMPU,
36800 reg: regInfo{
36801 inputs: []inputInfo{
36802 {0, 56319},
36803 },
36804 },
36805 },
36806 {
36807 name: "CMPWUconst",
36808 auxType: auxInt32,
36809 argLen: 1,
36810 asm: s390x.ACMPWU,
36811 reg: regInfo{
36812 inputs: []inputInfo{
36813 {0, 56319},
36814 },
36815 },
36816 },
36817 {
36818 name: "FCMPS",
36819 argLen: 2,
36820 asm: s390x.ACEBR,
36821 reg: regInfo{
36822 inputs: []inputInfo{
36823 {0, 4294901760},
36824 {1, 4294901760},
36825 },
36826 },
36827 },
36828 {
36829 name: "FCMP",
36830 argLen: 2,
36831 asm: s390x.AFCMPU,
36832 reg: regInfo{
36833 inputs: []inputInfo{
36834 {0, 4294901760},
36835 {1, 4294901760},
36836 },
36837 },
36838 },
36839 {
36840 name: "LTDBR",
36841 argLen: 1,
36842 asm: s390x.ALTDBR,
36843 reg: regInfo{
36844 inputs: []inputInfo{
36845 {0, 4294901760},
36846 },
36847 },
36848 },
36849 {
36850 name: "LTEBR",
36851 argLen: 1,
36852 asm: s390x.ALTEBR,
36853 reg: regInfo{
36854 inputs: []inputInfo{
36855 {0, 4294901760},
36856 },
36857 },
36858 },
36859 {
36860 name: "SLD",
36861 argLen: 2,
36862 asm: s390x.ASLD,
36863 reg: regInfo{
36864 inputs: []inputInfo{
36865 {1, 23550},
36866 {0, 23551},
36867 },
36868 outputs: []outputInfo{
36869 {0, 23551},
36870 },
36871 },
36872 },
36873 {
36874 name: "SLW",
36875 argLen: 2,
36876 asm: s390x.ASLW,
36877 reg: regInfo{
36878 inputs: []inputInfo{
36879 {1, 23550},
36880 {0, 23551},
36881 },
36882 outputs: []outputInfo{
36883 {0, 23551},
36884 },
36885 },
36886 },
36887 {
36888 name: "SLDconst",
36889 auxType: auxUInt8,
36890 argLen: 1,
36891 asm: s390x.ASLD,
36892 reg: regInfo{
36893 inputs: []inputInfo{
36894 {0, 23551},
36895 },
36896 outputs: []outputInfo{
36897 {0, 23551},
36898 },
36899 },
36900 },
36901 {
36902 name: "SLWconst",
36903 auxType: auxUInt8,
36904 argLen: 1,
36905 asm: s390x.ASLW,
36906 reg: regInfo{
36907 inputs: []inputInfo{
36908 {0, 23551},
36909 },
36910 outputs: []outputInfo{
36911 {0, 23551},
36912 },
36913 },
36914 },
36915 {
36916 name: "SRD",
36917 argLen: 2,
36918 asm: s390x.ASRD,
36919 reg: regInfo{
36920 inputs: []inputInfo{
36921 {1, 23550},
36922 {0, 23551},
36923 },
36924 outputs: []outputInfo{
36925 {0, 23551},
36926 },
36927 },
36928 },
36929 {
36930 name: "SRW",
36931 argLen: 2,
36932 asm: s390x.ASRW,
36933 reg: regInfo{
36934 inputs: []inputInfo{
36935 {1, 23550},
36936 {0, 23551},
36937 },
36938 outputs: []outputInfo{
36939 {0, 23551},
36940 },
36941 },
36942 },
36943 {
36944 name: "SRDconst",
36945 auxType: auxUInt8,
36946 argLen: 1,
36947 asm: s390x.ASRD,
36948 reg: regInfo{
36949 inputs: []inputInfo{
36950 {0, 23551},
36951 },
36952 outputs: []outputInfo{
36953 {0, 23551},
36954 },
36955 },
36956 },
36957 {
36958 name: "SRWconst",
36959 auxType: auxUInt8,
36960 argLen: 1,
36961 asm: s390x.ASRW,
36962 reg: regInfo{
36963 inputs: []inputInfo{
36964 {0, 23551},
36965 },
36966 outputs: []outputInfo{
36967 {0, 23551},
36968 },
36969 },
36970 },
36971 {
36972 name: "SRAD",
36973 argLen: 2,
36974 clobberFlags: true,
36975 asm: s390x.ASRAD,
36976 reg: regInfo{
36977 inputs: []inputInfo{
36978 {1, 23550},
36979 {0, 23551},
36980 },
36981 outputs: []outputInfo{
36982 {0, 23551},
36983 },
36984 },
36985 },
36986 {
36987 name: "SRAW",
36988 argLen: 2,
36989 clobberFlags: true,
36990 asm: s390x.ASRAW,
36991 reg: regInfo{
36992 inputs: []inputInfo{
36993 {1, 23550},
36994 {0, 23551},
36995 },
36996 outputs: []outputInfo{
36997 {0, 23551},
36998 },
36999 },
37000 },
37001 {
37002 name: "SRADconst",
37003 auxType: auxUInt8,
37004 argLen: 1,
37005 clobberFlags: true,
37006 asm: s390x.ASRAD,
37007 reg: regInfo{
37008 inputs: []inputInfo{
37009 {0, 23551},
37010 },
37011 outputs: []outputInfo{
37012 {0, 23551},
37013 },
37014 },
37015 },
37016 {
37017 name: "SRAWconst",
37018 auxType: auxUInt8,
37019 argLen: 1,
37020 clobberFlags: true,
37021 asm: s390x.ASRAW,
37022 reg: regInfo{
37023 inputs: []inputInfo{
37024 {0, 23551},
37025 },
37026 outputs: []outputInfo{
37027 {0, 23551},
37028 },
37029 },
37030 },
37031 {
37032 name: "RLLG",
37033 argLen: 2,
37034 asm: s390x.ARLLG,
37035 reg: regInfo{
37036 inputs: []inputInfo{
37037 {1, 23550},
37038 {0, 23551},
37039 },
37040 outputs: []outputInfo{
37041 {0, 23551},
37042 },
37043 },
37044 },
37045 {
37046 name: "RLL",
37047 argLen: 2,
37048 asm: s390x.ARLL,
37049 reg: regInfo{
37050 inputs: []inputInfo{
37051 {1, 23550},
37052 {0, 23551},
37053 },
37054 outputs: []outputInfo{
37055 {0, 23551},
37056 },
37057 },
37058 },
37059 {
37060 name: "RLLconst",
37061 auxType: auxUInt8,
37062 argLen: 1,
37063 asm: s390x.ARLL,
37064 reg: regInfo{
37065 inputs: []inputInfo{
37066 {0, 23551},
37067 },
37068 outputs: []outputInfo{
37069 {0, 23551},
37070 },
37071 },
37072 },
37073 {
37074 name: "RXSBG",
37075 auxType: auxS390XRotateParams,
37076 argLen: 2,
37077 resultInArg0: true,
37078 clobberFlags: true,
37079 asm: s390x.ARXSBG,
37080 reg: regInfo{
37081 inputs: []inputInfo{
37082 {0, 23551},
37083 {1, 23551},
37084 },
37085 outputs: []outputInfo{
37086 {0, 23551},
37087 },
37088 },
37089 },
37090 {
37091 name: "RISBGZ",
37092 auxType: auxS390XRotateParams,
37093 argLen: 1,
37094 clobberFlags: true,
37095 asm: s390x.ARISBGZ,
37096 reg: regInfo{
37097 inputs: []inputInfo{
37098 {0, 23551},
37099 },
37100 outputs: []outputInfo{
37101 {0, 23551},
37102 },
37103 },
37104 },
37105 {
37106 name: "NEG",
37107 argLen: 1,
37108 clobberFlags: true,
37109 asm: s390x.ANEG,
37110 reg: regInfo{
37111 inputs: []inputInfo{
37112 {0, 23551},
37113 },
37114 outputs: []outputInfo{
37115 {0, 23551},
37116 },
37117 },
37118 },
37119 {
37120 name: "NEGW",
37121 argLen: 1,
37122 clobberFlags: true,
37123 asm: s390x.ANEGW,
37124 reg: regInfo{
37125 inputs: []inputInfo{
37126 {0, 23551},
37127 },
37128 outputs: []outputInfo{
37129 {0, 23551},
37130 },
37131 },
37132 },
37133 {
37134 name: "NOT",
37135 argLen: 1,
37136 resultInArg0: true,
37137 clobberFlags: true,
37138 reg: regInfo{
37139 inputs: []inputInfo{
37140 {0, 23551},
37141 },
37142 outputs: []outputInfo{
37143 {0, 23551},
37144 },
37145 },
37146 },
37147 {
37148 name: "NOTW",
37149 argLen: 1,
37150 resultInArg0: true,
37151 clobberFlags: true,
37152 reg: regInfo{
37153 inputs: []inputInfo{
37154 {0, 23551},
37155 },
37156 outputs: []outputInfo{
37157 {0, 23551},
37158 },
37159 },
37160 },
37161 {
37162 name: "FSQRT",
37163 argLen: 1,
37164 asm: s390x.AFSQRT,
37165 reg: regInfo{
37166 inputs: []inputInfo{
37167 {0, 4294901760},
37168 },
37169 outputs: []outputInfo{
37170 {0, 4294901760},
37171 },
37172 },
37173 },
37174 {
37175 name: "FSQRTS",
37176 argLen: 1,
37177 asm: s390x.AFSQRTS,
37178 reg: regInfo{
37179 inputs: []inputInfo{
37180 {0, 4294901760},
37181 },
37182 outputs: []outputInfo{
37183 {0, 4294901760},
37184 },
37185 },
37186 },
37187 {
37188 name: "LOCGR",
37189 auxType: auxS390XCCMask,
37190 argLen: 3,
37191 resultInArg0: true,
37192 asm: s390x.ALOCGR,
37193 reg: regInfo{
37194 inputs: []inputInfo{
37195 {0, 23551},
37196 {1, 23551},
37197 },
37198 outputs: []outputInfo{
37199 {0, 23551},
37200 },
37201 },
37202 },
37203 {
37204 name: "MOVBreg",
37205 argLen: 1,
37206 asm: s390x.AMOVB,
37207 reg: regInfo{
37208 inputs: []inputInfo{
37209 {0, 56319},
37210 },
37211 outputs: []outputInfo{
37212 {0, 23551},
37213 },
37214 },
37215 },
37216 {
37217 name: "MOVBZreg",
37218 argLen: 1,
37219 asm: s390x.AMOVBZ,
37220 reg: regInfo{
37221 inputs: []inputInfo{
37222 {0, 56319},
37223 },
37224 outputs: []outputInfo{
37225 {0, 23551},
37226 },
37227 },
37228 },
37229 {
37230 name: "MOVHreg",
37231 argLen: 1,
37232 asm: s390x.AMOVH,
37233 reg: regInfo{
37234 inputs: []inputInfo{
37235 {0, 56319},
37236 },
37237 outputs: []outputInfo{
37238 {0, 23551},
37239 },
37240 },
37241 },
37242 {
37243 name: "MOVHZreg",
37244 argLen: 1,
37245 asm: s390x.AMOVHZ,
37246 reg: regInfo{
37247 inputs: []inputInfo{
37248 {0, 56319},
37249 },
37250 outputs: []outputInfo{
37251 {0, 23551},
37252 },
37253 },
37254 },
37255 {
37256 name: "MOVWreg",
37257 argLen: 1,
37258 asm: s390x.AMOVW,
37259 reg: regInfo{
37260 inputs: []inputInfo{
37261 {0, 56319},
37262 },
37263 outputs: []outputInfo{
37264 {0, 23551},
37265 },
37266 },
37267 },
37268 {
37269 name: "MOVWZreg",
37270 argLen: 1,
37271 asm: s390x.AMOVWZ,
37272 reg: regInfo{
37273 inputs: []inputInfo{
37274 {0, 56319},
37275 },
37276 outputs: []outputInfo{
37277 {0, 23551},
37278 },
37279 },
37280 },
37281 {
37282 name: "MOVDconst",
37283 auxType: auxInt64,
37284 argLen: 0,
37285 rematerializeable: true,
37286 asm: s390x.AMOVD,
37287 reg: regInfo{
37288 outputs: []outputInfo{
37289 {0, 23551},
37290 },
37291 },
37292 },
37293 {
37294 name: "LDGR",
37295 argLen: 1,
37296 asm: s390x.ALDGR,
37297 reg: regInfo{
37298 inputs: []inputInfo{
37299 {0, 23551},
37300 },
37301 outputs: []outputInfo{
37302 {0, 4294901760},
37303 },
37304 },
37305 },
37306 {
37307 name: "LGDR",
37308 argLen: 1,
37309 asm: s390x.ALGDR,
37310 reg: regInfo{
37311 inputs: []inputInfo{
37312 {0, 4294901760},
37313 },
37314 outputs: []outputInfo{
37315 {0, 23551},
37316 },
37317 },
37318 },
37319 {
37320 name: "CFDBRA",
37321 argLen: 1,
37322 clobberFlags: true,
37323 asm: s390x.ACFDBRA,
37324 reg: regInfo{
37325 inputs: []inputInfo{
37326 {0, 4294901760},
37327 },
37328 outputs: []outputInfo{
37329 {0, 23551},
37330 },
37331 },
37332 },
37333 {
37334 name: "CGDBRA",
37335 argLen: 1,
37336 clobberFlags: true,
37337 asm: s390x.ACGDBRA,
37338 reg: regInfo{
37339 inputs: []inputInfo{
37340 {0, 4294901760},
37341 },
37342 outputs: []outputInfo{
37343 {0, 23551},
37344 },
37345 },
37346 },
37347 {
37348 name: "CFEBRA",
37349 argLen: 1,
37350 clobberFlags: true,
37351 asm: s390x.ACFEBRA,
37352 reg: regInfo{
37353 inputs: []inputInfo{
37354 {0, 4294901760},
37355 },
37356 outputs: []outputInfo{
37357 {0, 23551},
37358 },
37359 },
37360 },
37361 {
37362 name: "CGEBRA",
37363 argLen: 1,
37364 clobberFlags: true,
37365 asm: s390x.ACGEBRA,
37366 reg: regInfo{
37367 inputs: []inputInfo{
37368 {0, 4294901760},
37369 },
37370 outputs: []outputInfo{
37371 {0, 23551},
37372 },
37373 },
37374 },
37375 {
37376 name: "CEFBRA",
37377 argLen: 1,
37378 clobberFlags: true,
37379 asm: s390x.ACEFBRA,
37380 reg: regInfo{
37381 inputs: []inputInfo{
37382 {0, 23551},
37383 },
37384 outputs: []outputInfo{
37385 {0, 4294901760},
37386 },
37387 },
37388 },
37389 {
37390 name: "CDFBRA",
37391 argLen: 1,
37392 clobberFlags: true,
37393 asm: s390x.ACDFBRA,
37394 reg: regInfo{
37395 inputs: []inputInfo{
37396 {0, 23551},
37397 },
37398 outputs: []outputInfo{
37399 {0, 4294901760},
37400 },
37401 },
37402 },
37403 {
37404 name: "CEGBRA",
37405 argLen: 1,
37406 clobberFlags: true,
37407 asm: s390x.ACEGBRA,
37408 reg: regInfo{
37409 inputs: []inputInfo{
37410 {0, 23551},
37411 },
37412 outputs: []outputInfo{
37413 {0, 4294901760},
37414 },
37415 },
37416 },
37417 {
37418 name: "CDGBRA",
37419 argLen: 1,
37420 clobberFlags: true,
37421 asm: s390x.ACDGBRA,
37422 reg: regInfo{
37423 inputs: []inputInfo{
37424 {0, 23551},
37425 },
37426 outputs: []outputInfo{
37427 {0, 4294901760},
37428 },
37429 },
37430 },
37431 {
37432 name: "CLFEBR",
37433 argLen: 1,
37434 clobberFlags: true,
37435 asm: s390x.ACLFEBR,
37436 reg: regInfo{
37437 inputs: []inputInfo{
37438 {0, 4294901760},
37439 },
37440 outputs: []outputInfo{
37441 {0, 23551},
37442 },
37443 },
37444 },
37445 {
37446 name: "CLFDBR",
37447 argLen: 1,
37448 clobberFlags: true,
37449 asm: s390x.ACLFDBR,
37450 reg: regInfo{
37451 inputs: []inputInfo{
37452 {0, 4294901760},
37453 },
37454 outputs: []outputInfo{
37455 {0, 23551},
37456 },
37457 },
37458 },
37459 {
37460 name: "CLGEBR",
37461 argLen: 1,
37462 clobberFlags: true,
37463 asm: s390x.ACLGEBR,
37464 reg: regInfo{
37465 inputs: []inputInfo{
37466 {0, 4294901760},
37467 },
37468 outputs: []outputInfo{
37469 {0, 23551},
37470 },
37471 },
37472 },
37473 {
37474 name: "CLGDBR",
37475 argLen: 1,
37476 clobberFlags: true,
37477 asm: s390x.ACLGDBR,
37478 reg: regInfo{
37479 inputs: []inputInfo{
37480 {0, 4294901760},
37481 },
37482 outputs: []outputInfo{
37483 {0, 23551},
37484 },
37485 },
37486 },
37487 {
37488 name: "CELFBR",
37489 argLen: 1,
37490 clobberFlags: true,
37491 asm: s390x.ACELFBR,
37492 reg: regInfo{
37493 inputs: []inputInfo{
37494 {0, 23551},
37495 },
37496 outputs: []outputInfo{
37497 {0, 4294901760},
37498 },
37499 },
37500 },
37501 {
37502 name: "CDLFBR",
37503 argLen: 1,
37504 clobberFlags: true,
37505 asm: s390x.ACDLFBR,
37506 reg: regInfo{
37507 inputs: []inputInfo{
37508 {0, 23551},
37509 },
37510 outputs: []outputInfo{
37511 {0, 4294901760},
37512 },
37513 },
37514 },
37515 {
37516 name: "CELGBR",
37517 argLen: 1,
37518 clobberFlags: true,
37519 asm: s390x.ACELGBR,
37520 reg: regInfo{
37521 inputs: []inputInfo{
37522 {0, 23551},
37523 },
37524 outputs: []outputInfo{
37525 {0, 4294901760},
37526 },
37527 },
37528 },
37529 {
37530 name: "CDLGBR",
37531 argLen: 1,
37532 clobberFlags: true,
37533 asm: s390x.ACDLGBR,
37534 reg: regInfo{
37535 inputs: []inputInfo{
37536 {0, 23551},
37537 },
37538 outputs: []outputInfo{
37539 {0, 4294901760},
37540 },
37541 },
37542 },
37543 {
37544 name: "LEDBR",
37545 argLen: 1,
37546 asm: s390x.ALEDBR,
37547 reg: regInfo{
37548 inputs: []inputInfo{
37549 {0, 4294901760},
37550 },
37551 outputs: []outputInfo{
37552 {0, 4294901760},
37553 },
37554 },
37555 },
37556 {
37557 name: "LDEBR",
37558 argLen: 1,
37559 asm: s390x.ALDEBR,
37560 reg: regInfo{
37561 inputs: []inputInfo{
37562 {0, 4294901760},
37563 },
37564 outputs: []outputInfo{
37565 {0, 4294901760},
37566 },
37567 },
37568 },
37569 {
37570 name: "MOVDaddr",
37571 auxType: auxSymOff,
37572 argLen: 1,
37573 rematerializeable: true,
37574 symEffect: SymAddr,
37575 reg: regInfo{
37576 inputs: []inputInfo{
37577 {0, 4295000064},
37578 },
37579 outputs: []outputInfo{
37580 {0, 23551},
37581 },
37582 },
37583 },
37584 {
37585 name: "MOVDaddridx",
37586 auxType: auxSymOff,
37587 argLen: 2,
37588 symEffect: SymAddr,
37589 reg: regInfo{
37590 inputs: []inputInfo{
37591 {0, 4295000064},
37592 {1, 56318},
37593 },
37594 outputs: []outputInfo{
37595 {0, 23551},
37596 },
37597 },
37598 },
37599 {
37600 name: "MOVBZload",
37601 auxType: auxSymOff,
37602 argLen: 2,
37603 faultOnNilArg0: true,
37604 symEffect: SymRead,
37605 asm: s390x.AMOVBZ,
37606 reg: regInfo{
37607 inputs: []inputInfo{
37608 {0, 4295023614},
37609 },
37610 outputs: []outputInfo{
37611 {0, 23551},
37612 },
37613 },
37614 },
37615 {
37616 name: "MOVBload",
37617 auxType: auxSymOff,
37618 argLen: 2,
37619 faultOnNilArg0: true,
37620 symEffect: SymRead,
37621 asm: s390x.AMOVB,
37622 reg: regInfo{
37623 inputs: []inputInfo{
37624 {0, 4295023614},
37625 },
37626 outputs: []outputInfo{
37627 {0, 23551},
37628 },
37629 },
37630 },
37631 {
37632 name: "MOVHZload",
37633 auxType: auxSymOff,
37634 argLen: 2,
37635 faultOnNilArg0: true,
37636 symEffect: SymRead,
37637 asm: s390x.AMOVHZ,
37638 reg: regInfo{
37639 inputs: []inputInfo{
37640 {0, 4295023614},
37641 },
37642 outputs: []outputInfo{
37643 {0, 23551},
37644 },
37645 },
37646 },
37647 {
37648 name: "MOVHload",
37649 auxType: auxSymOff,
37650 argLen: 2,
37651 faultOnNilArg0: true,
37652 symEffect: SymRead,
37653 asm: s390x.AMOVH,
37654 reg: regInfo{
37655 inputs: []inputInfo{
37656 {0, 4295023614},
37657 },
37658 outputs: []outputInfo{
37659 {0, 23551},
37660 },
37661 },
37662 },
37663 {
37664 name: "MOVWZload",
37665 auxType: auxSymOff,
37666 argLen: 2,
37667 faultOnNilArg0: true,
37668 symEffect: SymRead,
37669 asm: s390x.AMOVWZ,
37670 reg: regInfo{
37671 inputs: []inputInfo{
37672 {0, 4295023614},
37673 },
37674 outputs: []outputInfo{
37675 {0, 23551},
37676 },
37677 },
37678 },
37679 {
37680 name: "MOVWload",
37681 auxType: auxSymOff,
37682 argLen: 2,
37683 faultOnNilArg0: true,
37684 symEffect: SymRead,
37685 asm: s390x.AMOVW,
37686 reg: regInfo{
37687 inputs: []inputInfo{
37688 {0, 4295023614},
37689 },
37690 outputs: []outputInfo{
37691 {0, 23551},
37692 },
37693 },
37694 },
37695 {
37696 name: "MOVDload",
37697 auxType: auxSymOff,
37698 argLen: 2,
37699 faultOnNilArg0: true,
37700 symEffect: SymRead,
37701 asm: s390x.AMOVD,
37702 reg: regInfo{
37703 inputs: []inputInfo{
37704 {0, 4295023614},
37705 },
37706 outputs: []outputInfo{
37707 {0, 23551},
37708 },
37709 },
37710 },
37711 {
37712 name: "MOVWBR",
37713 argLen: 1,
37714 asm: s390x.AMOVWBR,
37715 reg: regInfo{
37716 inputs: []inputInfo{
37717 {0, 23551},
37718 },
37719 outputs: []outputInfo{
37720 {0, 23551},
37721 },
37722 },
37723 },
37724 {
37725 name: "MOVDBR",
37726 argLen: 1,
37727 asm: s390x.AMOVDBR,
37728 reg: regInfo{
37729 inputs: []inputInfo{
37730 {0, 23551},
37731 },
37732 outputs: []outputInfo{
37733 {0, 23551},
37734 },
37735 },
37736 },
37737 {
37738 name: "MOVHBRload",
37739 auxType: auxSymOff,
37740 argLen: 2,
37741 faultOnNilArg0: true,
37742 symEffect: SymRead,
37743 asm: s390x.AMOVHBR,
37744 reg: regInfo{
37745 inputs: []inputInfo{
37746 {0, 4295023614},
37747 },
37748 outputs: []outputInfo{
37749 {0, 23551},
37750 },
37751 },
37752 },
37753 {
37754 name: "MOVWBRload",
37755 auxType: auxSymOff,
37756 argLen: 2,
37757 faultOnNilArg0: true,
37758 symEffect: SymRead,
37759 asm: s390x.AMOVWBR,
37760 reg: regInfo{
37761 inputs: []inputInfo{
37762 {0, 4295023614},
37763 },
37764 outputs: []outputInfo{
37765 {0, 23551},
37766 },
37767 },
37768 },
37769 {
37770 name: "MOVDBRload",
37771 auxType: auxSymOff,
37772 argLen: 2,
37773 faultOnNilArg0: true,
37774 symEffect: SymRead,
37775 asm: s390x.AMOVDBR,
37776 reg: regInfo{
37777 inputs: []inputInfo{
37778 {0, 4295023614},
37779 },
37780 outputs: []outputInfo{
37781 {0, 23551},
37782 },
37783 },
37784 },
37785 {
37786 name: "MOVBstore",
37787 auxType: auxSymOff,
37788 argLen: 3,
37789 faultOnNilArg0: true,
37790 symEffect: SymWrite,
37791 asm: s390x.AMOVB,
37792 reg: regInfo{
37793 inputs: []inputInfo{
37794 {0, 4295023614},
37795 {1, 56319},
37796 },
37797 },
37798 },
37799 {
37800 name: "MOVHstore",
37801 auxType: auxSymOff,
37802 argLen: 3,
37803 faultOnNilArg0: true,
37804 symEffect: SymWrite,
37805 asm: s390x.AMOVH,
37806 reg: regInfo{
37807 inputs: []inputInfo{
37808 {0, 4295023614},
37809 {1, 56319},
37810 },
37811 },
37812 },
37813 {
37814 name: "MOVWstore",
37815 auxType: auxSymOff,
37816 argLen: 3,
37817 faultOnNilArg0: true,
37818 symEffect: SymWrite,
37819 asm: s390x.AMOVW,
37820 reg: regInfo{
37821 inputs: []inputInfo{
37822 {0, 4295023614},
37823 {1, 56319},
37824 },
37825 },
37826 },
37827 {
37828 name: "MOVDstore",
37829 auxType: auxSymOff,
37830 argLen: 3,
37831 faultOnNilArg0: true,
37832 symEffect: SymWrite,
37833 asm: s390x.AMOVD,
37834 reg: regInfo{
37835 inputs: []inputInfo{
37836 {0, 4295023614},
37837 {1, 56319},
37838 },
37839 },
37840 },
37841 {
37842 name: "MOVHBRstore",
37843 auxType: auxSymOff,
37844 argLen: 3,
37845 faultOnNilArg0: true,
37846 symEffect: SymWrite,
37847 asm: s390x.AMOVHBR,
37848 reg: regInfo{
37849 inputs: []inputInfo{
37850 {0, 56318},
37851 {1, 56319},
37852 },
37853 },
37854 },
37855 {
37856 name: "MOVWBRstore",
37857 auxType: auxSymOff,
37858 argLen: 3,
37859 faultOnNilArg0: true,
37860 symEffect: SymWrite,
37861 asm: s390x.AMOVWBR,
37862 reg: regInfo{
37863 inputs: []inputInfo{
37864 {0, 56318},
37865 {1, 56319},
37866 },
37867 },
37868 },
37869 {
37870 name: "MOVDBRstore",
37871 auxType: auxSymOff,
37872 argLen: 3,
37873 faultOnNilArg0: true,
37874 symEffect: SymWrite,
37875 asm: s390x.AMOVDBR,
37876 reg: regInfo{
37877 inputs: []inputInfo{
37878 {0, 56318},
37879 {1, 56319},
37880 },
37881 },
37882 },
37883 {
37884 name: "MVC",
37885 auxType: auxSymValAndOff,
37886 argLen: 3,
37887 clobberFlags: true,
37888 faultOnNilArg0: true,
37889 faultOnNilArg1: true,
37890 symEffect: SymNone,
37891 asm: s390x.AMVC,
37892 reg: regInfo{
37893 inputs: []inputInfo{
37894 {0, 56318},
37895 {1, 56318},
37896 },
37897 },
37898 },
37899 {
37900 name: "MOVBZloadidx",
37901 auxType: auxSymOff,
37902 argLen: 3,
37903 commutative: true,
37904 symEffect: SymRead,
37905 asm: s390x.AMOVBZ,
37906 reg: regInfo{
37907 inputs: []inputInfo{
37908 {1, 56318},
37909 {0, 4295023614},
37910 },
37911 outputs: []outputInfo{
37912 {0, 23551},
37913 },
37914 },
37915 },
37916 {
37917 name: "MOVBloadidx",
37918 auxType: auxSymOff,
37919 argLen: 3,
37920 commutative: true,
37921 symEffect: SymRead,
37922 asm: s390x.AMOVB,
37923 reg: regInfo{
37924 inputs: []inputInfo{
37925 {1, 56318},
37926 {0, 4295023614},
37927 },
37928 outputs: []outputInfo{
37929 {0, 23551},
37930 },
37931 },
37932 },
37933 {
37934 name: "MOVHZloadidx",
37935 auxType: auxSymOff,
37936 argLen: 3,
37937 commutative: true,
37938 symEffect: SymRead,
37939 asm: s390x.AMOVHZ,
37940 reg: regInfo{
37941 inputs: []inputInfo{
37942 {1, 56318},
37943 {0, 4295023614},
37944 },
37945 outputs: []outputInfo{
37946 {0, 23551},
37947 },
37948 },
37949 },
37950 {
37951 name: "MOVHloadidx",
37952 auxType: auxSymOff,
37953 argLen: 3,
37954 commutative: true,
37955 symEffect: SymRead,
37956 asm: s390x.AMOVH,
37957 reg: regInfo{
37958 inputs: []inputInfo{
37959 {1, 56318},
37960 {0, 4295023614},
37961 },
37962 outputs: []outputInfo{
37963 {0, 23551},
37964 },
37965 },
37966 },
37967 {
37968 name: "MOVWZloadidx",
37969 auxType: auxSymOff,
37970 argLen: 3,
37971 commutative: true,
37972 symEffect: SymRead,
37973 asm: s390x.AMOVWZ,
37974 reg: regInfo{
37975 inputs: []inputInfo{
37976 {1, 56318},
37977 {0, 4295023614},
37978 },
37979 outputs: []outputInfo{
37980 {0, 23551},
37981 },
37982 },
37983 },
37984 {
37985 name: "MOVWloadidx",
37986 auxType: auxSymOff,
37987 argLen: 3,
37988 commutative: true,
37989 symEffect: SymRead,
37990 asm: s390x.AMOVW,
37991 reg: regInfo{
37992 inputs: []inputInfo{
37993 {1, 56318},
37994 {0, 4295023614},
37995 },
37996 outputs: []outputInfo{
37997 {0, 23551},
37998 },
37999 },
38000 },
38001 {
38002 name: "MOVDloadidx",
38003 auxType: auxSymOff,
38004 argLen: 3,
38005 commutative: true,
38006 symEffect: SymRead,
38007 asm: s390x.AMOVD,
38008 reg: regInfo{
38009 inputs: []inputInfo{
38010 {1, 56318},
38011 {0, 4295023614},
38012 },
38013 outputs: []outputInfo{
38014 {0, 23551},
38015 },
38016 },
38017 },
38018 {
38019 name: "MOVHBRloadidx",
38020 auxType: auxSymOff,
38021 argLen: 3,
38022 commutative: true,
38023 symEffect: SymRead,
38024 asm: s390x.AMOVHBR,
38025 reg: regInfo{
38026 inputs: []inputInfo{
38027 {1, 56318},
38028 {0, 4295023614},
38029 },
38030 outputs: []outputInfo{
38031 {0, 23551},
38032 },
38033 },
38034 },
38035 {
38036 name: "MOVWBRloadidx",
38037 auxType: auxSymOff,
38038 argLen: 3,
38039 commutative: true,
38040 symEffect: SymRead,
38041 asm: s390x.AMOVWBR,
38042 reg: regInfo{
38043 inputs: []inputInfo{
38044 {1, 56318},
38045 {0, 4295023614},
38046 },
38047 outputs: []outputInfo{
38048 {0, 23551},
38049 },
38050 },
38051 },
38052 {
38053 name: "MOVDBRloadidx",
38054 auxType: auxSymOff,
38055 argLen: 3,
38056 commutative: true,
38057 symEffect: SymRead,
38058 asm: s390x.AMOVDBR,
38059 reg: regInfo{
38060 inputs: []inputInfo{
38061 {1, 56318},
38062 {0, 4295023614},
38063 },
38064 outputs: []outputInfo{
38065 {0, 23551},
38066 },
38067 },
38068 },
38069 {
38070 name: "MOVBstoreidx",
38071 auxType: auxSymOff,
38072 argLen: 4,
38073 commutative: true,
38074 symEffect: SymWrite,
38075 asm: s390x.AMOVB,
38076 reg: regInfo{
38077 inputs: []inputInfo{
38078 {0, 56318},
38079 {1, 56318},
38080 {2, 56319},
38081 },
38082 },
38083 },
38084 {
38085 name: "MOVHstoreidx",
38086 auxType: auxSymOff,
38087 argLen: 4,
38088 commutative: true,
38089 symEffect: SymWrite,
38090 asm: s390x.AMOVH,
38091 reg: regInfo{
38092 inputs: []inputInfo{
38093 {0, 56318},
38094 {1, 56318},
38095 {2, 56319},
38096 },
38097 },
38098 },
38099 {
38100 name: "MOVWstoreidx",
38101 auxType: auxSymOff,
38102 argLen: 4,
38103 commutative: true,
38104 symEffect: SymWrite,
38105 asm: s390x.AMOVW,
38106 reg: regInfo{
38107 inputs: []inputInfo{
38108 {0, 56318},
38109 {1, 56318},
38110 {2, 56319},
38111 },
38112 },
38113 },
38114 {
38115 name: "MOVDstoreidx",
38116 auxType: auxSymOff,
38117 argLen: 4,
38118 commutative: true,
38119 symEffect: SymWrite,
38120 asm: s390x.AMOVD,
38121 reg: regInfo{
38122 inputs: []inputInfo{
38123 {0, 56318},
38124 {1, 56318},
38125 {2, 56319},
38126 },
38127 },
38128 },
38129 {
38130 name: "MOVHBRstoreidx",
38131 auxType: auxSymOff,
38132 argLen: 4,
38133 commutative: true,
38134 symEffect: SymWrite,
38135 asm: s390x.AMOVHBR,
38136 reg: regInfo{
38137 inputs: []inputInfo{
38138 {0, 56318},
38139 {1, 56318},
38140 {2, 56319},
38141 },
38142 },
38143 },
38144 {
38145 name: "MOVWBRstoreidx",
38146 auxType: auxSymOff,
38147 argLen: 4,
38148 commutative: true,
38149 symEffect: SymWrite,
38150 asm: s390x.AMOVWBR,
38151 reg: regInfo{
38152 inputs: []inputInfo{
38153 {0, 56318},
38154 {1, 56318},
38155 {2, 56319},
38156 },
38157 },
38158 },
38159 {
38160 name: "MOVDBRstoreidx",
38161 auxType: auxSymOff,
38162 argLen: 4,
38163 commutative: true,
38164 symEffect: SymWrite,
38165 asm: s390x.AMOVDBR,
38166 reg: regInfo{
38167 inputs: []inputInfo{
38168 {0, 56318},
38169 {1, 56318},
38170 {2, 56319},
38171 },
38172 },
38173 },
38174 {
38175 name: "MOVBstoreconst",
38176 auxType: auxSymValAndOff,
38177 argLen: 2,
38178 faultOnNilArg0: true,
38179 symEffect: SymWrite,
38180 asm: s390x.AMOVB,
38181 reg: regInfo{
38182 inputs: []inputInfo{
38183 {0, 4295023614},
38184 },
38185 },
38186 },
38187 {
38188 name: "MOVHstoreconst",
38189 auxType: auxSymValAndOff,
38190 argLen: 2,
38191 faultOnNilArg0: true,
38192 symEffect: SymWrite,
38193 asm: s390x.AMOVH,
38194 reg: regInfo{
38195 inputs: []inputInfo{
38196 {0, 4295023614},
38197 },
38198 },
38199 },
38200 {
38201 name: "MOVWstoreconst",
38202 auxType: auxSymValAndOff,
38203 argLen: 2,
38204 faultOnNilArg0: true,
38205 symEffect: SymWrite,
38206 asm: s390x.AMOVW,
38207 reg: regInfo{
38208 inputs: []inputInfo{
38209 {0, 4295023614},
38210 },
38211 },
38212 },
38213 {
38214 name: "MOVDstoreconst",
38215 auxType: auxSymValAndOff,
38216 argLen: 2,
38217 faultOnNilArg0: true,
38218 symEffect: SymWrite,
38219 asm: s390x.AMOVD,
38220 reg: regInfo{
38221 inputs: []inputInfo{
38222 {0, 4295023614},
38223 },
38224 },
38225 },
38226 {
38227 name: "CLEAR",
38228 auxType: auxSymValAndOff,
38229 argLen: 2,
38230 clobberFlags: true,
38231 faultOnNilArg0: true,
38232 symEffect: SymWrite,
38233 asm: s390x.ACLEAR,
38234 reg: regInfo{
38235 inputs: []inputInfo{
38236 {0, 23550},
38237 },
38238 },
38239 },
38240 {
38241 name: "CALLstatic",
38242 auxType: auxCallOff,
38243 argLen: 1,
38244 clobberFlags: true,
38245 call: true,
38246 reg: regInfo{
38247 clobbers: 4294933503,
38248 },
38249 },
38250 {
38251 name: "CALLtail",
38252 auxType: auxCallOff,
38253 argLen: 1,
38254 clobberFlags: true,
38255 call: true,
38256 tailCall: true,
38257 reg: regInfo{
38258 clobbers: 4294933503,
38259 },
38260 },
38261 {
38262 name: "CALLclosure",
38263 auxType: auxCallOff,
38264 argLen: 3,
38265 clobberFlags: true,
38266 call: true,
38267 reg: regInfo{
38268 inputs: []inputInfo{
38269 {1, 4096},
38270 {0, 56318},
38271 },
38272 clobbers: 4294933503,
38273 },
38274 },
38275 {
38276 name: "CALLinter",
38277 auxType: auxCallOff,
38278 argLen: 2,
38279 clobberFlags: true,
38280 call: true,
38281 reg: regInfo{
38282 inputs: []inputInfo{
38283 {0, 23550},
38284 },
38285 clobbers: 4294933503,
38286 },
38287 },
38288 {
38289 name: "InvertFlags",
38290 argLen: 1,
38291 reg: regInfo{},
38292 },
38293 {
38294 name: "LoweredGetG",
38295 argLen: 1,
38296 reg: regInfo{
38297 outputs: []outputInfo{
38298 {0, 23551},
38299 },
38300 },
38301 },
38302 {
38303 name: "LoweredGetClosurePtr",
38304 argLen: 0,
38305 zeroWidth: true,
38306 reg: regInfo{
38307 outputs: []outputInfo{
38308 {0, 4096},
38309 },
38310 },
38311 },
38312 {
38313 name: "LoweredGetCallerSP",
38314 argLen: 1,
38315 rematerializeable: true,
38316 reg: regInfo{
38317 outputs: []outputInfo{
38318 {0, 23551},
38319 },
38320 },
38321 },
38322 {
38323 name: "LoweredGetCallerPC",
38324 argLen: 0,
38325 rematerializeable: true,
38326 reg: regInfo{
38327 outputs: []outputInfo{
38328 {0, 23551},
38329 },
38330 },
38331 },
38332 {
38333 name: "LoweredNilCheck",
38334 argLen: 2,
38335 clobberFlags: true,
38336 nilCheck: true,
38337 faultOnNilArg0: true,
38338 reg: regInfo{
38339 inputs: []inputInfo{
38340 {0, 56318},
38341 },
38342 },
38343 },
38344 {
38345 name: "LoweredRound32F",
38346 argLen: 1,
38347 resultInArg0: true,
38348 zeroWidth: true,
38349 reg: regInfo{
38350 inputs: []inputInfo{
38351 {0, 4294901760},
38352 },
38353 outputs: []outputInfo{
38354 {0, 4294901760},
38355 },
38356 },
38357 },
38358 {
38359 name: "LoweredRound64F",
38360 argLen: 1,
38361 resultInArg0: true,
38362 zeroWidth: true,
38363 reg: regInfo{
38364 inputs: []inputInfo{
38365 {0, 4294901760},
38366 },
38367 outputs: []outputInfo{
38368 {0, 4294901760},
38369 },
38370 },
38371 },
38372 {
38373 name: "LoweredWB",
38374 auxType: auxInt64,
38375 argLen: 1,
38376 clobberFlags: true,
38377 reg: regInfo{
38378 clobbers: 4294918146,
38379 outputs: []outputInfo{
38380 {0, 512},
38381 },
38382 },
38383 },
38384 {
38385 name: "LoweredPanicBoundsA",
38386 auxType: auxInt64,
38387 argLen: 3,
38388 call: true,
38389 reg: regInfo{
38390 inputs: []inputInfo{
38391 {0, 4},
38392 {1, 8},
38393 },
38394 },
38395 },
38396 {
38397 name: "LoweredPanicBoundsB",
38398 auxType: auxInt64,
38399 argLen: 3,
38400 call: true,
38401 reg: regInfo{
38402 inputs: []inputInfo{
38403 {0, 2},
38404 {1, 4},
38405 },
38406 },
38407 },
38408 {
38409 name: "LoweredPanicBoundsC",
38410 auxType: auxInt64,
38411 argLen: 3,
38412 call: true,
38413 reg: regInfo{
38414 inputs: []inputInfo{
38415 {0, 1},
38416 {1, 2},
38417 },
38418 },
38419 },
38420 {
38421 name: "FlagEQ",
38422 argLen: 0,
38423 reg: regInfo{},
38424 },
38425 {
38426 name: "FlagLT",
38427 argLen: 0,
38428 reg: regInfo{},
38429 },
38430 {
38431 name: "FlagGT",
38432 argLen: 0,
38433 reg: regInfo{},
38434 },
38435 {
38436 name: "FlagOV",
38437 argLen: 0,
38438 reg: regInfo{},
38439 },
38440 {
38441 name: "SYNC",
38442 argLen: 1,
38443 asm: s390x.ASYNC,
38444 reg: regInfo{},
38445 },
38446 {
38447 name: "MOVBZatomicload",
38448 auxType: auxSymOff,
38449 argLen: 2,
38450 faultOnNilArg0: true,
38451 symEffect: SymRead,
38452 asm: s390x.AMOVBZ,
38453 reg: regInfo{
38454 inputs: []inputInfo{
38455 {0, 4295023614},
38456 },
38457 outputs: []outputInfo{
38458 {0, 23551},
38459 },
38460 },
38461 },
38462 {
38463 name: "MOVWZatomicload",
38464 auxType: auxSymOff,
38465 argLen: 2,
38466 faultOnNilArg0: true,
38467 symEffect: SymRead,
38468 asm: s390x.AMOVWZ,
38469 reg: regInfo{
38470 inputs: []inputInfo{
38471 {0, 4295023614},
38472 },
38473 outputs: []outputInfo{
38474 {0, 23551},
38475 },
38476 },
38477 },
38478 {
38479 name: "MOVDatomicload",
38480 auxType: auxSymOff,
38481 argLen: 2,
38482 faultOnNilArg0: true,
38483 symEffect: SymRead,
38484 asm: s390x.AMOVD,
38485 reg: regInfo{
38486 inputs: []inputInfo{
38487 {0, 4295023614},
38488 },
38489 outputs: []outputInfo{
38490 {0, 23551},
38491 },
38492 },
38493 },
38494 {
38495 name: "MOVBatomicstore",
38496 auxType: auxSymOff,
38497 argLen: 3,
38498 clobberFlags: true,
38499 faultOnNilArg0: true,
38500 hasSideEffects: true,
38501 symEffect: SymWrite,
38502 asm: s390x.AMOVB,
38503 reg: regInfo{
38504 inputs: []inputInfo{
38505 {0, 4295023614},
38506 {1, 56319},
38507 },
38508 },
38509 },
38510 {
38511 name: "MOVWatomicstore",
38512 auxType: auxSymOff,
38513 argLen: 3,
38514 clobberFlags: true,
38515 faultOnNilArg0: true,
38516 hasSideEffects: true,
38517 symEffect: SymWrite,
38518 asm: s390x.AMOVW,
38519 reg: regInfo{
38520 inputs: []inputInfo{
38521 {0, 4295023614},
38522 {1, 56319},
38523 },
38524 },
38525 },
38526 {
38527 name: "MOVDatomicstore",
38528 auxType: auxSymOff,
38529 argLen: 3,
38530 clobberFlags: true,
38531 faultOnNilArg0: true,
38532 hasSideEffects: true,
38533 symEffect: SymWrite,
38534 asm: s390x.AMOVD,
38535 reg: regInfo{
38536 inputs: []inputInfo{
38537 {0, 4295023614},
38538 {1, 56319},
38539 },
38540 },
38541 },
38542 {
38543 name: "LAA",
38544 auxType: auxSymOff,
38545 argLen: 3,
38546 clobberFlags: true,
38547 faultOnNilArg0: true,
38548 hasSideEffects: true,
38549 symEffect: SymRdWr,
38550 asm: s390x.ALAA,
38551 reg: regInfo{
38552 inputs: []inputInfo{
38553 {0, 4295023614},
38554 {1, 56319},
38555 },
38556 outputs: []outputInfo{
38557 {0, 23551},
38558 },
38559 },
38560 },
38561 {
38562 name: "LAAG",
38563 auxType: auxSymOff,
38564 argLen: 3,
38565 clobberFlags: true,
38566 faultOnNilArg0: true,
38567 hasSideEffects: true,
38568 symEffect: SymRdWr,
38569 asm: s390x.ALAAG,
38570 reg: regInfo{
38571 inputs: []inputInfo{
38572 {0, 4295023614},
38573 {1, 56319},
38574 },
38575 outputs: []outputInfo{
38576 {0, 23551},
38577 },
38578 },
38579 },
38580 {
38581 name: "AddTupleFirst32",
38582 argLen: 2,
38583 reg: regInfo{},
38584 },
38585 {
38586 name: "AddTupleFirst64",
38587 argLen: 2,
38588 reg: regInfo{},
38589 },
38590 {
38591 name: "LAN",
38592 argLen: 3,
38593 clobberFlags: true,
38594 hasSideEffects: true,
38595 asm: s390x.ALAN,
38596 reg: regInfo{
38597 inputs: []inputInfo{
38598 {0, 4295023614},
38599 {1, 56319},
38600 },
38601 },
38602 },
38603 {
38604 name: "LANfloor",
38605 argLen: 3,
38606 clobberFlags: true,
38607 hasSideEffects: true,
38608 asm: s390x.ALAN,
38609 reg: regInfo{
38610 inputs: []inputInfo{
38611 {0, 2},
38612 {1, 56319},
38613 },
38614 clobbers: 2,
38615 },
38616 },
38617 {
38618 name: "LAO",
38619 argLen: 3,
38620 clobberFlags: true,
38621 hasSideEffects: true,
38622 asm: s390x.ALAO,
38623 reg: regInfo{
38624 inputs: []inputInfo{
38625 {0, 4295023614},
38626 {1, 56319},
38627 },
38628 },
38629 },
38630 {
38631 name: "LAOfloor",
38632 argLen: 3,
38633 clobberFlags: true,
38634 hasSideEffects: true,
38635 asm: s390x.ALAO,
38636 reg: regInfo{
38637 inputs: []inputInfo{
38638 {0, 2},
38639 {1, 56319},
38640 },
38641 clobbers: 2,
38642 },
38643 },
38644 {
38645 name: "LoweredAtomicCas32",
38646 auxType: auxSymOff,
38647 argLen: 4,
38648 clobberFlags: true,
38649 faultOnNilArg0: true,
38650 hasSideEffects: true,
38651 symEffect: SymRdWr,
38652 asm: s390x.ACS,
38653 reg: regInfo{
38654 inputs: []inputInfo{
38655 {1, 1},
38656 {0, 56318},
38657 {2, 56319},
38658 },
38659 clobbers: 1,
38660 outputs: []outputInfo{
38661 {1, 0},
38662 {0, 23551},
38663 },
38664 },
38665 },
38666 {
38667 name: "LoweredAtomicCas64",
38668 auxType: auxSymOff,
38669 argLen: 4,
38670 clobberFlags: true,
38671 faultOnNilArg0: true,
38672 hasSideEffects: true,
38673 symEffect: SymRdWr,
38674 asm: s390x.ACSG,
38675 reg: regInfo{
38676 inputs: []inputInfo{
38677 {1, 1},
38678 {0, 56318},
38679 {2, 56319},
38680 },
38681 clobbers: 1,
38682 outputs: []outputInfo{
38683 {1, 0},
38684 {0, 23551},
38685 },
38686 },
38687 },
38688 {
38689 name: "LoweredAtomicExchange32",
38690 auxType: auxSymOff,
38691 argLen: 3,
38692 clobberFlags: true,
38693 faultOnNilArg0: true,
38694 hasSideEffects: true,
38695 symEffect: SymRdWr,
38696 asm: s390x.ACS,
38697 reg: regInfo{
38698 inputs: []inputInfo{
38699 {0, 56318},
38700 {1, 56318},
38701 },
38702 outputs: []outputInfo{
38703 {1, 0},
38704 {0, 1},
38705 },
38706 },
38707 },
38708 {
38709 name: "LoweredAtomicExchange64",
38710 auxType: auxSymOff,
38711 argLen: 3,
38712 clobberFlags: true,
38713 faultOnNilArg0: true,
38714 hasSideEffects: true,
38715 symEffect: SymRdWr,
38716 asm: s390x.ACSG,
38717 reg: regInfo{
38718 inputs: []inputInfo{
38719 {0, 56318},
38720 {1, 56318},
38721 },
38722 outputs: []outputInfo{
38723 {1, 0},
38724 {0, 1},
38725 },
38726 },
38727 },
38728 {
38729 name: "FLOGR",
38730 argLen: 1,
38731 clobberFlags: true,
38732 asm: s390x.AFLOGR,
38733 reg: regInfo{
38734 inputs: []inputInfo{
38735 {0, 23551},
38736 },
38737 clobbers: 2,
38738 outputs: []outputInfo{
38739 {0, 1},
38740 },
38741 },
38742 },
38743 {
38744 name: "POPCNT",
38745 argLen: 1,
38746 clobberFlags: true,
38747 asm: s390x.APOPCNT,
38748 reg: regInfo{
38749 inputs: []inputInfo{
38750 {0, 23551},
38751 },
38752 outputs: []outputInfo{
38753 {0, 23551},
38754 },
38755 },
38756 },
38757 {
38758 name: "MLGR",
38759 argLen: 2,
38760 asm: s390x.AMLGR,
38761 reg: regInfo{
38762 inputs: []inputInfo{
38763 {1, 8},
38764 {0, 23551},
38765 },
38766 outputs: []outputInfo{
38767 {0, 4},
38768 {1, 8},
38769 },
38770 },
38771 },
38772 {
38773 name: "SumBytes2",
38774 argLen: 1,
38775 reg: regInfo{},
38776 },
38777 {
38778 name: "SumBytes4",
38779 argLen: 1,
38780 reg: regInfo{},
38781 },
38782 {
38783 name: "SumBytes8",
38784 argLen: 1,
38785 reg: regInfo{},
38786 },
38787 {
38788 name: "STMG2",
38789 auxType: auxSymOff,
38790 argLen: 4,
38791 clobberFlags: true,
38792 faultOnNilArg0: true,
38793 symEffect: SymWrite,
38794 asm: s390x.ASTMG,
38795 reg: regInfo{
38796 inputs: []inputInfo{
38797 {1, 2},
38798 {2, 4},
38799 {0, 56318},
38800 },
38801 },
38802 },
38803 {
38804 name: "STMG3",
38805 auxType: auxSymOff,
38806 argLen: 5,
38807 clobberFlags: true,
38808 faultOnNilArg0: true,
38809 symEffect: SymWrite,
38810 asm: s390x.ASTMG,
38811 reg: regInfo{
38812 inputs: []inputInfo{
38813 {1, 2},
38814 {2, 4},
38815 {3, 8},
38816 {0, 56318},
38817 },
38818 },
38819 },
38820 {
38821 name: "STMG4",
38822 auxType: auxSymOff,
38823 argLen: 6,
38824 clobberFlags: true,
38825 faultOnNilArg0: true,
38826 symEffect: SymWrite,
38827 asm: s390x.ASTMG,
38828 reg: regInfo{
38829 inputs: []inputInfo{
38830 {1, 2},
38831 {2, 4},
38832 {3, 8},
38833 {4, 16},
38834 {0, 56318},
38835 },
38836 },
38837 },
38838 {
38839 name: "STM2",
38840 auxType: auxSymOff,
38841 argLen: 4,
38842 clobberFlags: true,
38843 faultOnNilArg0: true,
38844 symEffect: SymWrite,
38845 asm: s390x.ASTMY,
38846 reg: regInfo{
38847 inputs: []inputInfo{
38848 {1, 2},
38849 {2, 4},
38850 {0, 56318},
38851 },
38852 },
38853 },
38854 {
38855 name: "STM3",
38856 auxType: auxSymOff,
38857 argLen: 5,
38858 clobberFlags: true,
38859 faultOnNilArg0: true,
38860 symEffect: SymWrite,
38861 asm: s390x.ASTMY,
38862 reg: regInfo{
38863 inputs: []inputInfo{
38864 {1, 2},
38865 {2, 4},
38866 {3, 8},
38867 {0, 56318},
38868 },
38869 },
38870 },
38871 {
38872 name: "STM4",
38873 auxType: auxSymOff,
38874 argLen: 6,
38875 clobberFlags: true,
38876 faultOnNilArg0: true,
38877 symEffect: SymWrite,
38878 asm: s390x.ASTMY,
38879 reg: regInfo{
38880 inputs: []inputInfo{
38881 {1, 2},
38882 {2, 4},
38883 {3, 8},
38884 {4, 16},
38885 {0, 56318},
38886 },
38887 },
38888 },
38889 {
38890 name: "LoweredMove",
38891 auxType: auxInt64,
38892 argLen: 4,
38893 clobberFlags: true,
38894 faultOnNilArg0: true,
38895 faultOnNilArg1: true,
38896 reg: regInfo{
38897 inputs: []inputInfo{
38898 {0, 2},
38899 {1, 4},
38900 {2, 56319},
38901 },
38902 clobbers: 6,
38903 },
38904 },
38905 {
38906 name: "LoweredZero",
38907 auxType: auxInt64,
38908 argLen: 3,
38909 clobberFlags: true,
38910 faultOnNilArg0: true,
38911 reg: regInfo{
38912 inputs: []inputInfo{
38913 {0, 2},
38914 {1, 56319},
38915 },
38916 clobbers: 2,
38917 },
38918 },
38919
38920 {
38921 name: "LoweredStaticCall",
38922 auxType: auxCallOff,
38923 argLen: 1,
38924 call: true,
38925 reg: regInfo{
38926 clobbers: 844424930131967,
38927 },
38928 },
38929 {
38930 name: "LoweredTailCall",
38931 auxType: auxCallOff,
38932 argLen: 1,
38933 call: true,
38934 tailCall: true,
38935 reg: regInfo{
38936 clobbers: 844424930131967,
38937 },
38938 },
38939 {
38940 name: "LoweredClosureCall",
38941 auxType: auxCallOff,
38942 argLen: 3,
38943 call: true,
38944 reg: regInfo{
38945 inputs: []inputInfo{
38946 {0, 65535},
38947 {1, 65535},
38948 },
38949 clobbers: 844424930131967,
38950 },
38951 },
38952 {
38953 name: "LoweredInterCall",
38954 auxType: auxCallOff,
38955 argLen: 2,
38956 call: true,
38957 reg: regInfo{
38958 inputs: []inputInfo{
38959 {0, 65535},
38960 },
38961 clobbers: 844424930131967,
38962 },
38963 },
38964 {
38965 name: "LoweredAddr",
38966 auxType: auxSymOff,
38967 argLen: 1,
38968 rematerializeable: true,
38969 symEffect: SymAddr,
38970 reg: regInfo{
38971 inputs: []inputInfo{
38972 {0, 281474976776191},
38973 },
38974 outputs: []outputInfo{
38975 {0, 65535},
38976 },
38977 },
38978 },
38979 {
38980 name: "LoweredMove",
38981 auxType: auxInt64,
38982 argLen: 3,
38983 reg: regInfo{
38984 inputs: []inputInfo{
38985 {0, 65535},
38986 {1, 65535},
38987 },
38988 },
38989 },
38990 {
38991 name: "LoweredZero",
38992 auxType: auxInt64,
38993 argLen: 2,
38994 reg: regInfo{
38995 inputs: []inputInfo{
38996 {0, 65535},
38997 },
38998 },
38999 },
39000 {
39001 name: "LoweredGetClosurePtr",
39002 argLen: 0,
39003 reg: regInfo{
39004 outputs: []outputInfo{
39005 {0, 65535},
39006 },
39007 },
39008 },
39009 {
39010 name: "LoweredGetCallerPC",
39011 argLen: 0,
39012 rematerializeable: true,
39013 reg: regInfo{
39014 outputs: []outputInfo{
39015 {0, 65535},
39016 },
39017 },
39018 },
39019 {
39020 name: "LoweredGetCallerSP",
39021 argLen: 1,
39022 rematerializeable: true,
39023 reg: regInfo{
39024 outputs: []outputInfo{
39025 {0, 65535},
39026 },
39027 },
39028 },
39029 {
39030 name: "LoweredNilCheck",
39031 argLen: 2,
39032 nilCheck: true,
39033 faultOnNilArg0: true,
39034 reg: regInfo{
39035 inputs: []inputInfo{
39036 {0, 65535},
39037 },
39038 },
39039 },
39040 {
39041 name: "LoweredWB",
39042 auxType: auxInt64,
39043 argLen: 1,
39044 reg: regInfo{
39045 clobbers: 844424930131967,
39046 outputs: []outputInfo{
39047 {0, 65535},
39048 },
39049 },
39050 },
39051 {
39052 name: "LoweredConvert",
39053 argLen: 2,
39054 reg: regInfo{
39055 inputs: []inputInfo{
39056 {0, 65535},
39057 },
39058 outputs: []outputInfo{
39059 {0, 65535},
39060 },
39061 },
39062 },
39063 {
39064 name: "Select",
39065 argLen: 3,
39066 asm: wasm.ASelect,
39067 reg: regInfo{
39068 inputs: []inputInfo{
39069 {0, 281474976776191},
39070 {1, 281474976776191},
39071 {2, 281474976776191},
39072 },
39073 outputs: []outputInfo{
39074 {0, 65535},
39075 },
39076 },
39077 },
39078 {
39079 name: "I64Load8U",
39080 auxType: auxInt64,
39081 argLen: 2,
39082 asm: wasm.AI64Load8U,
39083 reg: regInfo{
39084 inputs: []inputInfo{
39085 {0, 1407374883618815},
39086 },
39087 outputs: []outputInfo{
39088 {0, 65535},
39089 },
39090 },
39091 },
39092 {
39093 name: "I64Load8S",
39094 auxType: auxInt64,
39095 argLen: 2,
39096 asm: wasm.AI64Load8S,
39097 reg: regInfo{
39098 inputs: []inputInfo{
39099 {0, 1407374883618815},
39100 },
39101 outputs: []outputInfo{
39102 {0, 65535},
39103 },
39104 },
39105 },
39106 {
39107 name: "I64Load16U",
39108 auxType: auxInt64,
39109 argLen: 2,
39110 asm: wasm.AI64Load16U,
39111 reg: regInfo{
39112 inputs: []inputInfo{
39113 {0, 1407374883618815},
39114 },
39115 outputs: []outputInfo{
39116 {0, 65535},
39117 },
39118 },
39119 },
39120 {
39121 name: "I64Load16S",
39122 auxType: auxInt64,
39123 argLen: 2,
39124 asm: wasm.AI64Load16S,
39125 reg: regInfo{
39126 inputs: []inputInfo{
39127 {0, 1407374883618815},
39128 },
39129 outputs: []outputInfo{
39130 {0, 65535},
39131 },
39132 },
39133 },
39134 {
39135 name: "I64Load32U",
39136 auxType: auxInt64,
39137 argLen: 2,
39138 asm: wasm.AI64Load32U,
39139 reg: regInfo{
39140 inputs: []inputInfo{
39141 {0, 1407374883618815},
39142 },
39143 outputs: []outputInfo{
39144 {0, 65535},
39145 },
39146 },
39147 },
39148 {
39149 name: "I64Load32S",
39150 auxType: auxInt64,
39151 argLen: 2,
39152 asm: wasm.AI64Load32S,
39153 reg: regInfo{
39154 inputs: []inputInfo{
39155 {0, 1407374883618815},
39156 },
39157 outputs: []outputInfo{
39158 {0, 65535},
39159 },
39160 },
39161 },
39162 {
39163 name: "I64Load",
39164 auxType: auxInt64,
39165 argLen: 2,
39166 asm: wasm.AI64Load,
39167 reg: regInfo{
39168 inputs: []inputInfo{
39169 {0, 1407374883618815},
39170 },
39171 outputs: []outputInfo{
39172 {0, 65535},
39173 },
39174 },
39175 },
39176 {
39177 name: "I64Store8",
39178 auxType: auxInt64,
39179 argLen: 3,
39180 asm: wasm.AI64Store8,
39181 reg: regInfo{
39182 inputs: []inputInfo{
39183 {1, 281474976776191},
39184 {0, 1407374883618815},
39185 },
39186 },
39187 },
39188 {
39189 name: "I64Store16",
39190 auxType: auxInt64,
39191 argLen: 3,
39192 asm: wasm.AI64Store16,
39193 reg: regInfo{
39194 inputs: []inputInfo{
39195 {1, 281474976776191},
39196 {0, 1407374883618815},
39197 },
39198 },
39199 },
39200 {
39201 name: "I64Store32",
39202 auxType: auxInt64,
39203 argLen: 3,
39204 asm: wasm.AI64Store32,
39205 reg: regInfo{
39206 inputs: []inputInfo{
39207 {1, 281474976776191},
39208 {0, 1407374883618815},
39209 },
39210 },
39211 },
39212 {
39213 name: "I64Store",
39214 auxType: auxInt64,
39215 argLen: 3,
39216 asm: wasm.AI64Store,
39217 reg: regInfo{
39218 inputs: []inputInfo{
39219 {1, 281474976776191},
39220 {0, 1407374883618815},
39221 },
39222 },
39223 },
39224 {
39225 name: "F32Load",
39226 auxType: auxInt64,
39227 argLen: 2,
39228 asm: wasm.AF32Load,
39229 reg: regInfo{
39230 inputs: []inputInfo{
39231 {0, 1407374883618815},
39232 },
39233 outputs: []outputInfo{
39234 {0, 4294901760},
39235 },
39236 },
39237 },
39238 {
39239 name: "F64Load",
39240 auxType: auxInt64,
39241 argLen: 2,
39242 asm: wasm.AF64Load,
39243 reg: regInfo{
39244 inputs: []inputInfo{
39245 {0, 1407374883618815},
39246 },
39247 outputs: []outputInfo{
39248 {0, 281470681743360},
39249 },
39250 },
39251 },
39252 {
39253 name: "F32Store",
39254 auxType: auxInt64,
39255 argLen: 3,
39256 asm: wasm.AF32Store,
39257 reg: regInfo{
39258 inputs: []inputInfo{
39259 {1, 4294901760},
39260 {0, 1407374883618815},
39261 },
39262 },
39263 },
39264 {
39265 name: "F64Store",
39266 auxType: auxInt64,
39267 argLen: 3,
39268 asm: wasm.AF64Store,
39269 reg: regInfo{
39270 inputs: []inputInfo{
39271 {1, 281470681743360},
39272 {0, 1407374883618815},
39273 },
39274 },
39275 },
39276 {
39277 name: "I64Const",
39278 auxType: auxInt64,
39279 argLen: 0,
39280 rematerializeable: true,
39281 reg: regInfo{
39282 outputs: []outputInfo{
39283 {0, 65535},
39284 },
39285 },
39286 },
39287 {
39288 name: "F32Const",
39289 auxType: auxFloat32,
39290 argLen: 0,
39291 rematerializeable: true,
39292 reg: regInfo{
39293 outputs: []outputInfo{
39294 {0, 4294901760},
39295 },
39296 },
39297 },
39298 {
39299 name: "F64Const",
39300 auxType: auxFloat64,
39301 argLen: 0,
39302 rematerializeable: true,
39303 reg: regInfo{
39304 outputs: []outputInfo{
39305 {0, 281470681743360},
39306 },
39307 },
39308 },
39309 {
39310 name: "I64Eqz",
39311 argLen: 1,
39312 asm: wasm.AI64Eqz,
39313 reg: regInfo{
39314 inputs: []inputInfo{
39315 {0, 281474976776191},
39316 },
39317 outputs: []outputInfo{
39318 {0, 65535},
39319 },
39320 },
39321 },
39322 {
39323 name: "I64Eq",
39324 argLen: 2,
39325 asm: wasm.AI64Eq,
39326 reg: regInfo{
39327 inputs: []inputInfo{
39328 {0, 281474976776191},
39329 {1, 281474976776191},
39330 },
39331 outputs: []outputInfo{
39332 {0, 65535},
39333 },
39334 },
39335 },
39336 {
39337 name: "I64Ne",
39338 argLen: 2,
39339 asm: wasm.AI64Ne,
39340 reg: regInfo{
39341 inputs: []inputInfo{
39342 {0, 281474976776191},
39343 {1, 281474976776191},
39344 },
39345 outputs: []outputInfo{
39346 {0, 65535},
39347 },
39348 },
39349 },
39350 {
39351 name: "I64LtS",
39352 argLen: 2,
39353 asm: wasm.AI64LtS,
39354 reg: regInfo{
39355 inputs: []inputInfo{
39356 {0, 281474976776191},
39357 {1, 281474976776191},
39358 },
39359 outputs: []outputInfo{
39360 {0, 65535},
39361 },
39362 },
39363 },
39364 {
39365 name: "I64LtU",
39366 argLen: 2,
39367 asm: wasm.AI64LtU,
39368 reg: regInfo{
39369 inputs: []inputInfo{
39370 {0, 281474976776191},
39371 {1, 281474976776191},
39372 },
39373 outputs: []outputInfo{
39374 {0, 65535},
39375 },
39376 },
39377 },
39378 {
39379 name: "I64GtS",
39380 argLen: 2,
39381 asm: wasm.AI64GtS,
39382 reg: regInfo{
39383 inputs: []inputInfo{
39384 {0, 281474976776191},
39385 {1, 281474976776191},
39386 },
39387 outputs: []outputInfo{
39388 {0, 65535},
39389 },
39390 },
39391 },
39392 {
39393 name: "I64GtU",
39394 argLen: 2,
39395 asm: wasm.AI64GtU,
39396 reg: regInfo{
39397 inputs: []inputInfo{
39398 {0, 281474976776191},
39399 {1, 281474976776191},
39400 },
39401 outputs: []outputInfo{
39402 {0, 65535},
39403 },
39404 },
39405 },
39406 {
39407 name: "I64LeS",
39408 argLen: 2,
39409 asm: wasm.AI64LeS,
39410 reg: regInfo{
39411 inputs: []inputInfo{
39412 {0, 281474976776191},
39413 {1, 281474976776191},
39414 },
39415 outputs: []outputInfo{
39416 {0, 65535},
39417 },
39418 },
39419 },
39420 {
39421 name: "I64LeU",
39422 argLen: 2,
39423 asm: wasm.AI64LeU,
39424 reg: regInfo{
39425 inputs: []inputInfo{
39426 {0, 281474976776191},
39427 {1, 281474976776191},
39428 },
39429 outputs: []outputInfo{
39430 {0, 65535},
39431 },
39432 },
39433 },
39434 {
39435 name: "I64GeS",
39436 argLen: 2,
39437 asm: wasm.AI64GeS,
39438 reg: regInfo{
39439 inputs: []inputInfo{
39440 {0, 281474976776191},
39441 {1, 281474976776191},
39442 },
39443 outputs: []outputInfo{
39444 {0, 65535},
39445 },
39446 },
39447 },
39448 {
39449 name: "I64GeU",
39450 argLen: 2,
39451 asm: wasm.AI64GeU,
39452 reg: regInfo{
39453 inputs: []inputInfo{
39454 {0, 281474976776191},
39455 {1, 281474976776191},
39456 },
39457 outputs: []outputInfo{
39458 {0, 65535},
39459 },
39460 },
39461 },
39462 {
39463 name: "F32Eq",
39464 argLen: 2,
39465 asm: wasm.AF32Eq,
39466 reg: regInfo{
39467 inputs: []inputInfo{
39468 {0, 4294901760},
39469 {1, 4294901760},
39470 },
39471 outputs: []outputInfo{
39472 {0, 65535},
39473 },
39474 },
39475 },
39476 {
39477 name: "F32Ne",
39478 argLen: 2,
39479 asm: wasm.AF32Ne,
39480 reg: regInfo{
39481 inputs: []inputInfo{
39482 {0, 4294901760},
39483 {1, 4294901760},
39484 },
39485 outputs: []outputInfo{
39486 {0, 65535},
39487 },
39488 },
39489 },
39490 {
39491 name: "F32Lt",
39492 argLen: 2,
39493 asm: wasm.AF32Lt,
39494 reg: regInfo{
39495 inputs: []inputInfo{
39496 {0, 4294901760},
39497 {1, 4294901760},
39498 },
39499 outputs: []outputInfo{
39500 {0, 65535},
39501 },
39502 },
39503 },
39504 {
39505 name: "F32Gt",
39506 argLen: 2,
39507 asm: wasm.AF32Gt,
39508 reg: regInfo{
39509 inputs: []inputInfo{
39510 {0, 4294901760},
39511 {1, 4294901760},
39512 },
39513 outputs: []outputInfo{
39514 {0, 65535},
39515 },
39516 },
39517 },
39518 {
39519 name: "F32Le",
39520 argLen: 2,
39521 asm: wasm.AF32Le,
39522 reg: regInfo{
39523 inputs: []inputInfo{
39524 {0, 4294901760},
39525 {1, 4294901760},
39526 },
39527 outputs: []outputInfo{
39528 {0, 65535},
39529 },
39530 },
39531 },
39532 {
39533 name: "F32Ge",
39534 argLen: 2,
39535 asm: wasm.AF32Ge,
39536 reg: regInfo{
39537 inputs: []inputInfo{
39538 {0, 4294901760},
39539 {1, 4294901760},
39540 },
39541 outputs: []outputInfo{
39542 {0, 65535},
39543 },
39544 },
39545 },
39546 {
39547 name: "F64Eq",
39548 argLen: 2,
39549 asm: wasm.AF64Eq,
39550 reg: regInfo{
39551 inputs: []inputInfo{
39552 {0, 281470681743360},
39553 {1, 281470681743360},
39554 },
39555 outputs: []outputInfo{
39556 {0, 65535},
39557 },
39558 },
39559 },
39560 {
39561 name: "F64Ne",
39562 argLen: 2,
39563 asm: wasm.AF64Ne,
39564 reg: regInfo{
39565 inputs: []inputInfo{
39566 {0, 281470681743360},
39567 {1, 281470681743360},
39568 },
39569 outputs: []outputInfo{
39570 {0, 65535},
39571 },
39572 },
39573 },
39574 {
39575 name: "F64Lt",
39576 argLen: 2,
39577 asm: wasm.AF64Lt,
39578 reg: regInfo{
39579 inputs: []inputInfo{
39580 {0, 281470681743360},
39581 {1, 281470681743360},
39582 },
39583 outputs: []outputInfo{
39584 {0, 65535},
39585 },
39586 },
39587 },
39588 {
39589 name: "F64Gt",
39590 argLen: 2,
39591 asm: wasm.AF64Gt,
39592 reg: regInfo{
39593 inputs: []inputInfo{
39594 {0, 281470681743360},
39595 {1, 281470681743360},
39596 },
39597 outputs: []outputInfo{
39598 {0, 65535},
39599 },
39600 },
39601 },
39602 {
39603 name: "F64Le",
39604 argLen: 2,
39605 asm: wasm.AF64Le,
39606 reg: regInfo{
39607 inputs: []inputInfo{
39608 {0, 281470681743360},
39609 {1, 281470681743360},
39610 },
39611 outputs: []outputInfo{
39612 {0, 65535},
39613 },
39614 },
39615 },
39616 {
39617 name: "F64Ge",
39618 argLen: 2,
39619 asm: wasm.AF64Ge,
39620 reg: regInfo{
39621 inputs: []inputInfo{
39622 {0, 281470681743360},
39623 {1, 281470681743360},
39624 },
39625 outputs: []outputInfo{
39626 {0, 65535},
39627 },
39628 },
39629 },
39630 {
39631 name: "I64Add",
39632 argLen: 2,
39633 asm: wasm.AI64Add,
39634 reg: regInfo{
39635 inputs: []inputInfo{
39636 {0, 281474976776191},
39637 {1, 281474976776191},
39638 },
39639 outputs: []outputInfo{
39640 {0, 65535},
39641 },
39642 },
39643 },
39644 {
39645 name: "I64AddConst",
39646 auxType: auxInt64,
39647 argLen: 1,
39648 asm: wasm.AI64Add,
39649 reg: regInfo{
39650 inputs: []inputInfo{
39651 {0, 281474976776191},
39652 },
39653 outputs: []outputInfo{
39654 {0, 65535},
39655 },
39656 },
39657 },
39658 {
39659 name: "I64Sub",
39660 argLen: 2,
39661 asm: wasm.AI64Sub,
39662 reg: regInfo{
39663 inputs: []inputInfo{
39664 {0, 281474976776191},
39665 {1, 281474976776191},
39666 },
39667 outputs: []outputInfo{
39668 {0, 65535},
39669 },
39670 },
39671 },
39672 {
39673 name: "I64Mul",
39674 argLen: 2,
39675 asm: wasm.AI64Mul,
39676 reg: regInfo{
39677 inputs: []inputInfo{
39678 {0, 281474976776191},
39679 {1, 281474976776191},
39680 },
39681 outputs: []outputInfo{
39682 {0, 65535},
39683 },
39684 },
39685 },
39686 {
39687 name: "I64DivS",
39688 argLen: 2,
39689 asm: wasm.AI64DivS,
39690 reg: regInfo{
39691 inputs: []inputInfo{
39692 {0, 281474976776191},
39693 {1, 281474976776191},
39694 },
39695 outputs: []outputInfo{
39696 {0, 65535},
39697 },
39698 },
39699 },
39700 {
39701 name: "I64DivU",
39702 argLen: 2,
39703 asm: wasm.AI64DivU,
39704 reg: regInfo{
39705 inputs: []inputInfo{
39706 {0, 281474976776191},
39707 {1, 281474976776191},
39708 },
39709 outputs: []outputInfo{
39710 {0, 65535},
39711 },
39712 },
39713 },
39714 {
39715 name: "I64RemS",
39716 argLen: 2,
39717 asm: wasm.AI64RemS,
39718 reg: regInfo{
39719 inputs: []inputInfo{
39720 {0, 281474976776191},
39721 {1, 281474976776191},
39722 },
39723 outputs: []outputInfo{
39724 {0, 65535},
39725 },
39726 },
39727 },
39728 {
39729 name: "I64RemU",
39730 argLen: 2,
39731 asm: wasm.AI64RemU,
39732 reg: regInfo{
39733 inputs: []inputInfo{
39734 {0, 281474976776191},
39735 {1, 281474976776191},
39736 },
39737 outputs: []outputInfo{
39738 {0, 65535},
39739 },
39740 },
39741 },
39742 {
39743 name: "I64And",
39744 argLen: 2,
39745 asm: wasm.AI64And,
39746 reg: regInfo{
39747 inputs: []inputInfo{
39748 {0, 281474976776191},
39749 {1, 281474976776191},
39750 },
39751 outputs: []outputInfo{
39752 {0, 65535},
39753 },
39754 },
39755 },
39756 {
39757 name: "I64Or",
39758 argLen: 2,
39759 asm: wasm.AI64Or,
39760 reg: regInfo{
39761 inputs: []inputInfo{
39762 {0, 281474976776191},
39763 {1, 281474976776191},
39764 },
39765 outputs: []outputInfo{
39766 {0, 65535},
39767 },
39768 },
39769 },
39770 {
39771 name: "I64Xor",
39772 argLen: 2,
39773 asm: wasm.AI64Xor,
39774 reg: regInfo{
39775 inputs: []inputInfo{
39776 {0, 281474976776191},
39777 {1, 281474976776191},
39778 },
39779 outputs: []outputInfo{
39780 {0, 65535},
39781 },
39782 },
39783 },
39784 {
39785 name: "I64Shl",
39786 argLen: 2,
39787 asm: wasm.AI64Shl,
39788 reg: regInfo{
39789 inputs: []inputInfo{
39790 {0, 281474976776191},
39791 {1, 281474976776191},
39792 },
39793 outputs: []outputInfo{
39794 {0, 65535},
39795 },
39796 },
39797 },
39798 {
39799 name: "I64ShrS",
39800 argLen: 2,
39801 asm: wasm.AI64ShrS,
39802 reg: regInfo{
39803 inputs: []inputInfo{
39804 {0, 281474976776191},
39805 {1, 281474976776191},
39806 },
39807 outputs: []outputInfo{
39808 {0, 65535},
39809 },
39810 },
39811 },
39812 {
39813 name: "I64ShrU",
39814 argLen: 2,
39815 asm: wasm.AI64ShrU,
39816 reg: regInfo{
39817 inputs: []inputInfo{
39818 {0, 281474976776191},
39819 {1, 281474976776191},
39820 },
39821 outputs: []outputInfo{
39822 {0, 65535},
39823 },
39824 },
39825 },
39826 {
39827 name: "F32Neg",
39828 argLen: 1,
39829 asm: wasm.AF32Neg,
39830 reg: regInfo{
39831 inputs: []inputInfo{
39832 {0, 4294901760},
39833 },
39834 outputs: []outputInfo{
39835 {0, 4294901760},
39836 },
39837 },
39838 },
39839 {
39840 name: "F32Add",
39841 argLen: 2,
39842 asm: wasm.AF32Add,
39843 reg: regInfo{
39844 inputs: []inputInfo{
39845 {0, 4294901760},
39846 {1, 4294901760},
39847 },
39848 outputs: []outputInfo{
39849 {0, 4294901760},
39850 },
39851 },
39852 },
39853 {
39854 name: "F32Sub",
39855 argLen: 2,
39856 asm: wasm.AF32Sub,
39857 reg: regInfo{
39858 inputs: []inputInfo{
39859 {0, 4294901760},
39860 {1, 4294901760},
39861 },
39862 outputs: []outputInfo{
39863 {0, 4294901760},
39864 },
39865 },
39866 },
39867 {
39868 name: "F32Mul",
39869 argLen: 2,
39870 asm: wasm.AF32Mul,
39871 reg: regInfo{
39872 inputs: []inputInfo{
39873 {0, 4294901760},
39874 {1, 4294901760},
39875 },
39876 outputs: []outputInfo{
39877 {0, 4294901760},
39878 },
39879 },
39880 },
39881 {
39882 name: "F32Div",
39883 argLen: 2,
39884 asm: wasm.AF32Div,
39885 reg: regInfo{
39886 inputs: []inputInfo{
39887 {0, 4294901760},
39888 {1, 4294901760},
39889 },
39890 outputs: []outputInfo{
39891 {0, 4294901760},
39892 },
39893 },
39894 },
39895 {
39896 name: "F64Neg",
39897 argLen: 1,
39898 asm: wasm.AF64Neg,
39899 reg: regInfo{
39900 inputs: []inputInfo{
39901 {0, 281470681743360},
39902 },
39903 outputs: []outputInfo{
39904 {0, 281470681743360},
39905 },
39906 },
39907 },
39908 {
39909 name: "F64Add",
39910 argLen: 2,
39911 asm: wasm.AF64Add,
39912 reg: regInfo{
39913 inputs: []inputInfo{
39914 {0, 281470681743360},
39915 {1, 281470681743360},
39916 },
39917 outputs: []outputInfo{
39918 {0, 281470681743360},
39919 },
39920 },
39921 },
39922 {
39923 name: "F64Sub",
39924 argLen: 2,
39925 asm: wasm.AF64Sub,
39926 reg: regInfo{
39927 inputs: []inputInfo{
39928 {0, 281470681743360},
39929 {1, 281470681743360},
39930 },
39931 outputs: []outputInfo{
39932 {0, 281470681743360},
39933 },
39934 },
39935 },
39936 {
39937 name: "F64Mul",
39938 argLen: 2,
39939 asm: wasm.AF64Mul,
39940 reg: regInfo{
39941 inputs: []inputInfo{
39942 {0, 281470681743360},
39943 {1, 281470681743360},
39944 },
39945 outputs: []outputInfo{
39946 {0, 281470681743360},
39947 },
39948 },
39949 },
39950 {
39951 name: "F64Div",
39952 argLen: 2,
39953 asm: wasm.AF64Div,
39954 reg: regInfo{
39955 inputs: []inputInfo{
39956 {0, 281470681743360},
39957 {1, 281470681743360},
39958 },
39959 outputs: []outputInfo{
39960 {0, 281470681743360},
39961 },
39962 },
39963 },
39964 {
39965 name: "I64TruncSatF64S",
39966 argLen: 1,
39967 asm: wasm.AI64TruncSatF64S,
39968 reg: regInfo{
39969 inputs: []inputInfo{
39970 {0, 281470681743360},
39971 },
39972 outputs: []outputInfo{
39973 {0, 65535},
39974 },
39975 },
39976 },
39977 {
39978 name: "I64TruncSatF64U",
39979 argLen: 1,
39980 asm: wasm.AI64TruncSatF64U,
39981 reg: regInfo{
39982 inputs: []inputInfo{
39983 {0, 281470681743360},
39984 },
39985 outputs: []outputInfo{
39986 {0, 65535},
39987 },
39988 },
39989 },
39990 {
39991 name: "I64TruncSatF32S",
39992 argLen: 1,
39993 asm: wasm.AI64TruncSatF32S,
39994 reg: regInfo{
39995 inputs: []inputInfo{
39996 {0, 4294901760},
39997 },
39998 outputs: []outputInfo{
39999 {0, 65535},
40000 },
40001 },
40002 },
40003 {
40004 name: "I64TruncSatF32U",
40005 argLen: 1,
40006 asm: wasm.AI64TruncSatF32U,
40007 reg: regInfo{
40008 inputs: []inputInfo{
40009 {0, 4294901760},
40010 },
40011 outputs: []outputInfo{
40012 {0, 65535},
40013 },
40014 },
40015 },
40016 {
40017 name: "F32ConvertI64S",
40018 argLen: 1,
40019 asm: wasm.AF32ConvertI64S,
40020 reg: regInfo{
40021 inputs: []inputInfo{
40022 {0, 65535},
40023 },
40024 outputs: []outputInfo{
40025 {0, 4294901760},
40026 },
40027 },
40028 },
40029 {
40030 name: "F32ConvertI64U",
40031 argLen: 1,
40032 asm: wasm.AF32ConvertI64U,
40033 reg: regInfo{
40034 inputs: []inputInfo{
40035 {0, 65535},
40036 },
40037 outputs: []outputInfo{
40038 {0, 4294901760},
40039 },
40040 },
40041 },
40042 {
40043 name: "F64ConvertI64S",
40044 argLen: 1,
40045 asm: wasm.AF64ConvertI64S,
40046 reg: regInfo{
40047 inputs: []inputInfo{
40048 {0, 65535},
40049 },
40050 outputs: []outputInfo{
40051 {0, 281470681743360},
40052 },
40053 },
40054 },
40055 {
40056 name: "F64ConvertI64U",
40057 argLen: 1,
40058 asm: wasm.AF64ConvertI64U,
40059 reg: regInfo{
40060 inputs: []inputInfo{
40061 {0, 65535},
40062 },
40063 outputs: []outputInfo{
40064 {0, 281470681743360},
40065 },
40066 },
40067 },
40068 {
40069 name: "F32DemoteF64",
40070 argLen: 1,
40071 asm: wasm.AF32DemoteF64,
40072 reg: regInfo{
40073 inputs: []inputInfo{
40074 {0, 281470681743360},
40075 },
40076 outputs: []outputInfo{
40077 {0, 4294901760},
40078 },
40079 },
40080 },
40081 {
40082 name: "F64PromoteF32",
40083 argLen: 1,
40084 asm: wasm.AF64PromoteF32,
40085 reg: regInfo{
40086 inputs: []inputInfo{
40087 {0, 4294901760},
40088 },
40089 outputs: []outputInfo{
40090 {0, 281470681743360},
40091 },
40092 },
40093 },
40094 {
40095 name: "I64Extend8S",
40096 argLen: 1,
40097 asm: wasm.AI64Extend8S,
40098 reg: regInfo{
40099 inputs: []inputInfo{
40100 {0, 281474976776191},
40101 },
40102 outputs: []outputInfo{
40103 {0, 65535},
40104 },
40105 },
40106 },
40107 {
40108 name: "I64Extend16S",
40109 argLen: 1,
40110 asm: wasm.AI64Extend16S,
40111 reg: regInfo{
40112 inputs: []inputInfo{
40113 {0, 281474976776191},
40114 },
40115 outputs: []outputInfo{
40116 {0, 65535},
40117 },
40118 },
40119 },
40120 {
40121 name: "I64Extend32S",
40122 argLen: 1,
40123 asm: wasm.AI64Extend32S,
40124 reg: regInfo{
40125 inputs: []inputInfo{
40126 {0, 281474976776191},
40127 },
40128 outputs: []outputInfo{
40129 {0, 65535},
40130 },
40131 },
40132 },
40133 {
40134 name: "F32Sqrt",
40135 argLen: 1,
40136 asm: wasm.AF32Sqrt,
40137 reg: regInfo{
40138 inputs: []inputInfo{
40139 {0, 4294901760},
40140 },
40141 outputs: []outputInfo{
40142 {0, 4294901760},
40143 },
40144 },
40145 },
40146 {
40147 name: "F32Trunc",
40148 argLen: 1,
40149 asm: wasm.AF32Trunc,
40150 reg: regInfo{
40151 inputs: []inputInfo{
40152 {0, 4294901760},
40153 },
40154 outputs: []outputInfo{
40155 {0, 4294901760},
40156 },
40157 },
40158 },
40159 {
40160 name: "F32Ceil",
40161 argLen: 1,
40162 asm: wasm.AF32Ceil,
40163 reg: regInfo{
40164 inputs: []inputInfo{
40165 {0, 4294901760},
40166 },
40167 outputs: []outputInfo{
40168 {0, 4294901760},
40169 },
40170 },
40171 },
40172 {
40173 name: "F32Floor",
40174 argLen: 1,
40175 asm: wasm.AF32Floor,
40176 reg: regInfo{
40177 inputs: []inputInfo{
40178 {0, 4294901760},
40179 },
40180 outputs: []outputInfo{
40181 {0, 4294901760},
40182 },
40183 },
40184 },
40185 {
40186 name: "F32Nearest",
40187 argLen: 1,
40188 asm: wasm.AF32Nearest,
40189 reg: regInfo{
40190 inputs: []inputInfo{
40191 {0, 4294901760},
40192 },
40193 outputs: []outputInfo{
40194 {0, 4294901760},
40195 },
40196 },
40197 },
40198 {
40199 name: "F32Abs",
40200 argLen: 1,
40201 asm: wasm.AF32Abs,
40202 reg: regInfo{
40203 inputs: []inputInfo{
40204 {0, 4294901760},
40205 },
40206 outputs: []outputInfo{
40207 {0, 4294901760},
40208 },
40209 },
40210 },
40211 {
40212 name: "F32Copysign",
40213 argLen: 2,
40214 asm: wasm.AF32Copysign,
40215 reg: regInfo{
40216 inputs: []inputInfo{
40217 {0, 4294901760},
40218 {1, 4294901760},
40219 },
40220 outputs: []outputInfo{
40221 {0, 4294901760},
40222 },
40223 },
40224 },
40225 {
40226 name: "F64Sqrt",
40227 argLen: 1,
40228 asm: wasm.AF64Sqrt,
40229 reg: regInfo{
40230 inputs: []inputInfo{
40231 {0, 281470681743360},
40232 },
40233 outputs: []outputInfo{
40234 {0, 281470681743360},
40235 },
40236 },
40237 },
40238 {
40239 name: "F64Trunc",
40240 argLen: 1,
40241 asm: wasm.AF64Trunc,
40242 reg: regInfo{
40243 inputs: []inputInfo{
40244 {0, 281470681743360},
40245 },
40246 outputs: []outputInfo{
40247 {0, 281470681743360},
40248 },
40249 },
40250 },
40251 {
40252 name: "F64Ceil",
40253 argLen: 1,
40254 asm: wasm.AF64Ceil,
40255 reg: regInfo{
40256 inputs: []inputInfo{
40257 {0, 281470681743360},
40258 },
40259 outputs: []outputInfo{
40260 {0, 281470681743360},
40261 },
40262 },
40263 },
40264 {
40265 name: "F64Floor",
40266 argLen: 1,
40267 asm: wasm.AF64Floor,
40268 reg: regInfo{
40269 inputs: []inputInfo{
40270 {0, 281470681743360},
40271 },
40272 outputs: []outputInfo{
40273 {0, 281470681743360},
40274 },
40275 },
40276 },
40277 {
40278 name: "F64Nearest",
40279 argLen: 1,
40280 asm: wasm.AF64Nearest,
40281 reg: regInfo{
40282 inputs: []inputInfo{
40283 {0, 281470681743360},
40284 },
40285 outputs: []outputInfo{
40286 {0, 281470681743360},
40287 },
40288 },
40289 },
40290 {
40291 name: "F64Abs",
40292 argLen: 1,
40293 asm: wasm.AF64Abs,
40294 reg: regInfo{
40295 inputs: []inputInfo{
40296 {0, 281470681743360},
40297 },
40298 outputs: []outputInfo{
40299 {0, 281470681743360},
40300 },
40301 },
40302 },
40303 {
40304 name: "F64Copysign",
40305 argLen: 2,
40306 asm: wasm.AF64Copysign,
40307 reg: regInfo{
40308 inputs: []inputInfo{
40309 {0, 281470681743360},
40310 {1, 281470681743360},
40311 },
40312 outputs: []outputInfo{
40313 {0, 281470681743360},
40314 },
40315 },
40316 },
40317 {
40318 name: "I64Ctz",
40319 argLen: 1,
40320 asm: wasm.AI64Ctz,
40321 reg: regInfo{
40322 inputs: []inputInfo{
40323 {0, 281474976776191},
40324 },
40325 outputs: []outputInfo{
40326 {0, 65535},
40327 },
40328 },
40329 },
40330 {
40331 name: "I64Clz",
40332 argLen: 1,
40333 asm: wasm.AI64Clz,
40334 reg: regInfo{
40335 inputs: []inputInfo{
40336 {0, 281474976776191},
40337 },
40338 outputs: []outputInfo{
40339 {0, 65535},
40340 },
40341 },
40342 },
40343 {
40344 name: "I32Rotl",
40345 argLen: 2,
40346 asm: wasm.AI32Rotl,
40347 reg: regInfo{
40348 inputs: []inputInfo{
40349 {0, 281474976776191},
40350 {1, 281474976776191},
40351 },
40352 outputs: []outputInfo{
40353 {0, 65535},
40354 },
40355 },
40356 },
40357 {
40358 name: "I64Rotl",
40359 argLen: 2,
40360 asm: wasm.AI64Rotl,
40361 reg: regInfo{
40362 inputs: []inputInfo{
40363 {0, 281474976776191},
40364 {1, 281474976776191},
40365 },
40366 outputs: []outputInfo{
40367 {0, 65535},
40368 },
40369 },
40370 },
40371 {
40372 name: "I64Popcnt",
40373 argLen: 1,
40374 asm: wasm.AI64Popcnt,
40375 reg: regInfo{
40376 inputs: []inputInfo{
40377 {0, 281474976776191},
40378 },
40379 outputs: []outputInfo{
40380 {0, 65535},
40381 },
40382 },
40383 },
40384
40385 {
40386 name: "Add8",
40387 argLen: 2,
40388 commutative: true,
40389 generic: true,
40390 },
40391 {
40392 name: "Add16",
40393 argLen: 2,
40394 commutative: true,
40395 generic: true,
40396 },
40397 {
40398 name: "Add32",
40399 argLen: 2,
40400 commutative: true,
40401 generic: true,
40402 },
40403 {
40404 name: "Add64",
40405 argLen: 2,
40406 commutative: true,
40407 generic: true,
40408 },
40409 {
40410 name: "AddPtr",
40411 argLen: 2,
40412 generic: true,
40413 },
40414 {
40415 name: "Add32F",
40416 argLen: 2,
40417 commutative: true,
40418 generic: true,
40419 },
40420 {
40421 name: "Add64F",
40422 argLen: 2,
40423 commutative: true,
40424 generic: true,
40425 },
40426 {
40427 name: "Sub8",
40428 argLen: 2,
40429 generic: true,
40430 },
40431 {
40432 name: "Sub16",
40433 argLen: 2,
40434 generic: true,
40435 },
40436 {
40437 name: "Sub32",
40438 argLen: 2,
40439 generic: true,
40440 },
40441 {
40442 name: "Sub64",
40443 argLen: 2,
40444 generic: true,
40445 },
40446 {
40447 name: "SubPtr",
40448 argLen: 2,
40449 generic: true,
40450 },
40451 {
40452 name: "Sub32F",
40453 argLen: 2,
40454 generic: true,
40455 },
40456 {
40457 name: "Sub64F",
40458 argLen: 2,
40459 generic: true,
40460 },
40461 {
40462 name: "Mul8",
40463 argLen: 2,
40464 commutative: true,
40465 generic: true,
40466 },
40467 {
40468 name: "Mul16",
40469 argLen: 2,
40470 commutative: true,
40471 generic: true,
40472 },
40473 {
40474 name: "Mul32",
40475 argLen: 2,
40476 commutative: true,
40477 generic: true,
40478 },
40479 {
40480 name: "Mul64",
40481 argLen: 2,
40482 commutative: true,
40483 generic: true,
40484 },
40485 {
40486 name: "Mul32F",
40487 argLen: 2,
40488 commutative: true,
40489 generic: true,
40490 },
40491 {
40492 name: "Mul64F",
40493 argLen: 2,
40494 commutative: true,
40495 generic: true,
40496 },
40497 {
40498 name: "Div32F",
40499 argLen: 2,
40500 generic: true,
40501 },
40502 {
40503 name: "Div64F",
40504 argLen: 2,
40505 generic: true,
40506 },
40507 {
40508 name: "Hmul32",
40509 argLen: 2,
40510 commutative: true,
40511 generic: true,
40512 },
40513 {
40514 name: "Hmul32u",
40515 argLen: 2,
40516 commutative: true,
40517 generic: true,
40518 },
40519 {
40520 name: "Hmul64",
40521 argLen: 2,
40522 commutative: true,
40523 generic: true,
40524 },
40525 {
40526 name: "Hmul64u",
40527 argLen: 2,
40528 commutative: true,
40529 generic: true,
40530 },
40531 {
40532 name: "Mul32uhilo",
40533 argLen: 2,
40534 commutative: true,
40535 generic: true,
40536 },
40537 {
40538 name: "Mul64uhilo",
40539 argLen: 2,
40540 commutative: true,
40541 generic: true,
40542 },
40543 {
40544 name: "Mul32uover",
40545 argLen: 2,
40546 commutative: true,
40547 generic: true,
40548 },
40549 {
40550 name: "Mul64uover",
40551 argLen: 2,
40552 commutative: true,
40553 generic: true,
40554 },
40555 {
40556 name: "Avg32u",
40557 argLen: 2,
40558 generic: true,
40559 },
40560 {
40561 name: "Avg64u",
40562 argLen: 2,
40563 generic: true,
40564 },
40565 {
40566 name: "Div8",
40567 argLen: 2,
40568 generic: true,
40569 },
40570 {
40571 name: "Div8u",
40572 argLen: 2,
40573 generic: true,
40574 },
40575 {
40576 name: "Div16",
40577 auxType: auxBool,
40578 argLen: 2,
40579 generic: true,
40580 },
40581 {
40582 name: "Div16u",
40583 argLen: 2,
40584 generic: true,
40585 },
40586 {
40587 name: "Div32",
40588 auxType: auxBool,
40589 argLen: 2,
40590 generic: true,
40591 },
40592 {
40593 name: "Div32u",
40594 argLen: 2,
40595 generic: true,
40596 },
40597 {
40598 name: "Div64",
40599 auxType: auxBool,
40600 argLen: 2,
40601 generic: true,
40602 },
40603 {
40604 name: "Div64u",
40605 argLen: 2,
40606 generic: true,
40607 },
40608 {
40609 name: "Div128u",
40610 argLen: 3,
40611 generic: true,
40612 },
40613 {
40614 name: "Mod8",
40615 argLen: 2,
40616 generic: true,
40617 },
40618 {
40619 name: "Mod8u",
40620 argLen: 2,
40621 generic: true,
40622 },
40623 {
40624 name: "Mod16",
40625 auxType: auxBool,
40626 argLen: 2,
40627 generic: true,
40628 },
40629 {
40630 name: "Mod16u",
40631 argLen: 2,
40632 generic: true,
40633 },
40634 {
40635 name: "Mod32",
40636 auxType: auxBool,
40637 argLen: 2,
40638 generic: true,
40639 },
40640 {
40641 name: "Mod32u",
40642 argLen: 2,
40643 generic: true,
40644 },
40645 {
40646 name: "Mod64",
40647 auxType: auxBool,
40648 argLen: 2,
40649 generic: true,
40650 },
40651 {
40652 name: "Mod64u",
40653 argLen: 2,
40654 generic: true,
40655 },
40656 {
40657 name: "And8",
40658 argLen: 2,
40659 commutative: true,
40660 generic: true,
40661 },
40662 {
40663 name: "And16",
40664 argLen: 2,
40665 commutative: true,
40666 generic: true,
40667 },
40668 {
40669 name: "And32",
40670 argLen: 2,
40671 commutative: true,
40672 generic: true,
40673 },
40674 {
40675 name: "And64",
40676 argLen: 2,
40677 commutative: true,
40678 generic: true,
40679 },
40680 {
40681 name: "Or8",
40682 argLen: 2,
40683 commutative: true,
40684 generic: true,
40685 },
40686 {
40687 name: "Or16",
40688 argLen: 2,
40689 commutative: true,
40690 generic: true,
40691 },
40692 {
40693 name: "Or32",
40694 argLen: 2,
40695 commutative: true,
40696 generic: true,
40697 },
40698 {
40699 name: "Or64",
40700 argLen: 2,
40701 commutative: true,
40702 generic: true,
40703 },
40704 {
40705 name: "Xor8",
40706 argLen: 2,
40707 commutative: true,
40708 generic: true,
40709 },
40710 {
40711 name: "Xor16",
40712 argLen: 2,
40713 commutative: true,
40714 generic: true,
40715 },
40716 {
40717 name: "Xor32",
40718 argLen: 2,
40719 commutative: true,
40720 generic: true,
40721 },
40722 {
40723 name: "Xor64",
40724 argLen: 2,
40725 commutative: true,
40726 generic: true,
40727 },
40728 {
40729 name: "Lsh8x8",
40730 auxType: auxBool,
40731 argLen: 2,
40732 generic: true,
40733 },
40734 {
40735 name: "Lsh8x16",
40736 auxType: auxBool,
40737 argLen: 2,
40738 generic: true,
40739 },
40740 {
40741 name: "Lsh8x32",
40742 auxType: auxBool,
40743 argLen: 2,
40744 generic: true,
40745 },
40746 {
40747 name: "Lsh8x64",
40748 auxType: auxBool,
40749 argLen: 2,
40750 generic: true,
40751 },
40752 {
40753 name: "Lsh16x8",
40754 auxType: auxBool,
40755 argLen: 2,
40756 generic: true,
40757 },
40758 {
40759 name: "Lsh16x16",
40760 auxType: auxBool,
40761 argLen: 2,
40762 generic: true,
40763 },
40764 {
40765 name: "Lsh16x32",
40766 auxType: auxBool,
40767 argLen: 2,
40768 generic: true,
40769 },
40770 {
40771 name: "Lsh16x64",
40772 auxType: auxBool,
40773 argLen: 2,
40774 generic: true,
40775 },
40776 {
40777 name: "Lsh32x8",
40778 auxType: auxBool,
40779 argLen: 2,
40780 generic: true,
40781 },
40782 {
40783 name: "Lsh32x16",
40784 auxType: auxBool,
40785 argLen: 2,
40786 generic: true,
40787 },
40788 {
40789 name: "Lsh32x32",
40790 auxType: auxBool,
40791 argLen: 2,
40792 generic: true,
40793 },
40794 {
40795 name: "Lsh32x64",
40796 auxType: auxBool,
40797 argLen: 2,
40798 generic: true,
40799 },
40800 {
40801 name: "Lsh64x8",
40802 auxType: auxBool,
40803 argLen: 2,
40804 generic: true,
40805 },
40806 {
40807 name: "Lsh64x16",
40808 auxType: auxBool,
40809 argLen: 2,
40810 generic: true,
40811 },
40812 {
40813 name: "Lsh64x32",
40814 auxType: auxBool,
40815 argLen: 2,
40816 generic: true,
40817 },
40818 {
40819 name: "Lsh64x64",
40820 auxType: auxBool,
40821 argLen: 2,
40822 generic: true,
40823 },
40824 {
40825 name: "Rsh8x8",
40826 auxType: auxBool,
40827 argLen: 2,
40828 generic: true,
40829 },
40830 {
40831 name: "Rsh8x16",
40832 auxType: auxBool,
40833 argLen: 2,
40834 generic: true,
40835 },
40836 {
40837 name: "Rsh8x32",
40838 auxType: auxBool,
40839 argLen: 2,
40840 generic: true,
40841 },
40842 {
40843 name: "Rsh8x64",
40844 auxType: auxBool,
40845 argLen: 2,
40846 generic: true,
40847 },
40848 {
40849 name: "Rsh16x8",
40850 auxType: auxBool,
40851 argLen: 2,
40852 generic: true,
40853 },
40854 {
40855 name: "Rsh16x16",
40856 auxType: auxBool,
40857 argLen: 2,
40858 generic: true,
40859 },
40860 {
40861 name: "Rsh16x32",
40862 auxType: auxBool,
40863 argLen: 2,
40864 generic: true,
40865 },
40866 {
40867 name: "Rsh16x64",
40868 auxType: auxBool,
40869 argLen: 2,
40870 generic: true,
40871 },
40872 {
40873 name: "Rsh32x8",
40874 auxType: auxBool,
40875 argLen: 2,
40876 generic: true,
40877 },
40878 {
40879 name: "Rsh32x16",
40880 auxType: auxBool,
40881 argLen: 2,
40882 generic: true,
40883 },
40884 {
40885 name: "Rsh32x32",
40886 auxType: auxBool,
40887 argLen: 2,
40888 generic: true,
40889 },
40890 {
40891 name: "Rsh32x64",
40892 auxType: auxBool,
40893 argLen: 2,
40894 generic: true,
40895 },
40896 {
40897 name: "Rsh64x8",
40898 auxType: auxBool,
40899 argLen: 2,
40900 generic: true,
40901 },
40902 {
40903 name: "Rsh64x16",
40904 auxType: auxBool,
40905 argLen: 2,
40906 generic: true,
40907 },
40908 {
40909 name: "Rsh64x32",
40910 auxType: auxBool,
40911 argLen: 2,
40912 generic: true,
40913 },
40914 {
40915 name: "Rsh64x64",
40916 auxType: auxBool,
40917 argLen: 2,
40918 generic: true,
40919 },
40920 {
40921 name: "Rsh8Ux8",
40922 auxType: auxBool,
40923 argLen: 2,
40924 generic: true,
40925 },
40926 {
40927 name: "Rsh8Ux16",
40928 auxType: auxBool,
40929 argLen: 2,
40930 generic: true,
40931 },
40932 {
40933 name: "Rsh8Ux32",
40934 auxType: auxBool,
40935 argLen: 2,
40936 generic: true,
40937 },
40938 {
40939 name: "Rsh8Ux64",
40940 auxType: auxBool,
40941 argLen: 2,
40942 generic: true,
40943 },
40944 {
40945 name: "Rsh16Ux8",
40946 auxType: auxBool,
40947 argLen: 2,
40948 generic: true,
40949 },
40950 {
40951 name: "Rsh16Ux16",
40952 auxType: auxBool,
40953 argLen: 2,
40954 generic: true,
40955 },
40956 {
40957 name: "Rsh16Ux32",
40958 auxType: auxBool,
40959 argLen: 2,
40960 generic: true,
40961 },
40962 {
40963 name: "Rsh16Ux64",
40964 auxType: auxBool,
40965 argLen: 2,
40966 generic: true,
40967 },
40968 {
40969 name: "Rsh32Ux8",
40970 auxType: auxBool,
40971 argLen: 2,
40972 generic: true,
40973 },
40974 {
40975 name: "Rsh32Ux16",
40976 auxType: auxBool,
40977 argLen: 2,
40978 generic: true,
40979 },
40980 {
40981 name: "Rsh32Ux32",
40982 auxType: auxBool,
40983 argLen: 2,
40984 generic: true,
40985 },
40986 {
40987 name: "Rsh32Ux64",
40988 auxType: auxBool,
40989 argLen: 2,
40990 generic: true,
40991 },
40992 {
40993 name: "Rsh64Ux8",
40994 auxType: auxBool,
40995 argLen: 2,
40996 generic: true,
40997 },
40998 {
40999 name: "Rsh64Ux16",
41000 auxType: auxBool,
41001 argLen: 2,
41002 generic: true,
41003 },
41004 {
41005 name: "Rsh64Ux32",
41006 auxType: auxBool,
41007 argLen: 2,
41008 generic: true,
41009 },
41010 {
41011 name: "Rsh64Ux64",
41012 auxType: auxBool,
41013 argLen: 2,
41014 generic: true,
41015 },
41016 {
41017 name: "Eq8",
41018 argLen: 2,
41019 commutative: true,
41020 generic: true,
41021 },
41022 {
41023 name: "Eq16",
41024 argLen: 2,
41025 commutative: true,
41026 generic: true,
41027 },
41028 {
41029 name: "Eq32",
41030 argLen: 2,
41031 commutative: true,
41032 generic: true,
41033 },
41034 {
41035 name: "Eq64",
41036 argLen: 2,
41037 commutative: true,
41038 generic: true,
41039 },
41040 {
41041 name: "EqPtr",
41042 argLen: 2,
41043 commutative: true,
41044 generic: true,
41045 },
41046 {
41047 name: "EqInter",
41048 argLen: 2,
41049 generic: true,
41050 },
41051 {
41052 name: "EqSlice",
41053 argLen: 2,
41054 generic: true,
41055 },
41056 {
41057 name: "Eq32F",
41058 argLen: 2,
41059 commutative: true,
41060 generic: true,
41061 },
41062 {
41063 name: "Eq64F",
41064 argLen: 2,
41065 commutative: true,
41066 generic: true,
41067 },
41068 {
41069 name: "Neq8",
41070 argLen: 2,
41071 commutative: true,
41072 generic: true,
41073 },
41074 {
41075 name: "Neq16",
41076 argLen: 2,
41077 commutative: true,
41078 generic: true,
41079 },
41080 {
41081 name: "Neq32",
41082 argLen: 2,
41083 commutative: true,
41084 generic: true,
41085 },
41086 {
41087 name: "Neq64",
41088 argLen: 2,
41089 commutative: true,
41090 generic: true,
41091 },
41092 {
41093 name: "NeqPtr",
41094 argLen: 2,
41095 commutative: true,
41096 generic: true,
41097 },
41098 {
41099 name: "NeqInter",
41100 argLen: 2,
41101 generic: true,
41102 },
41103 {
41104 name: "NeqSlice",
41105 argLen: 2,
41106 generic: true,
41107 },
41108 {
41109 name: "Neq32F",
41110 argLen: 2,
41111 commutative: true,
41112 generic: true,
41113 },
41114 {
41115 name: "Neq64F",
41116 argLen: 2,
41117 commutative: true,
41118 generic: true,
41119 },
41120 {
41121 name: "Less8",
41122 argLen: 2,
41123 generic: true,
41124 },
41125 {
41126 name: "Less8U",
41127 argLen: 2,
41128 generic: true,
41129 },
41130 {
41131 name: "Less16",
41132 argLen: 2,
41133 generic: true,
41134 },
41135 {
41136 name: "Less16U",
41137 argLen: 2,
41138 generic: true,
41139 },
41140 {
41141 name: "Less32",
41142 argLen: 2,
41143 generic: true,
41144 },
41145 {
41146 name: "Less32U",
41147 argLen: 2,
41148 generic: true,
41149 },
41150 {
41151 name: "Less64",
41152 argLen: 2,
41153 generic: true,
41154 },
41155 {
41156 name: "Less64U",
41157 argLen: 2,
41158 generic: true,
41159 },
41160 {
41161 name: "Less32F",
41162 argLen: 2,
41163 generic: true,
41164 },
41165 {
41166 name: "Less64F",
41167 argLen: 2,
41168 generic: true,
41169 },
41170 {
41171 name: "Leq8",
41172 argLen: 2,
41173 generic: true,
41174 },
41175 {
41176 name: "Leq8U",
41177 argLen: 2,
41178 generic: true,
41179 },
41180 {
41181 name: "Leq16",
41182 argLen: 2,
41183 generic: true,
41184 },
41185 {
41186 name: "Leq16U",
41187 argLen: 2,
41188 generic: true,
41189 },
41190 {
41191 name: "Leq32",
41192 argLen: 2,
41193 generic: true,
41194 },
41195 {
41196 name: "Leq32U",
41197 argLen: 2,
41198 generic: true,
41199 },
41200 {
41201 name: "Leq64",
41202 argLen: 2,
41203 generic: true,
41204 },
41205 {
41206 name: "Leq64U",
41207 argLen: 2,
41208 generic: true,
41209 },
41210 {
41211 name: "Leq32F",
41212 argLen: 2,
41213 generic: true,
41214 },
41215 {
41216 name: "Leq64F",
41217 argLen: 2,
41218 generic: true,
41219 },
41220 {
41221 name: "CondSelect",
41222 argLen: 3,
41223 generic: true,
41224 },
41225 {
41226 name: "AndB",
41227 argLen: 2,
41228 commutative: true,
41229 generic: true,
41230 },
41231 {
41232 name: "OrB",
41233 argLen: 2,
41234 commutative: true,
41235 generic: true,
41236 },
41237 {
41238 name: "EqB",
41239 argLen: 2,
41240 commutative: true,
41241 generic: true,
41242 },
41243 {
41244 name: "NeqB",
41245 argLen: 2,
41246 commutative: true,
41247 generic: true,
41248 },
41249 {
41250 name: "Not",
41251 argLen: 1,
41252 generic: true,
41253 },
41254 {
41255 name: "Neg8",
41256 argLen: 1,
41257 generic: true,
41258 },
41259 {
41260 name: "Neg16",
41261 argLen: 1,
41262 generic: true,
41263 },
41264 {
41265 name: "Neg32",
41266 argLen: 1,
41267 generic: true,
41268 },
41269 {
41270 name: "Neg64",
41271 argLen: 1,
41272 generic: true,
41273 },
41274 {
41275 name: "Neg32F",
41276 argLen: 1,
41277 generic: true,
41278 },
41279 {
41280 name: "Neg64F",
41281 argLen: 1,
41282 generic: true,
41283 },
41284 {
41285 name: "Com8",
41286 argLen: 1,
41287 generic: true,
41288 },
41289 {
41290 name: "Com16",
41291 argLen: 1,
41292 generic: true,
41293 },
41294 {
41295 name: "Com32",
41296 argLen: 1,
41297 generic: true,
41298 },
41299 {
41300 name: "Com64",
41301 argLen: 1,
41302 generic: true,
41303 },
41304 {
41305 name: "Ctz8",
41306 argLen: 1,
41307 generic: true,
41308 },
41309 {
41310 name: "Ctz16",
41311 argLen: 1,
41312 generic: true,
41313 },
41314 {
41315 name: "Ctz32",
41316 argLen: 1,
41317 generic: true,
41318 },
41319 {
41320 name: "Ctz64",
41321 argLen: 1,
41322 generic: true,
41323 },
41324 {
41325 name: "Ctz64On32",
41326 argLen: 2,
41327 generic: true,
41328 },
41329 {
41330 name: "Ctz8NonZero",
41331 argLen: 1,
41332 generic: true,
41333 },
41334 {
41335 name: "Ctz16NonZero",
41336 argLen: 1,
41337 generic: true,
41338 },
41339 {
41340 name: "Ctz32NonZero",
41341 argLen: 1,
41342 generic: true,
41343 },
41344 {
41345 name: "Ctz64NonZero",
41346 argLen: 1,
41347 generic: true,
41348 },
41349 {
41350 name: "BitLen8",
41351 argLen: 1,
41352 generic: true,
41353 },
41354 {
41355 name: "BitLen16",
41356 argLen: 1,
41357 generic: true,
41358 },
41359 {
41360 name: "BitLen32",
41361 argLen: 1,
41362 generic: true,
41363 },
41364 {
41365 name: "BitLen64",
41366 argLen: 1,
41367 generic: true,
41368 },
41369 {
41370 name: "Bswap16",
41371 argLen: 1,
41372 generic: true,
41373 },
41374 {
41375 name: "Bswap32",
41376 argLen: 1,
41377 generic: true,
41378 },
41379 {
41380 name: "Bswap64",
41381 argLen: 1,
41382 generic: true,
41383 },
41384 {
41385 name: "BitRev8",
41386 argLen: 1,
41387 generic: true,
41388 },
41389 {
41390 name: "BitRev16",
41391 argLen: 1,
41392 generic: true,
41393 },
41394 {
41395 name: "BitRev32",
41396 argLen: 1,
41397 generic: true,
41398 },
41399 {
41400 name: "BitRev64",
41401 argLen: 1,
41402 generic: true,
41403 },
41404 {
41405 name: "PopCount8",
41406 argLen: 1,
41407 generic: true,
41408 },
41409 {
41410 name: "PopCount16",
41411 argLen: 1,
41412 generic: true,
41413 },
41414 {
41415 name: "PopCount32",
41416 argLen: 1,
41417 generic: true,
41418 },
41419 {
41420 name: "PopCount64",
41421 argLen: 1,
41422 generic: true,
41423 },
41424 {
41425 name: "RotateLeft64",
41426 argLen: 2,
41427 generic: true,
41428 },
41429 {
41430 name: "RotateLeft32",
41431 argLen: 2,
41432 generic: true,
41433 },
41434 {
41435 name: "RotateLeft16",
41436 argLen: 2,
41437 generic: true,
41438 },
41439 {
41440 name: "RotateLeft8",
41441 argLen: 2,
41442 generic: true,
41443 },
41444 {
41445 name: "Sqrt",
41446 argLen: 1,
41447 generic: true,
41448 },
41449 {
41450 name: "Sqrt32",
41451 argLen: 1,
41452 generic: true,
41453 },
41454 {
41455 name: "Floor",
41456 argLen: 1,
41457 generic: true,
41458 },
41459 {
41460 name: "Ceil",
41461 argLen: 1,
41462 generic: true,
41463 },
41464 {
41465 name: "Trunc",
41466 argLen: 1,
41467 generic: true,
41468 },
41469 {
41470 name: "Round",
41471 argLen: 1,
41472 generic: true,
41473 },
41474 {
41475 name: "RoundToEven",
41476 argLen: 1,
41477 generic: true,
41478 },
41479 {
41480 name: "Abs",
41481 argLen: 1,
41482 generic: true,
41483 },
41484 {
41485 name: "Copysign",
41486 argLen: 2,
41487 generic: true,
41488 },
41489 {
41490 name: "Min64",
41491 argLen: 2,
41492 generic: true,
41493 },
41494 {
41495 name: "Max64",
41496 argLen: 2,
41497 generic: true,
41498 },
41499 {
41500 name: "Min64u",
41501 argLen: 2,
41502 generic: true,
41503 },
41504 {
41505 name: "Max64u",
41506 argLen: 2,
41507 generic: true,
41508 },
41509 {
41510 name: "Min64F",
41511 argLen: 2,
41512 generic: true,
41513 },
41514 {
41515 name: "Min32F",
41516 argLen: 2,
41517 generic: true,
41518 },
41519 {
41520 name: "Max64F",
41521 argLen: 2,
41522 generic: true,
41523 },
41524 {
41525 name: "Max32F",
41526 argLen: 2,
41527 generic: true,
41528 },
41529 {
41530 name: "FMA",
41531 argLen: 3,
41532 generic: true,
41533 },
41534 {
41535 name: "Phi",
41536 argLen: -1,
41537 zeroWidth: true,
41538 generic: true,
41539 },
41540 {
41541 name: "Copy",
41542 argLen: 1,
41543 generic: true,
41544 },
41545 {
41546 name: "Convert",
41547 argLen: 2,
41548 resultInArg0: true,
41549 zeroWidth: true,
41550 generic: true,
41551 },
41552 {
41553 name: "ConstBool",
41554 auxType: auxBool,
41555 argLen: 0,
41556 generic: true,
41557 },
41558 {
41559 name: "ConstString",
41560 auxType: auxString,
41561 argLen: 0,
41562 generic: true,
41563 },
41564 {
41565 name: "ConstNil",
41566 argLen: 0,
41567 generic: true,
41568 },
41569 {
41570 name: "Const8",
41571 auxType: auxInt8,
41572 argLen: 0,
41573 generic: true,
41574 },
41575 {
41576 name: "Const16",
41577 auxType: auxInt16,
41578 argLen: 0,
41579 generic: true,
41580 },
41581 {
41582 name: "Const32",
41583 auxType: auxInt32,
41584 argLen: 0,
41585 generic: true,
41586 },
41587 {
41588 name: "Const64",
41589 auxType: auxInt64,
41590 argLen: 0,
41591 generic: true,
41592 },
41593 {
41594 name: "Const32F",
41595 auxType: auxFloat32,
41596 argLen: 0,
41597 generic: true,
41598 },
41599 {
41600 name: "Const64F",
41601 auxType: auxFloat64,
41602 argLen: 0,
41603 generic: true,
41604 },
41605 {
41606 name: "ConstInterface",
41607 argLen: 0,
41608 generic: true,
41609 },
41610 {
41611 name: "ConstSlice",
41612 argLen: 0,
41613 generic: true,
41614 },
41615 {
41616 name: "InitMem",
41617 argLen: 0,
41618 zeroWidth: true,
41619 generic: true,
41620 },
41621 {
41622 name: "Arg",
41623 auxType: auxSymOff,
41624 argLen: 0,
41625 zeroWidth: true,
41626 symEffect: SymRead,
41627 generic: true,
41628 },
41629 {
41630 name: "ArgIntReg",
41631 auxType: auxNameOffsetInt8,
41632 argLen: 0,
41633 zeroWidth: true,
41634 generic: true,
41635 },
41636 {
41637 name: "ArgFloatReg",
41638 auxType: auxNameOffsetInt8,
41639 argLen: 0,
41640 zeroWidth: true,
41641 generic: true,
41642 },
41643 {
41644 name: "Addr",
41645 auxType: auxSym,
41646 argLen: 1,
41647 symEffect: SymAddr,
41648 generic: true,
41649 },
41650 {
41651 name: "LocalAddr",
41652 auxType: auxSym,
41653 argLen: 2,
41654 symEffect: SymAddr,
41655 generic: true,
41656 },
41657 {
41658 name: "SP",
41659 argLen: 0,
41660 zeroWidth: true,
41661 fixedReg: true,
41662 generic: true,
41663 },
41664 {
41665 name: "SB",
41666 argLen: 0,
41667 zeroWidth: true,
41668 fixedReg: true,
41669 generic: true,
41670 },
41671 {
41672 name: "SPanchored",
41673 argLen: 2,
41674 zeroWidth: true,
41675 generic: true,
41676 },
41677 {
41678 name: "Load",
41679 argLen: 2,
41680 generic: true,
41681 },
41682 {
41683 name: "Dereference",
41684 argLen: 2,
41685 generic: true,
41686 },
41687 {
41688 name: "Store",
41689 auxType: auxTyp,
41690 argLen: 3,
41691 generic: true,
41692 },
41693 {
41694 name: "Move",
41695 auxType: auxTypSize,
41696 argLen: 3,
41697 generic: true,
41698 },
41699 {
41700 name: "Zero",
41701 auxType: auxTypSize,
41702 argLen: 2,
41703 generic: true,
41704 },
41705 {
41706 name: "StoreWB",
41707 auxType: auxTyp,
41708 argLen: 3,
41709 generic: true,
41710 },
41711 {
41712 name: "MoveWB",
41713 auxType: auxTypSize,
41714 argLen: 3,
41715 generic: true,
41716 },
41717 {
41718 name: "ZeroWB",
41719 auxType: auxTypSize,
41720 argLen: 2,
41721 generic: true,
41722 },
41723 {
41724 name: "WBend",
41725 argLen: 1,
41726 generic: true,
41727 },
41728 {
41729 name: "WB",
41730 auxType: auxInt64,
41731 argLen: 1,
41732 generic: true,
41733 },
41734 {
41735 name: "HasCPUFeature",
41736 auxType: auxSym,
41737 argLen: 0,
41738 symEffect: SymNone,
41739 generic: true,
41740 },
41741 {
41742 name: "PanicBounds",
41743 auxType: auxInt64,
41744 argLen: 3,
41745 call: true,
41746 generic: true,
41747 },
41748 {
41749 name: "PanicExtend",
41750 auxType: auxInt64,
41751 argLen: 4,
41752 call: true,
41753 generic: true,
41754 },
41755 {
41756 name: "ClosureCall",
41757 auxType: auxCallOff,
41758 argLen: -1,
41759 call: true,
41760 generic: true,
41761 },
41762 {
41763 name: "StaticCall",
41764 auxType: auxCallOff,
41765 argLen: -1,
41766 call: true,
41767 generic: true,
41768 },
41769 {
41770 name: "InterCall",
41771 auxType: auxCallOff,
41772 argLen: -1,
41773 call: true,
41774 generic: true,
41775 },
41776 {
41777 name: "TailCall",
41778 auxType: auxCallOff,
41779 argLen: -1,
41780 call: true,
41781 generic: true,
41782 },
41783 {
41784 name: "ClosureLECall",
41785 auxType: auxCallOff,
41786 argLen: -1,
41787 call: true,
41788 generic: true,
41789 },
41790 {
41791 name: "StaticLECall",
41792 auxType: auxCallOff,
41793 argLen: -1,
41794 call: true,
41795 generic: true,
41796 },
41797 {
41798 name: "InterLECall",
41799 auxType: auxCallOff,
41800 argLen: -1,
41801 call: true,
41802 generic: true,
41803 },
41804 {
41805 name: "TailLECall",
41806 auxType: auxCallOff,
41807 argLen: -1,
41808 call: true,
41809 generic: true,
41810 },
41811 {
41812 name: "SignExt8to16",
41813 argLen: 1,
41814 generic: true,
41815 },
41816 {
41817 name: "SignExt8to32",
41818 argLen: 1,
41819 generic: true,
41820 },
41821 {
41822 name: "SignExt8to64",
41823 argLen: 1,
41824 generic: true,
41825 },
41826 {
41827 name: "SignExt16to32",
41828 argLen: 1,
41829 generic: true,
41830 },
41831 {
41832 name: "SignExt16to64",
41833 argLen: 1,
41834 generic: true,
41835 },
41836 {
41837 name: "SignExt32to64",
41838 argLen: 1,
41839 generic: true,
41840 },
41841 {
41842 name: "ZeroExt8to16",
41843 argLen: 1,
41844 generic: true,
41845 },
41846 {
41847 name: "ZeroExt8to32",
41848 argLen: 1,
41849 generic: true,
41850 },
41851 {
41852 name: "ZeroExt8to64",
41853 argLen: 1,
41854 generic: true,
41855 },
41856 {
41857 name: "ZeroExt16to32",
41858 argLen: 1,
41859 generic: true,
41860 },
41861 {
41862 name: "ZeroExt16to64",
41863 argLen: 1,
41864 generic: true,
41865 },
41866 {
41867 name: "ZeroExt32to64",
41868 argLen: 1,
41869 generic: true,
41870 },
41871 {
41872 name: "Trunc16to8",
41873 argLen: 1,
41874 generic: true,
41875 },
41876 {
41877 name: "Trunc32to8",
41878 argLen: 1,
41879 generic: true,
41880 },
41881 {
41882 name: "Trunc32to16",
41883 argLen: 1,
41884 generic: true,
41885 },
41886 {
41887 name: "Trunc64to8",
41888 argLen: 1,
41889 generic: true,
41890 },
41891 {
41892 name: "Trunc64to16",
41893 argLen: 1,
41894 generic: true,
41895 },
41896 {
41897 name: "Trunc64to32",
41898 argLen: 1,
41899 generic: true,
41900 },
41901 {
41902 name: "Cvt32to32F",
41903 argLen: 1,
41904 generic: true,
41905 },
41906 {
41907 name: "Cvt32to64F",
41908 argLen: 1,
41909 generic: true,
41910 },
41911 {
41912 name: "Cvt64to32F",
41913 argLen: 1,
41914 generic: true,
41915 },
41916 {
41917 name: "Cvt64to64F",
41918 argLen: 1,
41919 generic: true,
41920 },
41921 {
41922 name: "Cvt32Fto32",
41923 argLen: 1,
41924 generic: true,
41925 },
41926 {
41927 name: "Cvt32Fto64",
41928 argLen: 1,
41929 generic: true,
41930 },
41931 {
41932 name: "Cvt64Fto32",
41933 argLen: 1,
41934 generic: true,
41935 },
41936 {
41937 name: "Cvt64Fto64",
41938 argLen: 1,
41939 generic: true,
41940 },
41941 {
41942 name: "Cvt32Fto64F",
41943 argLen: 1,
41944 generic: true,
41945 },
41946 {
41947 name: "Cvt64Fto32F",
41948 argLen: 1,
41949 generic: true,
41950 },
41951 {
41952 name: "CvtBoolToUint8",
41953 argLen: 1,
41954 generic: true,
41955 },
41956 {
41957 name: "Round32F",
41958 argLen: 1,
41959 generic: true,
41960 },
41961 {
41962 name: "Round64F",
41963 argLen: 1,
41964 generic: true,
41965 },
41966 {
41967 name: "IsNonNil",
41968 argLen: 1,
41969 generic: true,
41970 },
41971 {
41972 name: "IsInBounds",
41973 argLen: 2,
41974 generic: true,
41975 },
41976 {
41977 name: "IsSliceInBounds",
41978 argLen: 2,
41979 generic: true,
41980 },
41981 {
41982 name: "NilCheck",
41983 argLen: 2,
41984 nilCheck: true,
41985 generic: true,
41986 },
41987 {
41988 name: "GetG",
41989 argLen: 1,
41990 zeroWidth: true,
41991 generic: true,
41992 },
41993 {
41994 name: "GetClosurePtr",
41995 argLen: 0,
41996 generic: true,
41997 },
41998 {
41999 name: "GetCallerPC",
42000 argLen: 0,
42001 generic: true,
42002 },
42003 {
42004 name: "GetCallerSP",
42005 argLen: 1,
42006 generic: true,
42007 },
42008 {
42009 name: "PtrIndex",
42010 argLen: 2,
42011 generic: true,
42012 },
42013 {
42014 name: "OffPtr",
42015 auxType: auxInt64,
42016 argLen: 1,
42017 generic: true,
42018 },
42019 {
42020 name: "SliceMake",
42021 argLen: 3,
42022 generic: true,
42023 },
42024 {
42025 name: "SlicePtr",
42026 argLen: 1,
42027 generic: true,
42028 },
42029 {
42030 name: "SliceLen",
42031 argLen: 1,
42032 generic: true,
42033 },
42034 {
42035 name: "SliceCap",
42036 argLen: 1,
42037 generic: true,
42038 },
42039 {
42040 name: "SlicePtrUnchecked",
42041 argLen: 1,
42042 generic: true,
42043 },
42044 {
42045 name: "ComplexMake",
42046 argLen: 2,
42047 generic: true,
42048 },
42049 {
42050 name: "ComplexReal",
42051 argLen: 1,
42052 generic: true,
42053 },
42054 {
42055 name: "ComplexImag",
42056 argLen: 1,
42057 generic: true,
42058 },
42059 {
42060 name: "StringMake",
42061 argLen: 2,
42062 generic: true,
42063 },
42064 {
42065 name: "StringPtr",
42066 argLen: 1,
42067 generic: true,
42068 },
42069 {
42070 name: "StringLen",
42071 argLen: 1,
42072 generic: true,
42073 },
42074 {
42075 name: "IMake",
42076 argLen: 2,
42077 generic: true,
42078 },
42079 {
42080 name: "ITab",
42081 argLen: 1,
42082 generic: true,
42083 },
42084 {
42085 name: "IData",
42086 argLen: 1,
42087 generic: true,
42088 },
42089 {
42090 name: "StructMake",
42091 argLen: -1,
42092 generic: true,
42093 },
42094 {
42095 name: "StructSelect",
42096 auxType: auxInt64,
42097 argLen: 1,
42098 generic: true,
42099 },
42100 {
42101 name: "ArrayMake0",
42102 argLen: 0,
42103 generic: true,
42104 },
42105 {
42106 name: "ArrayMake1",
42107 argLen: 1,
42108 generic: true,
42109 },
42110 {
42111 name: "ArraySelect",
42112 auxType: auxInt64,
42113 argLen: 1,
42114 generic: true,
42115 },
42116 {
42117 name: "StoreReg",
42118 argLen: 1,
42119 generic: true,
42120 },
42121 {
42122 name: "LoadReg",
42123 argLen: 1,
42124 generic: true,
42125 },
42126 {
42127 name: "FwdRef",
42128 auxType: auxSym,
42129 argLen: 0,
42130 symEffect: SymNone,
42131 generic: true,
42132 },
42133 {
42134 name: "Unknown",
42135 argLen: 0,
42136 generic: true,
42137 },
42138 {
42139 name: "VarDef",
42140 auxType: auxSym,
42141 argLen: 1,
42142 zeroWidth: true,
42143 symEffect: SymNone,
42144 generic: true,
42145 },
42146 {
42147 name: "VarLive",
42148 auxType: auxSym,
42149 argLen: 1,
42150 zeroWidth: true,
42151 symEffect: SymRead,
42152 generic: true,
42153 },
42154 {
42155 name: "KeepAlive",
42156 argLen: 2,
42157 zeroWidth: true,
42158 generic: true,
42159 },
42160 {
42161 name: "InlMark",
42162 auxType: auxInt32,
42163 argLen: 1,
42164 generic: true,
42165 },
42166 {
42167 name: "Int64Make",
42168 argLen: 2,
42169 generic: true,
42170 },
42171 {
42172 name: "Int64Hi",
42173 argLen: 1,
42174 generic: true,
42175 },
42176 {
42177 name: "Int64Lo",
42178 argLen: 1,
42179 generic: true,
42180 },
42181 {
42182 name: "Add32carry",
42183 argLen: 2,
42184 commutative: true,
42185 generic: true,
42186 },
42187 {
42188 name: "Add32withcarry",
42189 argLen: 3,
42190 commutative: true,
42191 generic: true,
42192 },
42193 {
42194 name: "Sub32carry",
42195 argLen: 2,
42196 generic: true,
42197 },
42198 {
42199 name: "Sub32withcarry",
42200 argLen: 3,
42201 generic: true,
42202 },
42203 {
42204 name: "Add64carry",
42205 argLen: 3,
42206 commutative: true,
42207 generic: true,
42208 },
42209 {
42210 name: "Sub64borrow",
42211 argLen: 3,
42212 generic: true,
42213 },
42214 {
42215 name: "Signmask",
42216 argLen: 1,
42217 generic: true,
42218 },
42219 {
42220 name: "Zeromask",
42221 argLen: 1,
42222 generic: true,
42223 },
42224 {
42225 name: "Slicemask",
42226 argLen: 1,
42227 generic: true,
42228 },
42229 {
42230 name: "SpectreIndex",
42231 argLen: 2,
42232 generic: true,
42233 },
42234 {
42235 name: "SpectreSliceIndex",
42236 argLen: 2,
42237 generic: true,
42238 },
42239 {
42240 name: "Cvt32Uto32F",
42241 argLen: 1,
42242 generic: true,
42243 },
42244 {
42245 name: "Cvt32Uto64F",
42246 argLen: 1,
42247 generic: true,
42248 },
42249 {
42250 name: "Cvt32Fto32U",
42251 argLen: 1,
42252 generic: true,
42253 },
42254 {
42255 name: "Cvt64Fto32U",
42256 argLen: 1,
42257 generic: true,
42258 },
42259 {
42260 name: "Cvt64Uto32F",
42261 argLen: 1,
42262 generic: true,
42263 },
42264 {
42265 name: "Cvt64Uto64F",
42266 argLen: 1,
42267 generic: true,
42268 },
42269 {
42270 name: "Cvt32Fto64U",
42271 argLen: 1,
42272 generic: true,
42273 },
42274 {
42275 name: "Cvt64Fto64U",
42276 argLen: 1,
42277 generic: true,
42278 },
42279 {
42280 name: "Select0",
42281 argLen: 1,
42282 zeroWidth: true,
42283 generic: true,
42284 },
42285 {
42286 name: "Select1",
42287 argLen: 1,
42288 zeroWidth: true,
42289 generic: true,
42290 },
42291 {
42292 name: "MakeTuple",
42293 argLen: 2,
42294 generic: true,
42295 },
42296 {
42297 name: "SelectN",
42298 auxType: auxInt64,
42299 argLen: 1,
42300 generic: true,
42301 },
42302 {
42303 name: "SelectNAddr",
42304 auxType: auxInt64,
42305 argLen: 1,
42306 generic: true,
42307 },
42308 {
42309 name: "MakeResult",
42310 argLen: -1,
42311 generic: true,
42312 },
42313 {
42314 name: "AtomicLoad8",
42315 argLen: 2,
42316 generic: true,
42317 },
42318 {
42319 name: "AtomicLoad32",
42320 argLen: 2,
42321 generic: true,
42322 },
42323 {
42324 name: "AtomicLoad64",
42325 argLen: 2,
42326 generic: true,
42327 },
42328 {
42329 name: "AtomicLoadPtr",
42330 argLen: 2,
42331 generic: true,
42332 },
42333 {
42334 name: "AtomicLoadAcq32",
42335 argLen: 2,
42336 generic: true,
42337 },
42338 {
42339 name: "AtomicLoadAcq64",
42340 argLen: 2,
42341 generic: true,
42342 },
42343 {
42344 name: "AtomicStore8",
42345 argLen: 3,
42346 hasSideEffects: true,
42347 generic: true,
42348 },
42349 {
42350 name: "AtomicStore32",
42351 argLen: 3,
42352 hasSideEffects: true,
42353 generic: true,
42354 },
42355 {
42356 name: "AtomicStore64",
42357 argLen: 3,
42358 hasSideEffects: true,
42359 generic: true,
42360 },
42361 {
42362 name: "AtomicStorePtrNoWB",
42363 argLen: 3,
42364 hasSideEffects: true,
42365 generic: true,
42366 },
42367 {
42368 name: "AtomicStoreRel32",
42369 argLen: 3,
42370 hasSideEffects: true,
42371 generic: true,
42372 },
42373 {
42374 name: "AtomicStoreRel64",
42375 argLen: 3,
42376 hasSideEffects: true,
42377 generic: true,
42378 },
42379 {
42380 name: "AtomicExchange8",
42381 argLen: 3,
42382 hasSideEffects: true,
42383 generic: true,
42384 },
42385 {
42386 name: "AtomicExchange32",
42387 argLen: 3,
42388 hasSideEffects: true,
42389 generic: true,
42390 },
42391 {
42392 name: "AtomicExchange64",
42393 argLen: 3,
42394 hasSideEffects: true,
42395 generic: true,
42396 },
42397 {
42398 name: "AtomicAdd32",
42399 argLen: 3,
42400 hasSideEffects: true,
42401 generic: true,
42402 },
42403 {
42404 name: "AtomicAdd64",
42405 argLen: 3,
42406 hasSideEffects: true,
42407 generic: true,
42408 },
42409 {
42410 name: "AtomicCompareAndSwap32",
42411 argLen: 4,
42412 hasSideEffects: true,
42413 generic: true,
42414 },
42415 {
42416 name: "AtomicCompareAndSwap64",
42417 argLen: 4,
42418 hasSideEffects: true,
42419 generic: true,
42420 },
42421 {
42422 name: "AtomicCompareAndSwapRel32",
42423 argLen: 4,
42424 hasSideEffects: true,
42425 generic: true,
42426 },
42427 {
42428 name: "AtomicAnd8",
42429 argLen: 3,
42430 hasSideEffects: true,
42431 generic: true,
42432 },
42433 {
42434 name: "AtomicOr8",
42435 argLen: 3,
42436 hasSideEffects: true,
42437 generic: true,
42438 },
42439 {
42440 name: "AtomicAnd32",
42441 argLen: 3,
42442 hasSideEffects: true,
42443 generic: true,
42444 },
42445 {
42446 name: "AtomicOr32",
42447 argLen: 3,
42448 hasSideEffects: true,
42449 generic: true,
42450 },
42451 {
42452 name: "AtomicAnd64value",
42453 argLen: 3,
42454 hasSideEffects: true,
42455 generic: true,
42456 },
42457 {
42458 name: "AtomicAnd32value",
42459 argLen: 3,
42460 hasSideEffects: true,
42461 generic: true,
42462 },
42463 {
42464 name: "AtomicAnd8value",
42465 argLen: 3,
42466 hasSideEffects: true,
42467 generic: true,
42468 },
42469 {
42470 name: "AtomicOr64value",
42471 argLen: 3,
42472 hasSideEffects: true,
42473 generic: true,
42474 },
42475 {
42476 name: "AtomicOr32value",
42477 argLen: 3,
42478 hasSideEffects: true,
42479 generic: true,
42480 },
42481 {
42482 name: "AtomicOr8value",
42483 argLen: 3,
42484 hasSideEffects: true,
42485 generic: true,
42486 },
42487 {
42488 name: "AtomicStore8Variant",
42489 argLen: 3,
42490 hasSideEffects: true,
42491 generic: true,
42492 },
42493 {
42494 name: "AtomicStore32Variant",
42495 argLen: 3,
42496 hasSideEffects: true,
42497 generic: true,
42498 },
42499 {
42500 name: "AtomicStore64Variant",
42501 argLen: 3,
42502 hasSideEffects: true,
42503 generic: true,
42504 },
42505 {
42506 name: "AtomicAdd32Variant",
42507 argLen: 3,
42508 hasSideEffects: true,
42509 generic: true,
42510 },
42511 {
42512 name: "AtomicAdd64Variant",
42513 argLen: 3,
42514 hasSideEffects: true,
42515 generic: true,
42516 },
42517 {
42518 name: "AtomicExchange8Variant",
42519 argLen: 3,
42520 hasSideEffects: true,
42521 generic: true,
42522 },
42523 {
42524 name: "AtomicExchange32Variant",
42525 argLen: 3,
42526 hasSideEffects: true,
42527 generic: true,
42528 },
42529 {
42530 name: "AtomicExchange64Variant",
42531 argLen: 3,
42532 hasSideEffects: true,
42533 generic: true,
42534 },
42535 {
42536 name: "AtomicCompareAndSwap32Variant",
42537 argLen: 4,
42538 hasSideEffects: true,
42539 generic: true,
42540 },
42541 {
42542 name: "AtomicCompareAndSwap64Variant",
42543 argLen: 4,
42544 hasSideEffects: true,
42545 generic: true,
42546 },
42547 {
42548 name: "AtomicAnd64valueVariant",
42549 argLen: 3,
42550 hasSideEffects: true,
42551 generic: true,
42552 },
42553 {
42554 name: "AtomicOr64valueVariant",
42555 argLen: 3,
42556 hasSideEffects: true,
42557 generic: true,
42558 },
42559 {
42560 name: "AtomicAnd32valueVariant",
42561 argLen: 3,
42562 hasSideEffects: true,
42563 generic: true,
42564 },
42565 {
42566 name: "AtomicOr32valueVariant",
42567 argLen: 3,
42568 hasSideEffects: true,
42569 generic: true,
42570 },
42571 {
42572 name: "AtomicAnd8valueVariant",
42573 argLen: 3,
42574 hasSideEffects: true,
42575 generic: true,
42576 },
42577 {
42578 name: "AtomicOr8valueVariant",
42579 argLen: 3,
42580 hasSideEffects: true,
42581 generic: true,
42582 },
42583 {
42584 name: "PubBarrier",
42585 argLen: 1,
42586 hasSideEffects: true,
42587 generic: true,
42588 },
42589 {
42590 name: "Clobber",
42591 auxType: auxSymOff,
42592 argLen: 0,
42593 symEffect: SymNone,
42594 generic: true,
42595 },
42596 {
42597 name: "ClobberReg",
42598 argLen: 0,
42599 generic: true,
42600 },
42601 {
42602 name: "PrefetchCache",
42603 argLen: 2,
42604 hasSideEffects: true,
42605 generic: true,
42606 },
42607 {
42608 name: "PrefetchCacheStreamed",
42609 argLen: 2,
42610 hasSideEffects: true,
42611 generic: true,
42612 },
42613 }
42614
42615 func (o Op) Asm() obj.As { return opcodeTable[o].asm }
42616 func (o Op) Scale() int16 { return int16(opcodeTable[o].scale) }
42617 func (o Op) String() string { return opcodeTable[o].name }
42618 func (o Op) SymEffect() SymEffect { return opcodeTable[o].symEffect }
42619 func (o Op) IsCall() bool { return opcodeTable[o].call }
42620 func (o Op) IsTailCall() bool { return opcodeTable[o].tailCall }
42621 func (o Op) HasSideEffects() bool { return opcodeTable[o].hasSideEffects }
42622 func (o Op) UnsafePoint() bool { return opcodeTable[o].unsafePoint }
42623 func (o Op) ResultInArg0() bool { return opcodeTable[o].resultInArg0 }
42624
42625 var registers386 = [...]Register{
42626 {0, x86.REG_AX, "AX"},
42627 {1, x86.REG_CX, "CX"},
42628 {2, x86.REG_DX, "DX"},
42629 {3, x86.REG_BX, "BX"},
42630 {4, x86.REGSP, "SP"},
42631 {5, x86.REG_BP, "BP"},
42632 {6, x86.REG_SI, "SI"},
42633 {7, x86.REG_DI, "DI"},
42634 {8, x86.REG_X0, "X0"},
42635 {9, x86.REG_X1, "X1"},
42636 {10, x86.REG_X2, "X2"},
42637 {11, x86.REG_X3, "X3"},
42638 {12, x86.REG_X4, "X4"},
42639 {13, x86.REG_X5, "X5"},
42640 {14, x86.REG_X6, "X6"},
42641 {15, x86.REG_X7, "X7"},
42642 {16, 0, "SB"},
42643 }
42644 var paramIntReg386 = []int8(nil)
42645 var paramFloatReg386 = []int8(nil)
42646 var gpRegMask386 = regMask(239)
42647 var fpRegMask386 = regMask(65280)
42648 var specialRegMask386 = regMask(0)
42649 var framepointerReg386 = int8(5)
42650 var linkReg386 = int8(-1)
42651 var registersAMD64 = [...]Register{
42652 {0, x86.REG_AX, "AX"},
42653 {1, x86.REG_CX, "CX"},
42654 {2, x86.REG_DX, "DX"},
42655 {3, x86.REG_BX, "BX"},
42656 {4, x86.REGSP, "SP"},
42657 {5, x86.REG_BP, "BP"},
42658 {6, x86.REG_SI, "SI"},
42659 {7, x86.REG_DI, "DI"},
42660 {8, x86.REG_R8, "R8"},
42661 {9, x86.REG_R9, "R9"},
42662 {10, x86.REG_R10, "R10"},
42663 {11, x86.REG_R11, "R11"},
42664 {12, x86.REG_R12, "R12"},
42665 {13, x86.REG_R13, "R13"},
42666 {14, x86.REGG, "g"},
42667 {15, x86.REG_R15, "R15"},
42668 {16, x86.REG_X0, "X0"},
42669 {17, x86.REG_X1, "X1"},
42670 {18, x86.REG_X2, "X2"},
42671 {19, x86.REG_X3, "X3"},
42672 {20, x86.REG_X4, "X4"},
42673 {21, x86.REG_X5, "X5"},
42674 {22, x86.REG_X6, "X6"},
42675 {23, x86.REG_X7, "X7"},
42676 {24, x86.REG_X8, "X8"},
42677 {25, x86.REG_X9, "X9"},
42678 {26, x86.REG_X10, "X10"},
42679 {27, x86.REG_X11, "X11"},
42680 {28, x86.REG_X12, "X12"},
42681 {29, x86.REG_X13, "X13"},
42682 {30, x86.REG_X14, "X14"},
42683 {31, x86.REG_X15, "X15"},
42684 {32, 0, "SB"},
42685 }
42686 var paramIntRegAMD64 = []int8{0, 3, 1, 7, 6, 8, 9, 10, 11}
42687 var paramFloatRegAMD64 = []int8{16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30}
42688 var gpRegMaskAMD64 = regMask(49135)
42689 var fpRegMaskAMD64 = regMask(2147418112)
42690 var specialRegMaskAMD64 = regMask(2147483648)
42691 var framepointerRegAMD64 = int8(5)
42692 var linkRegAMD64 = int8(-1)
42693 var registersARM = [...]Register{
42694 {0, arm.REG_R0, "R0"},
42695 {1, arm.REG_R1, "R1"},
42696 {2, arm.REG_R2, "R2"},
42697 {3, arm.REG_R3, "R3"},
42698 {4, arm.REG_R4, "R4"},
42699 {5, arm.REG_R5, "R5"},
42700 {6, arm.REG_R6, "R6"},
42701 {7, arm.REG_R7, "R7"},
42702 {8, arm.REG_R8, "R8"},
42703 {9, arm.REG_R9, "R9"},
42704 {10, arm.REGG, "g"},
42705 {11, arm.REG_R11, "R11"},
42706 {12, arm.REG_R12, "R12"},
42707 {13, arm.REGSP, "SP"},
42708 {14, arm.REG_R14, "R14"},
42709 {15, arm.REG_R15, "R15"},
42710 {16, arm.REG_F0, "F0"},
42711 {17, arm.REG_F1, "F1"},
42712 {18, arm.REG_F2, "F2"},
42713 {19, arm.REG_F3, "F3"},
42714 {20, arm.REG_F4, "F4"},
42715 {21, arm.REG_F5, "F5"},
42716 {22, arm.REG_F6, "F6"},
42717 {23, arm.REG_F7, "F7"},
42718 {24, arm.REG_F8, "F8"},
42719 {25, arm.REG_F9, "F9"},
42720 {26, arm.REG_F10, "F10"},
42721 {27, arm.REG_F11, "F11"},
42722 {28, arm.REG_F12, "F12"},
42723 {29, arm.REG_F13, "F13"},
42724 {30, arm.REG_F14, "F14"},
42725 {31, arm.REG_F15, "F15"},
42726 {32, 0, "SB"},
42727 }
42728 var paramIntRegARM = []int8(nil)
42729 var paramFloatRegARM = []int8(nil)
42730 var gpRegMaskARM = regMask(21503)
42731 var fpRegMaskARM = regMask(4294901760)
42732 var specialRegMaskARM = regMask(0)
42733 var framepointerRegARM = int8(-1)
42734 var linkRegARM = int8(14)
42735 var registersARM64 = [...]Register{
42736 {0, arm64.REG_R0, "R0"},
42737 {1, arm64.REG_R1, "R1"},
42738 {2, arm64.REG_R2, "R2"},
42739 {3, arm64.REG_R3, "R3"},
42740 {4, arm64.REG_R4, "R4"},
42741 {5, arm64.REG_R5, "R5"},
42742 {6, arm64.REG_R6, "R6"},
42743 {7, arm64.REG_R7, "R7"},
42744 {8, arm64.REG_R8, "R8"},
42745 {9, arm64.REG_R9, "R9"},
42746 {10, arm64.REG_R10, "R10"},
42747 {11, arm64.REG_R11, "R11"},
42748 {12, arm64.REG_R12, "R12"},
42749 {13, arm64.REG_R13, "R13"},
42750 {14, arm64.REG_R14, "R14"},
42751 {15, arm64.REG_R15, "R15"},
42752 {16, arm64.REG_R16, "R16"},
42753 {17, arm64.REG_R17, "R17"},
42754 {18, arm64.REG_R19, "R19"},
42755 {19, arm64.REG_R20, "R20"},
42756 {20, arm64.REG_R21, "R21"},
42757 {21, arm64.REG_R22, "R22"},
42758 {22, arm64.REG_R23, "R23"},
42759 {23, arm64.REG_R24, "R24"},
42760 {24, arm64.REG_R25, "R25"},
42761 {25, arm64.REG_R26, "R26"},
42762 {26, arm64.REGG, "g"},
42763 {27, arm64.REG_R29, "R29"},
42764 {28, arm64.REG_R30, "R30"},
42765 {29, arm64.REGZERO, "ZERO"},
42766 {30, arm64.REGSP, "SP"},
42767 {31, arm64.REG_F0, "F0"},
42768 {32, arm64.REG_F1, "F1"},
42769 {33, arm64.REG_F2, "F2"},
42770 {34, arm64.REG_F3, "F3"},
42771 {35, arm64.REG_F4, "F4"},
42772 {36, arm64.REG_F5, "F5"},
42773 {37, arm64.REG_F6, "F6"},
42774 {38, arm64.REG_F7, "F7"},
42775 {39, arm64.REG_F8, "F8"},
42776 {40, arm64.REG_F9, "F9"},
42777 {41, arm64.REG_F10, "F10"},
42778 {42, arm64.REG_F11, "F11"},
42779 {43, arm64.REG_F12, "F12"},
42780 {44, arm64.REG_F13, "F13"},
42781 {45, arm64.REG_F14, "F14"},
42782 {46, arm64.REG_F15, "F15"},
42783 {47, arm64.REG_F16, "F16"},
42784 {48, arm64.REG_F17, "F17"},
42785 {49, arm64.REG_F18, "F18"},
42786 {50, arm64.REG_F19, "F19"},
42787 {51, arm64.REG_F20, "F20"},
42788 {52, arm64.REG_F21, "F21"},
42789 {53, arm64.REG_F22, "F22"},
42790 {54, arm64.REG_F23, "F23"},
42791 {55, arm64.REG_F24, "F24"},
42792 {56, arm64.REG_F25, "F25"},
42793 {57, arm64.REG_F26, "F26"},
42794 {58, arm64.REG_F27, "F27"},
42795 {59, arm64.REG_F28, "F28"},
42796 {60, arm64.REG_F29, "F29"},
42797 {61, arm64.REG_F30, "F30"},
42798 {62, arm64.REG_F31, "F31"},
42799 {63, 0, "SB"},
42800 }
42801 var paramIntRegARM64 = []int8{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}
42802 var paramFloatRegARM64 = []int8{31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46}
42803 var gpRegMaskARM64 = regMask(335544319)
42804 var fpRegMaskARM64 = regMask(9223372034707292160)
42805 var specialRegMaskARM64 = regMask(0)
42806 var framepointerRegARM64 = int8(-1)
42807 var linkRegARM64 = int8(28)
42808 var registersLOONG64 = [...]Register{
42809 {0, loong64.REG_R0, "R0"},
42810 {1, loong64.REG_R1, "R1"},
42811 {2, loong64.REGSP, "SP"},
42812 {3, loong64.REG_R4, "R4"},
42813 {4, loong64.REG_R5, "R5"},
42814 {5, loong64.REG_R6, "R6"},
42815 {6, loong64.REG_R7, "R7"},
42816 {7, loong64.REG_R8, "R8"},
42817 {8, loong64.REG_R9, "R9"},
42818 {9, loong64.REG_R10, "R10"},
42819 {10, loong64.REG_R11, "R11"},
42820 {11, loong64.REG_R12, "R12"},
42821 {12, loong64.REG_R13, "R13"},
42822 {13, loong64.REG_R14, "R14"},
42823 {14, loong64.REG_R15, "R15"},
42824 {15, loong64.REG_R16, "R16"},
42825 {16, loong64.REG_R17, "R17"},
42826 {17, loong64.REG_R18, "R18"},
42827 {18, loong64.REG_R19, "R19"},
42828 {19, loong64.REG_R20, "R20"},
42829 {20, loong64.REG_R21, "R21"},
42830 {21, loong64.REGG, "g"},
42831 {22, loong64.REG_R23, "R23"},
42832 {23, loong64.REG_R24, "R24"},
42833 {24, loong64.REG_R25, "R25"},
42834 {25, loong64.REG_R26, "R26"},
42835 {26, loong64.REG_R27, "R27"},
42836 {27, loong64.REG_R28, "R28"},
42837 {28, loong64.REG_R29, "R29"},
42838 {29, loong64.REG_R31, "R31"},
42839 {30, loong64.REG_F0, "F0"},
42840 {31, loong64.REG_F1, "F1"},
42841 {32, loong64.REG_F2, "F2"},
42842 {33, loong64.REG_F3, "F3"},
42843 {34, loong64.REG_F4, "F4"},
42844 {35, loong64.REG_F5, "F5"},
42845 {36, loong64.REG_F6, "F6"},
42846 {37, loong64.REG_F7, "F7"},
42847 {38, loong64.REG_F8, "F8"},
42848 {39, loong64.REG_F9, "F9"},
42849 {40, loong64.REG_F10, "F10"},
42850 {41, loong64.REG_F11, "F11"},
42851 {42, loong64.REG_F12, "F12"},
42852 {43, loong64.REG_F13, "F13"},
42853 {44, loong64.REG_F14, "F14"},
42854 {45, loong64.REG_F15, "F15"},
42855 {46, loong64.REG_F16, "F16"},
42856 {47, loong64.REG_F17, "F17"},
42857 {48, loong64.REG_F18, "F18"},
42858 {49, loong64.REG_F19, "F19"},
42859 {50, loong64.REG_F20, "F20"},
42860 {51, loong64.REG_F21, "F21"},
42861 {52, loong64.REG_F22, "F22"},
42862 {53, loong64.REG_F23, "F23"},
42863 {54, loong64.REG_F24, "F24"},
42864 {55, loong64.REG_F25, "F25"},
42865 {56, loong64.REG_F26, "F26"},
42866 {57, loong64.REG_F27, "F27"},
42867 {58, loong64.REG_F28, "F28"},
42868 {59, loong64.REG_F29, "F29"},
42869 {60, loong64.REG_F30, "F30"},
42870 {61, loong64.REG_F31, "F31"},
42871 {62, 0, "SB"},
42872 }
42873 var paramIntRegLOONG64 = []int8{3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18}
42874 var paramFloatRegLOONG64 = []int8{30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45}
42875 var gpRegMaskLOONG64 = regMask(1071644664)
42876 var fpRegMaskLOONG64 = regMask(4611686017353646080)
42877 var specialRegMaskLOONG64 = regMask(0)
42878 var framepointerRegLOONG64 = int8(-1)
42879 var linkRegLOONG64 = int8(1)
42880 var registersMIPS = [...]Register{
42881 {0, mips.REG_R0, "R0"},
42882 {1, mips.REG_R1, "R1"},
42883 {2, mips.REG_R2, "R2"},
42884 {3, mips.REG_R3, "R3"},
42885 {4, mips.REG_R4, "R4"},
42886 {5, mips.REG_R5, "R5"},
42887 {6, mips.REG_R6, "R6"},
42888 {7, mips.REG_R7, "R7"},
42889 {8, mips.REG_R8, "R8"},
42890 {9, mips.REG_R9, "R9"},
42891 {10, mips.REG_R10, "R10"},
42892 {11, mips.REG_R11, "R11"},
42893 {12, mips.REG_R12, "R12"},
42894 {13, mips.REG_R13, "R13"},
42895 {14, mips.REG_R14, "R14"},
42896 {15, mips.REG_R15, "R15"},
42897 {16, mips.REG_R16, "R16"},
42898 {17, mips.REG_R17, "R17"},
42899 {18, mips.REG_R18, "R18"},
42900 {19, mips.REG_R19, "R19"},
42901 {20, mips.REG_R20, "R20"},
42902 {21, mips.REG_R21, "R21"},
42903 {22, mips.REG_R22, "R22"},
42904 {23, mips.REG_R24, "R24"},
42905 {24, mips.REG_R25, "R25"},
42906 {25, mips.REG_R28, "R28"},
42907 {26, mips.REGSP, "SP"},
42908 {27, mips.REGG, "g"},
42909 {28, mips.REG_R31, "R31"},
42910 {29, mips.REG_F0, "F0"},
42911 {30, mips.REG_F2, "F2"},
42912 {31, mips.REG_F4, "F4"},
42913 {32, mips.REG_F6, "F6"},
42914 {33, mips.REG_F8, "F8"},
42915 {34, mips.REG_F10, "F10"},
42916 {35, mips.REG_F12, "F12"},
42917 {36, mips.REG_F14, "F14"},
42918 {37, mips.REG_F16, "F16"},
42919 {38, mips.REG_F18, "F18"},
42920 {39, mips.REG_F20, "F20"},
42921 {40, mips.REG_F22, "F22"},
42922 {41, mips.REG_F24, "F24"},
42923 {42, mips.REG_F26, "F26"},
42924 {43, mips.REG_F28, "F28"},
42925 {44, mips.REG_F30, "F30"},
42926 {45, mips.REG_HI, "HI"},
42927 {46, mips.REG_LO, "LO"},
42928 {47, 0, "SB"},
42929 }
42930 var paramIntRegMIPS = []int8(nil)
42931 var paramFloatRegMIPS = []int8(nil)
42932 var gpRegMaskMIPS = regMask(335544318)
42933 var fpRegMaskMIPS = regMask(35183835217920)
42934 var specialRegMaskMIPS = regMask(105553116266496)
42935 var framepointerRegMIPS = int8(-1)
42936 var linkRegMIPS = int8(28)
42937 var registersMIPS64 = [...]Register{
42938 {0, mips.REG_R0, "R0"},
42939 {1, mips.REG_R1, "R1"},
42940 {2, mips.REG_R2, "R2"},
42941 {3, mips.REG_R3, "R3"},
42942 {4, mips.REG_R4, "R4"},
42943 {5, mips.REG_R5, "R5"},
42944 {6, mips.REG_R6, "R6"},
42945 {7, mips.REG_R7, "R7"},
42946 {8, mips.REG_R8, "R8"},
42947 {9, mips.REG_R9, "R9"},
42948 {10, mips.REG_R10, "R10"},
42949 {11, mips.REG_R11, "R11"},
42950 {12, mips.REG_R12, "R12"},
42951 {13, mips.REG_R13, "R13"},
42952 {14, mips.REG_R14, "R14"},
42953 {15, mips.REG_R15, "R15"},
42954 {16, mips.REG_R16, "R16"},
42955 {17, mips.REG_R17, "R17"},
42956 {18, mips.REG_R18, "R18"},
42957 {19, mips.REG_R19, "R19"},
42958 {20, mips.REG_R20, "R20"},
42959 {21, mips.REG_R21, "R21"},
42960 {22, mips.REG_R22, "R22"},
42961 {23, mips.REG_R24, "R24"},
42962 {24, mips.REG_R25, "R25"},
42963 {25, mips.REGSP, "SP"},
42964 {26, mips.REGG, "g"},
42965 {27, mips.REG_R31, "R31"},
42966 {28, mips.REG_F0, "F0"},
42967 {29, mips.REG_F1, "F1"},
42968 {30, mips.REG_F2, "F2"},
42969 {31, mips.REG_F3, "F3"},
42970 {32, mips.REG_F4, "F4"},
42971 {33, mips.REG_F5, "F5"},
42972 {34, mips.REG_F6, "F6"},
42973 {35, mips.REG_F7, "F7"},
42974 {36, mips.REG_F8, "F8"},
42975 {37, mips.REG_F9, "F9"},
42976 {38, mips.REG_F10, "F10"},
42977 {39, mips.REG_F11, "F11"},
42978 {40, mips.REG_F12, "F12"},
42979 {41, mips.REG_F13, "F13"},
42980 {42, mips.REG_F14, "F14"},
42981 {43, mips.REG_F15, "F15"},
42982 {44, mips.REG_F16, "F16"},
42983 {45, mips.REG_F17, "F17"},
42984 {46, mips.REG_F18, "F18"},
42985 {47, mips.REG_F19, "F19"},
42986 {48, mips.REG_F20, "F20"},
42987 {49, mips.REG_F21, "F21"},
42988 {50, mips.REG_F22, "F22"},
42989 {51, mips.REG_F23, "F23"},
42990 {52, mips.REG_F24, "F24"},
42991 {53, mips.REG_F25, "F25"},
42992 {54, mips.REG_F26, "F26"},
42993 {55, mips.REG_F27, "F27"},
42994 {56, mips.REG_F28, "F28"},
42995 {57, mips.REG_F29, "F29"},
42996 {58, mips.REG_F30, "F30"},
42997 {59, mips.REG_F31, "F31"},
42998 {60, mips.REG_HI, "HI"},
42999 {61, mips.REG_LO, "LO"},
43000 {62, 0, "SB"},
43001 }
43002 var paramIntRegMIPS64 = []int8(nil)
43003 var paramFloatRegMIPS64 = []int8(nil)
43004 var gpRegMaskMIPS64 = regMask(167772158)
43005 var fpRegMaskMIPS64 = regMask(1152921504338411520)
43006 var specialRegMaskMIPS64 = regMask(3458764513820540928)
43007 var framepointerRegMIPS64 = int8(-1)
43008 var linkRegMIPS64 = int8(27)
43009 var registersPPC64 = [...]Register{
43010 {0, ppc64.REG_R0, "R0"},
43011 {1, ppc64.REGSP, "SP"},
43012 {2, 0, "SB"},
43013 {3, ppc64.REG_R3, "R3"},
43014 {4, ppc64.REG_R4, "R4"},
43015 {5, ppc64.REG_R5, "R5"},
43016 {6, ppc64.REG_R6, "R6"},
43017 {7, ppc64.REG_R7, "R7"},
43018 {8, ppc64.REG_R8, "R8"},
43019 {9, ppc64.REG_R9, "R9"},
43020 {10, ppc64.REG_R10, "R10"},
43021 {11, ppc64.REG_R11, "R11"},
43022 {12, ppc64.REG_R12, "R12"},
43023 {13, ppc64.REG_R13, "R13"},
43024 {14, ppc64.REG_R14, "R14"},
43025 {15, ppc64.REG_R15, "R15"},
43026 {16, ppc64.REG_R16, "R16"},
43027 {17, ppc64.REG_R17, "R17"},
43028 {18, ppc64.REG_R18, "R18"},
43029 {19, ppc64.REG_R19, "R19"},
43030 {20, ppc64.REG_R20, "R20"},
43031 {21, ppc64.REG_R21, "R21"},
43032 {22, ppc64.REG_R22, "R22"},
43033 {23, ppc64.REG_R23, "R23"},
43034 {24, ppc64.REG_R24, "R24"},
43035 {25, ppc64.REG_R25, "R25"},
43036 {26, ppc64.REG_R26, "R26"},
43037 {27, ppc64.REG_R27, "R27"},
43038 {28, ppc64.REG_R28, "R28"},
43039 {29, ppc64.REG_R29, "R29"},
43040 {30, ppc64.REGG, "g"},
43041 {31, ppc64.REG_R31, "R31"},
43042 {32, ppc64.REG_F0, "F0"},
43043 {33, ppc64.REG_F1, "F1"},
43044 {34, ppc64.REG_F2, "F2"},
43045 {35, ppc64.REG_F3, "F3"},
43046 {36, ppc64.REG_F4, "F4"},
43047 {37, ppc64.REG_F5, "F5"},
43048 {38, ppc64.REG_F6, "F6"},
43049 {39, ppc64.REG_F7, "F7"},
43050 {40, ppc64.REG_F8, "F8"},
43051 {41, ppc64.REG_F9, "F9"},
43052 {42, ppc64.REG_F10, "F10"},
43053 {43, ppc64.REG_F11, "F11"},
43054 {44, ppc64.REG_F12, "F12"},
43055 {45, ppc64.REG_F13, "F13"},
43056 {46, ppc64.REG_F14, "F14"},
43057 {47, ppc64.REG_F15, "F15"},
43058 {48, ppc64.REG_F16, "F16"},
43059 {49, ppc64.REG_F17, "F17"},
43060 {50, ppc64.REG_F18, "F18"},
43061 {51, ppc64.REG_F19, "F19"},
43062 {52, ppc64.REG_F20, "F20"},
43063 {53, ppc64.REG_F21, "F21"},
43064 {54, ppc64.REG_F22, "F22"},
43065 {55, ppc64.REG_F23, "F23"},
43066 {56, ppc64.REG_F24, "F24"},
43067 {57, ppc64.REG_F25, "F25"},
43068 {58, ppc64.REG_F26, "F26"},
43069 {59, ppc64.REG_F27, "F27"},
43070 {60, ppc64.REG_F28, "F28"},
43071 {61, ppc64.REG_F29, "F29"},
43072 {62, ppc64.REG_F30, "F30"},
43073 {63, ppc64.REG_XER, "XER"},
43074 }
43075 var paramIntRegPPC64 = []int8{3, 4, 5, 6, 7, 8, 9, 10, 14, 15, 16, 17}
43076 var paramFloatRegPPC64 = []int8{33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44}
43077 var gpRegMaskPPC64 = regMask(1073733624)
43078 var fpRegMaskPPC64 = regMask(9223372032559808512)
43079 var specialRegMaskPPC64 = regMask(9223372036854775808)
43080 var framepointerRegPPC64 = int8(-1)
43081 var linkRegPPC64 = int8(-1)
43082 var registersRISCV64 = [...]Register{
43083 {0, riscv.REG_X0, "X0"},
43084 {1, riscv.REGSP, "SP"},
43085 {2, riscv.REG_X3, "X3"},
43086 {3, riscv.REG_X4, "X4"},
43087 {4, riscv.REG_X5, "X5"},
43088 {5, riscv.REG_X6, "X6"},
43089 {6, riscv.REG_X7, "X7"},
43090 {7, riscv.REG_X8, "X8"},
43091 {8, riscv.REG_X9, "X9"},
43092 {9, riscv.REG_X10, "X10"},
43093 {10, riscv.REG_X11, "X11"},
43094 {11, riscv.REG_X12, "X12"},
43095 {12, riscv.REG_X13, "X13"},
43096 {13, riscv.REG_X14, "X14"},
43097 {14, riscv.REG_X15, "X15"},
43098 {15, riscv.REG_X16, "X16"},
43099 {16, riscv.REG_X17, "X17"},
43100 {17, riscv.REG_X18, "X18"},
43101 {18, riscv.REG_X19, "X19"},
43102 {19, riscv.REG_X20, "X20"},
43103 {20, riscv.REG_X21, "X21"},
43104 {21, riscv.REG_X22, "X22"},
43105 {22, riscv.REG_X23, "X23"},
43106 {23, riscv.REG_X24, "X24"},
43107 {24, riscv.REG_X25, "X25"},
43108 {25, riscv.REG_X26, "X26"},
43109 {26, riscv.REGG, "g"},
43110 {27, riscv.REG_X28, "X28"},
43111 {28, riscv.REG_X29, "X29"},
43112 {29, riscv.REG_X30, "X30"},
43113 {30, riscv.REG_X31, "X31"},
43114 {31, riscv.REG_F0, "F0"},
43115 {32, riscv.REG_F1, "F1"},
43116 {33, riscv.REG_F2, "F2"},
43117 {34, riscv.REG_F3, "F3"},
43118 {35, riscv.REG_F4, "F4"},
43119 {36, riscv.REG_F5, "F5"},
43120 {37, riscv.REG_F6, "F6"},
43121 {38, riscv.REG_F7, "F7"},
43122 {39, riscv.REG_F8, "F8"},
43123 {40, riscv.REG_F9, "F9"},
43124 {41, riscv.REG_F10, "F10"},
43125 {42, riscv.REG_F11, "F11"},
43126 {43, riscv.REG_F12, "F12"},
43127 {44, riscv.REG_F13, "F13"},
43128 {45, riscv.REG_F14, "F14"},
43129 {46, riscv.REG_F15, "F15"},
43130 {47, riscv.REG_F16, "F16"},
43131 {48, riscv.REG_F17, "F17"},
43132 {49, riscv.REG_F18, "F18"},
43133 {50, riscv.REG_F19, "F19"},
43134 {51, riscv.REG_F20, "F20"},
43135 {52, riscv.REG_F21, "F21"},
43136 {53, riscv.REG_F22, "F22"},
43137 {54, riscv.REG_F23, "F23"},
43138 {55, riscv.REG_F24, "F24"},
43139 {56, riscv.REG_F25, "F25"},
43140 {57, riscv.REG_F26, "F26"},
43141 {58, riscv.REG_F27, "F27"},
43142 {59, riscv.REG_F28, "F28"},
43143 {60, riscv.REG_F29, "F29"},
43144 {61, riscv.REG_F30, "F30"},
43145 {62, riscv.REG_F31, "F31"},
43146 {63, 0, "SB"},
43147 }
43148 var paramIntRegRISCV64 = []int8{9, 10, 11, 12, 13, 14, 15, 16, 7, 8, 17, 18, 19, 20, 21, 22}
43149 var paramFloatRegRISCV64 = []int8{41, 42, 43, 44, 45, 46, 47, 48, 39, 40, 49, 50, 51, 52, 53, 54}
43150 var gpRegMaskRISCV64 = regMask(1006632944)
43151 var fpRegMaskRISCV64 = regMask(9223372034707292160)
43152 var specialRegMaskRISCV64 = regMask(0)
43153 var framepointerRegRISCV64 = int8(-1)
43154 var linkRegRISCV64 = int8(0)
43155 var registersS390X = [...]Register{
43156 {0, s390x.REG_R0, "R0"},
43157 {1, s390x.REG_R1, "R1"},
43158 {2, s390x.REG_R2, "R2"},
43159 {3, s390x.REG_R3, "R3"},
43160 {4, s390x.REG_R4, "R4"},
43161 {5, s390x.REG_R5, "R5"},
43162 {6, s390x.REG_R6, "R6"},
43163 {7, s390x.REG_R7, "R7"},
43164 {8, s390x.REG_R8, "R8"},
43165 {9, s390x.REG_R9, "R9"},
43166 {10, s390x.REG_R10, "R10"},
43167 {11, s390x.REG_R11, "R11"},
43168 {12, s390x.REG_R12, "R12"},
43169 {13, s390x.REGG, "g"},
43170 {14, s390x.REG_R14, "R14"},
43171 {15, s390x.REGSP, "SP"},
43172 {16, s390x.REG_F0, "F0"},
43173 {17, s390x.REG_F1, "F1"},
43174 {18, s390x.REG_F2, "F2"},
43175 {19, s390x.REG_F3, "F3"},
43176 {20, s390x.REG_F4, "F4"},
43177 {21, s390x.REG_F5, "F5"},
43178 {22, s390x.REG_F6, "F6"},
43179 {23, s390x.REG_F7, "F7"},
43180 {24, s390x.REG_F8, "F8"},
43181 {25, s390x.REG_F9, "F9"},
43182 {26, s390x.REG_F10, "F10"},
43183 {27, s390x.REG_F11, "F11"},
43184 {28, s390x.REG_F12, "F12"},
43185 {29, s390x.REG_F13, "F13"},
43186 {30, s390x.REG_F14, "F14"},
43187 {31, s390x.REG_F15, "F15"},
43188 {32, 0, "SB"},
43189 }
43190 var paramIntRegS390X = []int8(nil)
43191 var paramFloatRegS390X = []int8(nil)
43192 var gpRegMaskS390X = regMask(23551)
43193 var fpRegMaskS390X = regMask(4294901760)
43194 var specialRegMaskS390X = regMask(0)
43195 var framepointerRegS390X = int8(-1)
43196 var linkRegS390X = int8(14)
43197 var registersWasm = [...]Register{
43198 {0, wasm.REG_R0, "R0"},
43199 {1, wasm.REG_R1, "R1"},
43200 {2, wasm.REG_R2, "R2"},
43201 {3, wasm.REG_R3, "R3"},
43202 {4, wasm.REG_R4, "R4"},
43203 {5, wasm.REG_R5, "R5"},
43204 {6, wasm.REG_R6, "R6"},
43205 {7, wasm.REG_R7, "R7"},
43206 {8, wasm.REG_R8, "R8"},
43207 {9, wasm.REG_R9, "R9"},
43208 {10, wasm.REG_R10, "R10"},
43209 {11, wasm.REG_R11, "R11"},
43210 {12, wasm.REG_R12, "R12"},
43211 {13, wasm.REG_R13, "R13"},
43212 {14, wasm.REG_R14, "R14"},
43213 {15, wasm.REG_R15, "R15"},
43214 {16, wasm.REG_F0, "F0"},
43215 {17, wasm.REG_F1, "F1"},
43216 {18, wasm.REG_F2, "F2"},
43217 {19, wasm.REG_F3, "F3"},
43218 {20, wasm.REG_F4, "F4"},
43219 {21, wasm.REG_F5, "F5"},
43220 {22, wasm.REG_F6, "F6"},
43221 {23, wasm.REG_F7, "F7"},
43222 {24, wasm.REG_F8, "F8"},
43223 {25, wasm.REG_F9, "F9"},
43224 {26, wasm.REG_F10, "F10"},
43225 {27, wasm.REG_F11, "F11"},
43226 {28, wasm.REG_F12, "F12"},
43227 {29, wasm.REG_F13, "F13"},
43228 {30, wasm.REG_F14, "F14"},
43229 {31, wasm.REG_F15, "F15"},
43230 {32, wasm.REG_F16, "F16"},
43231 {33, wasm.REG_F17, "F17"},
43232 {34, wasm.REG_F18, "F18"},
43233 {35, wasm.REG_F19, "F19"},
43234 {36, wasm.REG_F20, "F20"},
43235 {37, wasm.REG_F21, "F21"},
43236 {38, wasm.REG_F22, "F22"},
43237 {39, wasm.REG_F23, "F23"},
43238 {40, wasm.REG_F24, "F24"},
43239 {41, wasm.REG_F25, "F25"},
43240 {42, wasm.REG_F26, "F26"},
43241 {43, wasm.REG_F27, "F27"},
43242 {44, wasm.REG_F28, "F28"},
43243 {45, wasm.REG_F29, "F29"},
43244 {46, wasm.REG_F30, "F30"},
43245 {47, wasm.REG_F31, "F31"},
43246 {48, wasm.REGSP, "SP"},
43247 {49, wasm.REGG, "g"},
43248 {50, 0, "SB"},
43249 }
43250 var paramIntRegWasm = []int8(nil)
43251 var paramFloatRegWasm = []int8(nil)
43252 var gpRegMaskWasm = regMask(65535)
43253 var fpRegMaskWasm = regMask(281474976645120)
43254 var fp32RegMaskWasm = regMask(4294901760)
43255 var fp64RegMaskWasm = regMask(281470681743360)
43256 var specialRegMaskWasm = regMask(0)
43257 var framepointerRegWasm = int8(-1)
43258 var linkRegWasm = int8(-1)
43259
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