1 // Code generated by 'simdgen -o godefs -goroot $GOROOT -arch arm64 -arm64Path $ARM64_ISA_PATH go_arm64.yaml types.yaml categories.yaml'; DO NOT EDIT.
2
3 (VFCVTL4S (VDUPDextr [1] x)) => (VFCVTL2_4S x)
4 (VMOVDins0 [1] dst (VDUPDextr [0] (VFCVTN2D y))) => (VFCVTN2_2D dst y)
5 (VMOVDins0 [1] dst (VDUPDextr [0] (VSHRN2D [c] y))) => (VSHRN2_2D dst [c] y)
6 (VMOVDins0 [1] dst (VDUPDextr [0] (VSHRN4S [c] y))) => (VSHRN2_4S dst [c] y)
7 (VMOVDins0 [1] dst (VDUPDextr [0] (VSHRN8H [c] y))) => (VSHRN2_8H dst [c] y)
8 (VMOVDins0 [1] dst (VDUPDextr [0] (VSQXTN2D y))) => (VSQXTN2_2D dst y)
9 (VMOVDins0 [1] dst (VDUPDextr [0] (VSQXTN4S y))) => (VSQXTN2_4S dst y)
10 (VMOVDins0 [1] dst (VDUPDextr [0] (VSQXTN8H y))) => (VSQXTN2_8H dst y)
11 (VMOVDins0 [1] dst (VDUPDextr [0] (VSQXTUN2D y))) => (VSQXTUN2_2D dst y)
12 (VMOVDins0 [1] dst (VDUPDextr [0] (VSQXTUN4S y))) => (VSQXTUN2_4S dst y)
13 (VMOVDins0 [1] dst (VDUPDextr [0] (VSQXTUN8H y))) => (VSQXTUN2_8H dst y)
14 (VMOVDins0 [1] dst (VDUPDextr [0] (VUQXTN2D y))) => (VUQXTN2_2D dst y)
15 (VMOVDins0 [1] dst (VDUPDextr [0] (VUQXTN4S y))) => (VUQXTN2_4S dst y)
16 (VMOVDins0 [1] dst (VDUPDextr [0] (VUQXTN8H y))) => (VUQXTN2_8H dst y)
17 (VMOVDins0 [1] dst (VDUPDextr [0] (VXTN2D y))) => (VXTN2_2D dst y)
18 (VMOVDins0 [1] dst (VDUPDextr [0] (VXTN4S y))) => (VXTN2_4S dst y)
19 (VMOVDins0 [1] dst (VDUPDextr [0] (VXTN8H y))) => (VXTN2_8H dst y)
20 (VPMULL2D (VDUPDextr [1] x) (VDUPDextr [1] y)) => (VPMULL2_2D x y)
21 (VSMULL16B (VDUPDextr [1] x) (VDUPDextr [1] y)) => (VSMULL2_16B x y)
22 (VSMULL4S (VDUPDextr [1] x) (VDUPDextr [1] y)) => (VSMULL2_4S x y)
23 (VSMULL8H (VDUPDextr [1] x) (VDUPDextr [1] y)) => (VSMULL2_8H x y)
24 (VSSHLL16B [a] (VDUPDextr [1] x)) => (VSSHLL2_16B [a] x)
25 (VSSHLL4S [a] (VDUPDextr [1] x)) => (VSSHLL2_4S [a] x)
26 (VSSHLL8H [a] (VDUPDextr [1] x)) => (VSSHLL2_8H [a] x)
27 (VSXTL16B (VDUPDextr [1] x)) => (VSXTL2_16B x)
28 (VSXTL4S (VDUPDextr [1] x)) => (VSXTL2_4S x)
29 (VSXTL8H (VDUPDextr [1] x)) => (VSXTL2_8H x)
30 (VUMULL16B (VDUPDextr [1] x) (VDUPDextr [1] y)) => (VUMULL2_16B x y)
31 (VUMULL4S (VDUPDextr [1] x) (VDUPDextr [1] y)) => (VUMULL2_4S x y)
32 (VUMULL8H (VDUPDextr [1] x) (VDUPDextr [1] y)) => (VUMULL2_8H x y)
33 (VUSHLL16B [a] (VDUPDextr [1] x)) => (VUSHLL2_16B [a] x)
34 (VUSHLL4S [a] (VDUPDextr [1] x)) => (VUSHLL2_4S [a] x)
35 (VUSHLL8H [a] (VDUPDextr [1] x)) => (VUSHLL2_8H [a] x)
36 (VUXTL16B (VDUPDextr [1] x)) => (VUXTL2_16B x)
37 (VUXTL4S (VDUPDextr [1] x)) => (VUXTL2_4S x)
38 (VUXTL8H (VDUPDextr [1] x)) => (VUXTL2_8H x)
39 (AbsFloat32x4 ...) => (VFABS4S ...) // pureVreg
40 (AbsFloat64x2 ...) => (VFABS2D ...) // pureVreg
41 (AbsInt8x16 ...) => (VABS16B ...) // pureVreg
42 (AbsInt16x8 ...) => (VABS8H ...) // pureVreg
43 (AbsInt32x4 ...) => (VABS4S ...) // pureVreg
44 (AbsInt64x2 ...) => (VABS2D ...) // pureVreg
45 (AddFloat32x4 ...) => (VFADD4S ...) // pureVreg
46 (AddFloat64x2 ...) => (VFADD2D ...) // pureVreg
47 (AddInt8x16 ...) => (VADD16B ...) // pureVreg
48 (AddInt16x8 ...) => (VADD8H ...) // pureVreg
49 (AddInt32x4 ...) => (VADD4S ...) // pureVreg
50 (AddInt64x2 ...) => (VADD2D ...) // pureVreg
51 (AddUint8x16 ...) => (VADD16B ...) // pureVreg
52 (AddUint16x8 ...) => (VADD8H ...) // pureVreg
53 (AddUint32x4 ...) => (VADD4S ...) // pureVreg
54 (AddUint64x2 ...) => (VADD2D ...) // pureVreg
55 (AddSaturatedInt8x16 ...) => (VSQADD16B ...) // pureVreg
56 (AddSaturatedInt16x8 ...) => (VSQADD8H ...) // pureVreg
57 (AddSaturatedInt32x4 ...) => (VSQADD4S ...) // pureVreg
58 (AddSaturatedInt64x2 ...) => (VSQADD2D ...) // pureVreg
59 (AddSaturatedUint8x16 ...) => (VUQADD16B ...) // pureVreg
60 (AddSaturatedUint16x8 ...) => (VUQADD8H ...) // pureVreg
61 (AddSaturatedUint32x4 ...) => (VUQADD4S ...) // pureVreg
62 (AddSaturatedUint64x2 ...) => (VUQADD2D ...) // pureVreg
63 (AndInt8x16 ...) => (VAND16B ...) // pureVreg
64 (AndInt16x8 ...) => (VAND16B ...) // pureVreg
65 (AndInt32x4 ...) => (VAND16B ...) // pureVreg
66 (AndInt64x2 ...) => (VAND16B ...) // pureVreg
67 (AndUint8x16 ...) => (VAND16B ...) // pureVreg
68 (AndUint16x8 ...) => (VAND16B ...) // pureVreg
69 (AndUint32x4 ...) => (VAND16B ...) // pureVreg
70 (AndUint64x2 ...) => (VAND16B ...) // pureVreg
71 (AndNotInt8x16 ...) => (VBIC16B ...) // pureVreg
72 (AndNotInt16x8 ...) => (VBIC16B ...) // pureVreg
73 (AndNotInt32x4 ...) => (VBIC16B ...) // pureVreg
74 (AndNotInt64x2 ...) => (VBIC16B ...) // pureVreg
75 (AndNotUint8x16 ...) => (VBIC16B ...) // pureVreg
76 (AndNotUint16x8 ...) => (VBIC16B ...) // pureVreg
77 (AndNotUint32x4 ...) => (VBIC16B ...) // pureVreg
78 (AndNotUint64x2 ...) => (VBIC16B ...) // pureVreg
79 (AverageInt8x16 ...) => (VSRHADD16B ...) // pureVreg
80 (AverageInt16x8 ...) => (VSRHADD8H ...) // pureVreg
81 (AverageInt32x4 ...) => (VSRHADD4S ...) // pureVreg
82 (AverageUint8x16 ...) => (VURHADD16B ...) // pureVreg
83 (AverageUint16x8 ...) => (VURHADD8H ...) // pureVreg
84 (AverageUint32x4 ...) => (VURHADD4S ...) // pureVreg
85 (CeilFloat32x4 ...) => (VFRINTP4S ...) // pureVreg
86 (CeilFloat64x2 ...) => (VFRINTP2D ...) // pureVreg
87 (ConcatAddPairsFloat32x4 ...) => (VFADDP4S ...) // pureVreg
88 (ConcatAddPairsFloat64x2 ...) => (VFADDP2D ...) // pureVreg
89 (ConcatAddPairsInt16x8 ...) => (VADDP8H ...) // pureVreg
90 (ConcatAddPairsInt32x4 ...) => (VADDP4S ...) // pureVreg
91 (ConcatAddPairsInt64x2 ...) => (VADDP2D ...) // pureVreg
92 (ConcatAddPairsUint16x8 ...) => (VADDP8H ...) // pureVreg
93 (ConcatAddPairsUint32x4 ...) => (VADDP4S ...) // pureVreg
94 (ConcatAddPairsUint64x2 ...) => (VADDP2D ...) // pureVreg
95 (ConcatEvenInt8x16 ...) => (VUZP116B ...) // pureVreg
96 (ConcatEvenInt16x8 ...) => (VUZP18H ...) // pureVreg
97 (ConcatEvenInt32x4 ...) => (VUZP14S ...) // pureVreg
98 (ConcatEvenInt64x2 ...) => (VUZP12D ...) // pureVreg
99 (ConcatEvenUint8x16 ...) => (VUZP116B ...) // pureVreg
100 (ConcatEvenUint16x8 ...) => (VUZP18H ...) // pureVreg
101 (ConcatEvenUint32x4 ...) => (VUZP14S ...) // pureVreg
102 (ConcatEvenUint64x2 ...) => (VUZP12D ...) // pureVreg
103 (ConcatOddInt8x16 ...) => (VUZP216B ...) // pureVreg
104 (ConcatOddInt16x8 ...) => (VUZP28H ...) // pureVreg
105 (ConcatOddInt32x4 ...) => (VUZP24S ...) // pureVreg
106 (ConcatOddInt64x2 ...) => (VUZP22D ...) // pureVreg
107 (ConcatOddUint8x16 ...) => (VUZP216B ...) // pureVreg
108 (ConcatOddUint16x8 ...) => (VUZP28H ...) // pureVreg
109 (ConcatOddUint32x4 ...) => (VUZP24S ...) // pureVreg
110 (ConcatOddUint64x2 ...) => (VUZP22D ...) // pureVreg
111 (ConcatShiftBytesRightUint8x16 ...) => (VEXT16B ...) // pureVreg
112 (ConvertLo2ToFloat64Float32x4 ...) => (VFCVTL4S ...) // pureVreg
113 (ConvertToFloat32Float64x2 ...) => (VFCVTN2D ...) // pureVreg
114 (ConvertToFloat32Int32x4 ...) => (VSCVTF4S ...) // pureVreg
115 (ConvertToFloat32Uint32x4 ...) => (VUCVTF4S ...) // pureVreg
116 (ConvertToFloat64Int64x2 ...) => (VSCVTF2D ...) // pureVreg
117 (ConvertToFloat64Uint64x2 ...) => (VUCVTF2D ...) // pureVreg
118 (ConvertToInt32Float32x4 ...) => (VFCVTZS4S ...) // pureVreg
119 (ConvertToInt64Float64x2 ...) => (VFCVTZS2D ...) // pureVreg
120 (ConvertToUint32Float32x4 ...) => (VFCVTZU4S ...) // pureVreg
121 (ConvertToUint64Float64x2 ...) => (VFCVTZU2D ...) // pureVreg
122 (DivFloat32x4 ...) => (VFDIV4S ...) // pureVreg
123 (DivFloat64x2 ...) => (VFDIV2D ...) // pureVreg
124 (EqualFloat32x4 ...) => (VFCMEQ4S ...) // pureVreg
125 (EqualFloat64x2 ...) => (VFCMEQ2D ...) // pureVreg
126 (EqualInt8x16 ...) => (VCMEQ16B ...) // pureVreg
127 (EqualInt16x8 ...) => (VCMEQ8H ...) // pureVreg
128 (EqualInt32x4 ...) => (VCMEQ4S ...) // pureVreg
129 (EqualInt64x2 ...) => (VCMEQ2D ...) // pureVreg
130 (EqualUint8x16 ...) => (VCMEQ16B ...) // pureVreg
131 (EqualUint16x8 ...) => (VCMEQ8H ...) // pureVreg
132 (EqualUint32x4 ...) => (VCMEQ4S ...) // pureVreg
133 (EqualUint64x2 ...) => (VCMEQ2D ...) // pureVreg
134 (ExtendLo2ToInt64Int32x4 ...) => (VSXTL4S ...) // pureVreg
135 (ExtendLo2ToUint64Uint32x4 ...) => (VUXTL4S ...) // pureVreg
136 (ExtendLo4ToInt32Int16x8 ...) => (VSXTL8H ...) // pureVreg
137 (ExtendLo4ToUint32Uint16x8 ...) => (VUXTL8H ...) // pureVreg
138 (ExtendLo8ToInt16Int8x16 ...) => (VSXTL16B ...) // pureVreg
139 (ExtendLo8ToUint16Uint8x16 ...) => (VUXTL16B ...) // pureVreg
140 (FloorFloat32x4 ...) => (VFRINTM4S ...) // pureVreg
141 (FloorFloat64x2 ...) => (VFRINTM2D ...) // pureVreg
142 (GetElemFloat32x4 ...) => (VDUPSextr ...) // pureVreg
143 (GetElemFloat64x2 ...) => (VDUPDextr ...) // pureVreg
144 (GetElemInt8x16 ...) => (VMOVBextr ...) // pureVreg
145 (GetElemInt16x8 ...) => (VMOVHextr ...) // pureVreg
146 (GetElemInt32x4 ...) => (VMOVSextr ...) // pureVreg
147 (GetElemInt64x2 ...) => (VMOVDextr ...) // pureVreg
148 (GetElemUint8x16 ...) => (VMOVBextr ...) // pureVreg
149 (GetElemUint16x8 ...) => (VMOVHextr ...) // pureVreg
150 (GetElemUint32x4 ...) => (VMOVSextr ...) // pureVreg
151 (GetElemUint64x2 ...) => (VMOVDextr ...) // pureVreg
152 (GreaterFloat32x4 ...) => (VFCMGT4S ...) // pureVreg
153 (GreaterFloat64x2 ...) => (VFCMGT2D ...) // pureVreg
154 (GreaterInt8x16 ...) => (VCMGT16B ...) // pureVreg
155 (GreaterInt16x8 ...) => (VCMGT8H ...) // pureVreg
156 (GreaterInt32x4 ...) => (VCMGT4S ...) // pureVreg
157 (GreaterInt64x2 ...) => (VCMGT2D ...) // pureVreg
158 (GreaterUint8x16 ...) => (VCMHI16B ...) // pureVreg
159 (GreaterUint16x8 ...) => (VCMHI8H ...) // pureVreg
160 (GreaterUint32x4 ...) => (VCMHI4S ...) // pureVreg
161 (GreaterUint64x2 ...) => (VCMHI2D ...) // pureVreg
162 (GreaterEqualFloat32x4 ...) => (VFCMGE4S ...) // pureVreg
163 (GreaterEqualFloat64x2 ...) => (VFCMGE2D ...) // pureVreg
164 (GreaterEqualInt8x16 ...) => (VCMGE16B ...) // pureVreg
165 (GreaterEqualInt16x8 ...) => (VCMGE8H ...) // pureVreg
166 (GreaterEqualInt32x4 ...) => (VCMGE4S ...) // pureVreg
167 (GreaterEqualInt64x2 ...) => (VCMGE2D ...) // pureVreg
168 (GreaterEqualUint8x16 ...) => (VCMHS16B ...) // pureVreg
169 (GreaterEqualUint16x8 ...) => (VCMHS8H ...) // pureVreg
170 (GreaterEqualUint32x4 ...) => (VCMHS4S ...) // pureVreg
171 (GreaterEqualUint64x2 ...) => (VCMHS2D ...) // pureVreg
172 (InterleaveEvenInt8x16 ...) => (VTRN116B ...) // pureVreg
173 (InterleaveEvenInt16x8 ...) => (VTRN18H ...) // pureVreg
174 (InterleaveEvenInt32x4 ...) => (VTRN14S ...) // pureVreg
175 (InterleaveEvenInt64x2 ...) => (VTRN12D ...) // pureVreg
176 (InterleaveEvenUint8x16 ...) => (VTRN116B ...) // pureVreg
177 (InterleaveEvenUint16x8 ...) => (VTRN18H ...) // pureVreg
178 (InterleaveEvenUint32x4 ...) => (VTRN14S ...) // pureVreg
179 (InterleaveEvenUint64x2 ...) => (VTRN12D ...) // pureVreg
180 (InterleaveHiInt8x16 ...) => (VZIP216B ...) // pureVreg
181 (InterleaveHiInt16x8 ...) => (VZIP28H ...) // pureVreg
182 (InterleaveHiInt32x4 ...) => (VZIP24S ...) // pureVreg
183 (InterleaveHiInt64x2 ...) => (VZIP22D ...) // pureVreg
184 (InterleaveHiUint8x16 ...) => (VZIP216B ...) // pureVreg
185 (InterleaveHiUint16x8 ...) => (VZIP28H ...) // pureVreg
186 (InterleaveHiUint32x4 ...) => (VZIP24S ...) // pureVreg
187 (InterleaveHiUint64x2 ...) => (VZIP22D ...) // pureVreg
188 (InterleaveLoInt8x16 ...) => (VZIP116B ...) // pureVreg
189 (InterleaveLoInt16x8 ...) => (VZIP18H ...) // pureVreg
190 (InterleaveLoInt32x4 ...) => (VZIP14S ...) // pureVreg
191 (InterleaveLoInt64x2 ...) => (VZIP12D ...) // pureVreg
192 (InterleaveLoUint8x16 ...) => (VZIP116B ...) // pureVreg
193 (InterleaveLoUint16x8 ...) => (VZIP18H ...) // pureVreg
194 (InterleaveLoUint32x4 ...) => (VZIP14S ...) // pureVreg
195 (InterleaveLoUint64x2 ...) => (VZIP12D ...) // pureVreg
196 (InterleaveOddInt8x16 ...) => (VTRN216B ...) // pureVreg
197 (InterleaveOddInt16x8 ...) => (VTRN28H ...) // pureVreg
198 (InterleaveOddInt32x4 ...) => (VTRN24S ...) // pureVreg
199 (InterleaveOddInt64x2 ...) => (VTRN22D ...) // pureVreg
200 (InterleaveOddUint8x16 ...) => (VTRN216B ...) // pureVreg
201 (InterleaveOddUint16x8 ...) => (VTRN28H ...) // pureVreg
202 (InterleaveOddUint32x4 ...) => (VTRN24S ...) // pureVreg
203 (InterleaveOddUint64x2 ...) => (VTRN22D ...) // pureVreg
204 (LeadingSignBitsInt8x16 ...) => (VCLS16B ...) // pureVreg
205 (LeadingSignBitsInt16x8 ...) => (VCLS8H ...) // pureVreg
206 (LeadingSignBitsInt32x4 ...) => (VCLS4S ...) // pureVreg
207 (LeadingSignBitsUint8x16 ...) => (VCLS16B ...) // pureVreg
208 (LeadingSignBitsUint16x8 ...) => (VCLS8H ...) // pureVreg
209 (LeadingSignBitsUint32x4 ...) => (VCLS4S ...) // pureVreg
210 (LeadingZerosInt8x16 ...) => (VCLZ16B ...) // pureVreg
211 (LeadingZerosInt16x8 ...) => (VCLZ8H ...) // pureVreg
212 (LeadingZerosInt32x4 ...) => (VCLZ4S ...) // pureVreg
213 (LeadingZerosUint8x16 ...) => (VCLZ16B ...) // pureVreg
214 (LeadingZerosUint16x8 ...) => (VCLZ8H ...) // pureVreg
215 (LeadingZerosUint32x4 ...) => (VCLZ4S ...) // pureVreg
216 (LookupOrZeroInt8x16 ...) => (VTBL16B ...) // pureVreg
217 (LookupOrZeroUint8x16 ...) => (VTBL16B ...) // pureVreg
218 (MaxFloat32x4 ...) => (VFMAX4S ...) // pureVreg
219 (MaxFloat64x2 ...) => (VFMAX2D ...) // pureVreg
220 (MaxInt8x16 ...) => (VSMAX16B ...) // pureVreg
221 (MaxInt16x8 ...) => (VSMAX8H ...) // pureVreg
222 (MaxInt32x4 ...) => (VSMAX4S ...) // pureVreg
223 (MaxUint8x16 ...) => (VUMAX16B ...) // pureVreg
224 (MaxUint16x8 ...) => (VUMAX8H ...) // pureVreg
225 (MaxUint32x4 ...) => (VUMAX4S ...) // pureVreg
226 (MinFloat32x4 ...) => (VFMIN4S ...) // pureVreg
227 (MinFloat64x2 ...) => (VFMIN2D ...) // pureVreg
228 (MinInt8x16 ...) => (VSMIN16B ...) // pureVreg
229 (MinInt16x8 ...) => (VSMIN8H ...) // pureVreg
230 (MinInt32x4 ...) => (VSMIN4S ...) // pureVreg
231 (MinUint8x16 ...) => (VUMIN16B ...) // pureVreg
232 (MinUint16x8 ...) => (VUMIN8H ...) // pureVreg
233 (MinUint32x4 ...) => (VUMIN4S ...) // pureVreg
234 (MulFloat32x4 ...) => (VFMUL4S ...) // pureVreg
235 (MulFloat64x2 ...) => (VFMUL2D ...) // pureVreg
236 (MulInt8x16 ...) => (VMUL16B ...) // pureVreg
237 (MulInt16x8 ...) => (VMUL8H ...) // pureVreg
238 (MulInt32x4 ...) => (VMUL4S ...) // pureVreg
239 (MulUint8x16 ...) => (VMUL16B ...) // pureVreg
240 (MulUint16x8 ...) => (VMUL8H ...) // pureVreg
241 (MulUint32x4 ...) => (VMUL4S ...) // pureVreg
242 (MulAddFloat32x4 x y z) => (VFMLA4S z x y) // specialLower
243 (MulAddFloat64x2 x y z) => (VFMLA2D z x y) // specialLower
244 (MulAddInt8x16 x y z) => (VMLA16B z x y) // specialLower
245 (MulAddInt16x8 x y z) => (VMLA8H z x y) // specialLower
246 (MulAddInt32x4 x y z) => (VMLA4S z x y) // specialLower
247 (MulAddUint8x16 x y z) => (VMLA16B z x y) // specialLower
248 (MulAddUint16x8 x y z) => (VMLA8H z x y) // specialLower
249 (MulAddUint32x4 x y z) => (VMLA4S z x y) // specialLower
250 (MulWidenLoInt8x16 ...) => (VSMULL16B ...) // pureVreg
251 (MulWidenLoInt16x8 ...) => (VSMULL8H ...) // pureVreg
252 (MulWidenLoInt32x4 ...) => (VSMULL4S ...) // pureVreg
253 (MulWidenLoUint8x16 ...) => (VUMULL16B ...) // pureVreg
254 (MulWidenLoUint16x8 ...) => (VUMULL8H ...) // pureVreg
255 (MulWidenLoUint32x4 ...) => (VUMULL4S ...) // pureVreg
256 (NegFloat32x4 ...) => (VFNEG4S ...) // pureVreg
257 (NegFloat64x2 ...) => (VFNEG2D ...) // pureVreg
258 (NegInt8x16 ...) => (VNEG16B ...) // pureVreg
259 (NegInt16x8 ...) => (VNEG8H ...) // pureVreg
260 (NegInt32x4 ...) => (VNEG4S ...) // pureVreg
261 (NegInt64x2 ...) => (VNEG2D ...) // pureVreg
262 (NotInt8x16 ...) => (VNOT16B ...) // pureVreg
263 (NotInt16x8 ...) => (VNOT16B ...) // pureVreg
264 (NotInt32x4 ...) => (VNOT16B ...) // pureVreg
265 (NotInt64x2 ...) => (VNOT16B ...) // pureVreg
266 (NotUint8x16 ...) => (VNOT16B ...) // pureVreg
267 (NotUint16x8 ...) => (VNOT16B ...) // pureVreg
268 (NotUint32x4 ...) => (VNOT16B ...) // pureVreg
269 (NotUint64x2 ...) => (VNOT16B ...) // pureVreg
270 (OnesCountInt8x16 ...) => (VCNT16B ...) // pureVreg
271 (OnesCountUint8x16 ...) => (VCNT16B ...) // pureVreg
272 (OrInt8x16 ...) => (VORR16B ...) // pureVreg
273 (OrInt16x8 ...) => (VORR16B ...) // pureVreg
274 (OrInt32x4 ...) => (VORR16B ...) // pureVreg
275 (OrInt64x2 ...) => (VORR16B ...) // pureVreg
276 (OrUint8x16 ...) => (VORR16B ...) // pureVreg
277 (OrUint16x8 ...) => (VORR16B ...) // pureVreg
278 (OrUint32x4 ...) => (VORR16B ...) // pureVreg
279 (OrUint64x2 ...) => (VORR16B ...) // pureVreg
280 (OrNotInt8x16 ...) => (VORN16B ...) // pureVreg
281 (OrNotInt16x8 ...) => (VORN16B ...) // pureVreg
282 (OrNotInt32x4 ...) => (VORN16B ...) // pureVreg
283 (OrNotInt64x2 ...) => (VORN16B ...) // pureVreg
284 (OrNotUint8x16 ...) => (VORN16B ...) // pureVreg
285 (OrNotUint16x8 ...) => (VORN16B ...) // pureVreg
286 (OrNotUint32x4 ...) => (VORN16B ...) // pureVreg
287 (OrNotUint64x2 ...) => (VORN16B ...) // pureVreg
288 (RoundFloat32x4 ...) => (VFRINTN4S ...) // pureVreg
289 (RoundFloat64x2 ...) => (VFRINTN2D ...) // pureVreg
290 (SaturateToInt8Int16x8 ...) => (VSQXTN8H ...) // pureVreg
291 (SaturateToInt16Int32x4 ...) => (VSQXTN4S ...) // pureVreg
292 (SaturateToInt32Int64x2 ...) => (VSQXTN2D ...) // pureVreg
293 (SaturateToUint8Int16x8 ...) => (VSQXTUN8H ...) // pureVreg
294 (SaturateToUint8Uint16x8 ...) => (VUQXTN8H ...) // pureVreg
295 (SaturateToUint16Int32x4 ...) => (VSQXTUN4S ...) // pureVreg
296 (SaturateToUint16Uint32x4 ...) => (VUQXTN4S ...) // pureVreg
297 (SaturateToUint32Int64x2 ...) => (VSQXTUN2D ...) // pureVreg
298 (SaturateToUint32Uint64x2 ...) => (VUQXTN2D ...) // pureVreg
299 (SetElemFloat32x4 ...) => (VMOVSins0 ...) // pureVreg
300 (VMOVSins0 [0] (VMOVI16B [0]) y:(VDUPSextr [i] _)) => y // specialLower
301 (SetElemFloat64x2 ...) => (VMOVDins0 ...) // pureVreg
302 (VMOVDins0 [0] (VMOVI16B [0]) y:(VDUPDextr [i] _)) => y // specialLower
303 (SetElemInt8x16 ...) => (VMOVBins ...) // pureVreg
304 (SetElemInt16x8 ...) => (VMOVHins ...) // pureVreg
305 (SetElemInt32x4 ...) => (VMOVSins ...) // pureVreg
306 (SetElemInt64x2 ...) => (VMOVDins ...) // pureVreg
307 (SetElemUint8x16 ...) => (VMOVBins ...) // pureVreg
308 (SetElemUint16x8 ...) => (VMOVHins ...) // pureVreg
309 (SetElemUint32x4 ...) => (VMOVSins ...) // pureVreg
310 (SetElemUint64x2 ...) => (VMOVDins ...) // pureVreg
311 (ShiftInt8x16 ...) => (VSSHL16B ...) // pureVreg
312 (ShiftInt16x8 ...) => (VSSHL8H ...) // pureVreg
313 (ShiftInt32x4 ...) => (VSSHL4S ...) // pureVreg
314 (ShiftInt64x2 ...) => (VSSHL2D ...) // pureVreg
315 (ShiftUint8x16 ...) => (VUSHL16B ...) // pureVreg
316 (ShiftUint16x8 ...) => (VUSHL8H ...) // pureVreg
317 (ShiftUint32x4 ...) => (VUSHL4S ...) // pureVreg
318 (ShiftUint64x2 ...) => (VUSHL2D ...) // pureVreg
319 (ShiftAllLeftInt8x16 x y) => (VSSHL16B x (VDUPBbcast [0] (VMOVBins [0] x (CSEL <typ.UInt64> [OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))) // specialLower
320 (ShiftAllLeftInt16x8 x y) => (VSSHL8H x (VDUPHbcast [0] (VMOVHins [0] x (CSEL <typ.UInt64> [OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))) // specialLower
321 (ShiftAllLeftInt32x4 x y) => (VSSHL4S x (VDUPSbcast [0] (VMOVSins [0] x (CSEL <typ.UInt64> [OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))) // specialLower
322 (ShiftAllLeftInt64x2 x y) => (VSSHL2D x (VDUPDbcast [0] (VMOVDins [0] x (CSEL <typ.UInt64> [OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))) // specialLower
323 (ShiftAllLeftUint8x16 x y) => (VUSHL16B x (VDUPBbcast [0] (VMOVBins [0] x (CSEL <typ.UInt64> [OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))) // specialLower
324 (ShiftAllLeftUint16x8 x y) => (VUSHL8H x (VDUPHbcast [0] (VMOVHins [0] x (CSEL <typ.UInt64> [OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))) // specialLower
325 (ShiftAllLeftUint32x4 x y) => (VUSHL4S x (VDUPSbcast [0] (VMOVSins [0] x (CSEL <typ.UInt64> [OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))) // specialLower
326 (ShiftAllLeftUint64x2 x y) => (VUSHL2D x (VDUPDbcast [0] (VMOVDins [0] x (CSEL <typ.UInt64> [OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))) // specialLower
327 (ShiftAllRightInt8x16 x y) => (VSSHL16B x (VDUPBbcast [0] (VMOVBins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))) // specialLower
328 (ShiftAllRightInt16x8 x y) => (VSSHL8H x (VDUPHbcast [0] (VMOVHins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))) // specialLower
329 (ShiftAllRightInt32x4 x y) => (VSSHL4S x (VDUPSbcast [0] (VMOVSins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))) // specialLower
330 (ShiftAllRightInt64x2 x y) => (VSSHL2D x (VDUPDbcast [0] (VMOVDins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))) // specialLower
331 (ShiftAllRightUint8x16 x y) => (VUSHL16B x (VDUPBbcast [0] (VMOVBins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))) // specialLower
332 (ShiftAllRightUint16x8 x y) => (VUSHL8H x (VDUPHbcast [0] (VMOVHins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))) // specialLower
333 (ShiftAllRightUint32x4 x y) => (VUSHL4S x (VDUPSbcast [0] (VMOVSins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))) // specialLower
334 (ShiftAllRightUint64x2 x y) => (VUSHL2D x (VDUPDbcast [0] (VMOVDins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))) // specialLower
335 (ShiftSaturatedInt8x16 ...) => (VSQSHL16B ...) // pureVreg
336 (ShiftSaturatedInt16x8 ...) => (VSQSHL8H ...) // pureVreg
337 (ShiftSaturatedInt32x4 ...) => (VSQSHL4S ...) // pureVreg
338 (ShiftSaturatedInt64x2 ...) => (VSQSHL2D ...) // pureVreg
339 (ShiftSaturatedUint8x16 ...) => (VUQSHL16B ...) // pureVreg
340 (ShiftSaturatedUint16x8 ...) => (VUQSHL8H ...) // pureVreg
341 (ShiftSaturatedUint32x4 ...) => (VUQSHL4S ...) // pureVreg
342 (ShiftSaturatedUint64x2 ...) => (VUQSHL2D ...) // pureVreg
343 (SqrtFloat32x4 ...) => (VFSQRT4S ...) // pureVreg
344 (SqrtFloat64x2 ...) => (VFSQRT2D ...) // pureVreg
345 (SubFloat32x4 ...) => (VFSUB4S ...) // pureVreg
346 (SubFloat64x2 ...) => (VFSUB2D ...) // pureVreg
347 (SubInt8x16 ...) => (VSUB16B ...) // pureVreg
348 (SubInt16x8 ...) => (VSUB8H ...) // pureVreg
349 (SubInt32x4 ...) => (VSUB4S ...) // pureVreg
350 (SubInt64x2 ...) => (VSUB2D ...) // pureVreg
351 (SubUint8x16 ...) => (VSUB16B ...) // pureVreg
352 (SubUint16x8 ...) => (VSUB8H ...) // pureVreg
353 (SubUint32x4 ...) => (VSUB4S ...) // pureVreg
354 (SubUint64x2 ...) => (VSUB2D ...) // pureVreg
355 (SubSaturatedInt8x16 ...) => (VSQSUB16B ...) // pureVreg
356 (SubSaturatedInt16x8 ...) => (VSQSUB8H ...) // pureVreg
357 (SubSaturatedInt32x4 ...) => (VSQSUB4S ...) // pureVreg
358 (SubSaturatedInt64x2 ...) => (VSQSUB2D ...) // pureVreg
359 (SubSaturatedUint8x16 ...) => (VUQSUB16B ...) // pureVreg
360 (SubSaturatedUint16x8 ...) => (VUQSUB8H ...) // pureVreg
361 (SubSaturatedUint32x4 ...) => (VUQSUB4S ...) // pureVreg
362 (SubSaturatedUint64x2 ...) => (VUQSUB2D ...) // pureVreg
363 (TruncFloat32x4 ...) => (VFRINTZ4S ...) // pureVreg
364 (TruncFloat64x2 ...) => (VFRINTZ2D ...) // pureVreg
365 (TruncToInt8Int16x8 ...) => (VXTN8H ...) // pureVreg
366 (TruncToInt16Int32x4 ...) => (VXTN4S ...) // pureVreg
367 (TruncToInt32Int64x2 ...) => (VXTN2D ...) // pureVreg
368 (TruncToUint8Uint16x8 ...) => (VXTN8H ...) // pureVreg
369 (TruncToUint16Uint32x4 ...) => (VXTN4S ...) // pureVreg
370 (TruncToUint32Uint64x2 ...) => (VXTN2D ...) // pureVreg
371 (XorInt8x16 ...) => (VEOR16B ...) // pureVreg
372 (XorInt16x8 ...) => (VEOR16B ...) // pureVreg
373 (XorInt32x4 ...) => (VEOR16B ...) // pureVreg
374 (XorInt64x2 ...) => (VEOR16B ...) // pureVreg
375 (XorUint8x16 ...) => (VEOR16B ...) // pureVreg
376 (XorUint16x8 ...) => (VEOR16B ...) // pureVreg
377 (XorUint32x4 ...) => (VEOR16B ...) // pureVreg
378 (XorUint64x2 ...) => (VEOR16B ...) // pureVreg
379 (bitSelectInt8x16 ...) => (VBIT16B ...) // pureVreg
380 (VBIT16B x y (VNOT16B mask)) => (VBIF16B x y mask) // specialLower
381 (bitSelectNotInt8x16 ...) => (VBIF16B ...) // pureVreg
382 (VBIF16B x y (VNOT16B mask)) => (VBIT16B x y mask) // specialLower
383 (broadcast1To2Float64x2 x) => (VDUPDbcast [0] x) // pureVreg
384 (broadcast1To2Int64x2 x) => (VDUPDbcast [0] x) // pureVreg
385 (broadcast1To2Uint64x2 x) => (VDUPDbcast [0] x) // pureVreg
386 (broadcast1To4Float32x4 x) => (VDUPSbcast [0] x) // pureVreg
387 (broadcast1To4Int32x4 x) => (VDUPSbcast [0] x) // pureVreg
388 (broadcast1To4Uint32x4 x) => (VDUPSbcast [0] x) // pureVreg
389 (broadcast1To8Int16x8 x) => (VDUPHbcast [0] x) // pureVreg
390 (broadcast1To8Uint16x8 x) => (VDUPHbcast [0] x) // pureVreg
391 (broadcast1To16Int8x16 x) => (VDUPBbcast [0] x) // pureVreg
392 (VDUPBbcast [i] (VMOVBins [j] _ (MOVDconst [c]))) && i == j && c>=-128 && c<=255 => (VMOVI16B [uint8(c)]) // specialLower
393 (broadcast1To16Uint8x16 x) => (VDUPBbcast [0] x) // pureVreg
394 (carrylessMultiplyWidenLoUint64x2 ...) => (VPMULL2D ...) // pureVreg
395 (reduceMaxFloat32x4 ...) => (VFMAXV4S ...) // pureVreg
396 (reduceMaxInt8x16 ...) => (VSMAXV16B ...) // pureVreg
397 (reduceMaxInt16x8 ...) => (VSMAXV8H ...) // pureVreg
398 (reduceMaxInt32x4 ...) => (VSMAXV4S ...) // pureVreg
399 (reduceMaxUint8x16 ...) => (VUMAXV16B ...) // pureVreg
400 (reduceMaxUint16x8 ...) => (VUMAXV8H ...) // pureVreg
401 (reduceMaxUint32x4 ...) => (VUMAXV4S ...) // pureVreg
402 (reduceMinFloat32x4 ...) => (VFMINV4S ...) // pureVreg
403 (reduceMinInt8x16 ...) => (VSMINV16B ...) // pureVreg
404 (reduceMinInt16x8 ...) => (VSMINV8H ...) // pureVreg
405 (reduceMinInt32x4 ...) => (VSMINV4S ...) // pureVreg
406 (reduceMinUint8x16 ...) => (VUMINV16B ...) // pureVreg
407 (reduceMinUint16x8 ...) => (VUMINV8H ...) // pureVreg
408 (reduceMinUint32x4 ...) => (VUMINV4S ...) // pureVreg
409 (reduceSumInt8x16 ...) => (VADDV16B ...) // pureVreg
410 (reduceSumInt16x8 ...) => (VADDV8H ...) // pureVreg
411 (reduceSumInt32x4 ...) => (VADDV4S ...) // pureVreg
412 (reduceSumUint8x16 ...) => (VADDV16B ...) // pureVreg
413 (reduceSumUint16x8 ...) => (VADDV8H ...) // pureVreg
414 (reduceSumUint32x4 ...) => (VADDV4S ...) // pureVreg
415 (VSHL16B [a] x) && a==0 => x // asmRule
416 (VSHL8H [a] x) && a==0 => x // asmRule
417 (VSHL4S [a] x) && a==0 => x // asmRule
418 (VSHL2D [a] x) && a==0 => x // asmRule
419 (VSSHR16B [a] x) && a==0 => x // asmRule
420 (VSSHR8H [a] x) && a==0 => x // asmRule
421 (VSSHR4S [a] x) && a==0 => x // asmRule
422 (VSSHR2D [a] x) && a==0 => x // asmRule
423 (VUSHR16B [a] x) && a==0 => x // asmRule
424 (VUSHR8H [a] x) && a==0 => x // asmRule
425 (VUSHR4S [a] x) && a==0 => x // asmRule
426 (VUSHR2D [a] x) && a==0 => x // asmRule
427 (VSQSHL16Bconst [a] x) && a==0 => x // asmRule
428 (VSQSHL8Hconst [a] x) && a==0 => x // asmRule
429 (VSQSHL4Sconst [a] x) && a==0 => x // asmRule
430 (VSQSHL2Dconst [a] x) && a==0 => x // asmRule
431 (VUQSHL16Bconst [a] x) && a==0 => x // asmRule
432 (VUQSHL8Hconst [a] x) && a==0 => x // asmRule
433 (VUQSHL4Sconst [a] x) && a==0 => x // asmRule
434 (VUQSHL2Dconst [a] x) && a==0 => x // asmRule
435 (VSHRN8H [0] x) => (VXTN8H x) // specialLower
436 (VSHRN4S [0] x) => (VXTN4S x) // specialLower
437 (VSHRN2D [0] x) => (VXTN2D x) // specialLower
438
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