1
2
3
4
5 package loong64
6
7 import (
8 "cmd/internal/obj"
9 )
10
11 var oprrrr = map[obj.As]uint32{
12 AFMADDF: 0x81 << 20,
13 AFMADDD: 0x82 << 20,
14 AFMSUBF: 0x85 << 20,
15 AFMSUBD: 0x86 << 20,
16 AFNMADDF: 0x89 << 20,
17 AFNMADDD: 0x8a << 20,
18 AFNMSUBF: 0x8d << 20,
19 AFNMSUBD: 0x8e << 20,
20 AVSHUFB: 0x0d5 << 20,
21 AXVSHUFB: 0x0d6 << 20,
22 }
23
24 var oprrr = map[obj.As]uint32{
25 AADD: 0x20 << 15,
26 AADDW: 0x20 << 15,
27 AADDV: 0x21 << 15,
28 AADDVU: 0x21 << 15,
29 ASUB: 0x22 << 15,
30 ASUBW: 0x22 << 15,
31 ANEGW: 0x22 << 15,
32 ASUBV: 0x23 << 15,
33 ASUBVU: 0x23 << 15,
34 ANEGV: 0x23 << 15,
35 ASGT: 0x24 << 15,
36 ASGTU: 0x25 << 15,
37 AMASKEQZ: 0x26 << 15,
38 AMASKNEZ: 0x27 << 15,
39 ASCQ: 0x070AE << 15,
40 ANOR: 0x28 << 15,
41 AAND: 0x29 << 15,
42 AOR: 0x2a << 15,
43 AXOR: 0x2b << 15,
44 AORN: 0x2c << 15,
45 AANDN: 0x2d << 15,
46 ASLL: 0x2e << 15,
47 ASRL: 0x2f << 15,
48 ASRA: 0x30 << 15,
49 ASLLV: 0x31 << 15,
50 ASRLV: 0x32 << 15,
51 ASRAV: 0x33 << 15,
52 AROTR: 0x36 << 15,
53 AROTRV: 0x37 << 15,
54 AMUL: 0x38 << 15,
55 AMULW: 0x38 << 15,
56 AMULH: 0x39 << 15,
57 AMULHU: 0x3a << 15,
58 AMULV: 0x3b << 15,
59 AMULVU: 0x3b << 15,
60 AMULHV: 0x3c << 15,
61 AMULHVU: 0x3d << 15,
62 AMULWVW: 0x3e << 15,
63 AMULWVWU: 0x3f << 15,
64 ADIV: 0x40 << 15,
65 ADIVW: 0x40 << 15,
66 AREM: 0x41 << 15,
67 AREMW: 0x41 << 15,
68 ADIVU: 0x42 << 15,
69 ADIVWU: 0x42 << 15,
70 AREMU: 0x43 << 15,
71 AREMWU: 0x43 << 15,
72 ADIVV: 0x44 << 15,
73 AREMV: 0x45 << 15,
74 ADIVVU: 0x46 << 15,
75 AREMVU: 0x47 << 15,
76 ACRCWBW: 0x48 << 15,
77 ACRCWHW: 0x49 << 15,
78 ACRCWWW: 0x4a << 15,
79 ACRCWVW: 0x4b << 15,
80 ACRCCWBW: 0x4c << 15,
81 ACRCCWHW: 0x4d << 15,
82 ACRCCWWW: 0x4e << 15,
83 ACRCCWVW: 0x4f << 15,
84 AJMP: 0x13 << 26,
85 AJAL: 0x13<<26 | 1<<0,
86 AMULF: 0x209 << 15,
87 AMULD: 0x20a << 15,
88 ADIVF: 0x20d << 15,
89 ADIVD: 0x20e << 15,
90 ASUBF: 0x205 << 15,
91 ASUBD: 0x206 << 15,
92 AADDF: 0x201 << 15,
93 AADDD: 0x202 << 15,
94 ACMPEQF: 0x0c1<<20 | 0x4<<15,
95 ACMPEQD: 0x0c2<<20 | 0x4<<15,
96 ACMPGED: 0x0c2<<20 | 0x7<<15,
97 ACMPGEF: 0x0c1<<20 | 0x7<<15,
98 ACMPGTD: 0x0c2<<20 | 0x3<<15,
99 ACMPGTF: 0x0c1<<20 | 0x3<<15,
100 AFMINF: 0x215 << 15,
101 AFMIND: 0x216 << 15,
102 AFMAXF: 0x211 << 15,
103 AFMAXD: 0x212 << 15,
104 AFMAXAF: 0x219 << 15,
105 AFMAXAD: 0x21a << 15,
106 AFMINAF: 0x21d << 15,
107 AFMINAD: 0x21e << 15,
108 AFSCALEBF: 0x221 << 15,
109 AFSCALEBD: 0x222 << 15,
110 AFCOPYSGF: 0x225 << 15,
111 AFCOPYSGD: 0x226 << 15,
112 -AMOVB: 0x07000 << 15,
113 -AMOVH: 0x07008 << 15,
114 -AMOVW: 0x07010 << 15,
115 -AMOVV: 0x07018 << 15,
116 -AMOVBU: 0x07040 << 15,
117 -AMOVHU: 0x07048 << 15,
118 -AMOVWU: 0x07050 << 15,
119 AMOVB: 0x07020 << 15,
120 AMOVH: 0x07028 << 15,
121 AMOVW: 0x07030 << 15,
122 AMOVV: 0x07038 << 15,
123 -AMOVF: 0x07060 << 15,
124 -AMOVD: 0x07068 << 15,
125 AMOVF: 0x07070 << 15,
126 AMOVD: 0x07078 << 15,
127 -AVMOVQ: 0x07080 << 15,
128 -AXVMOVQ: 0x07090 << 15,
129 AVMOVQ: 0x07088 << 15,
130 AXVMOVQ: 0x07098 << 15,
131 AVSEQB: 0x0e000 << 15,
132 AXVSEQB: 0x0e800 << 15,
133 AVSEQH: 0x0e001 << 15,
134 AXVSEQH: 0x0e801 << 15,
135 AVSEQW: 0x0e002 << 15,
136 AXVSEQW: 0x0e802 << 15,
137 AVSEQV: 0x0e003 << 15,
138 AXVSEQV: 0x0e803 << 15,
139 AVSLTB: 0x0e00c << 15,
140 AVSLTH: 0x0e00d << 15,
141 AVSLTW: 0x0e00e << 15,
142 AVSLTV: 0x0e00f << 15,
143 AVSLTBU: 0x0e010 << 15,
144 AVSLTHU: 0x0e011 << 15,
145 AVSLTWU: 0x0e012 << 15,
146 AVSLTVU: 0x0e013 << 15,
147 AXVSLTB: 0x0e80c << 15,
148 AXVSLTH: 0x0e80d << 15,
149 AXVSLTW: 0x0e80e << 15,
150 AXVSLTV: 0x0e80f << 15,
151 AXVSLTBU: 0x0e810 << 15,
152 AXVSLTHU: 0x0e811 << 15,
153 AXVSLTWU: 0x0e812 << 15,
154 AXVSLTVU: 0x0e813 << 15,
155 AVANDV: 0x0e24c << 15,
156 AVORV: 0x0e24d << 15,
157 AVXORV: 0x0e24e << 15,
158 AVNORV: 0x0e24f << 15,
159 AVANDNV: 0x0e250 << 15,
160 AVORNV: 0x0e251 << 15,
161 AXVANDV: 0x0ea4c << 15,
162 AXVORV: 0x0ea4d << 15,
163 AXVXORV: 0x0ea4e << 15,
164 AXVNORV: 0x0ea4f << 15,
165 AXVANDNV: 0x0ea50 << 15,
166 AXVORNV: 0x0ea51 << 15,
167 AVDIVB: 0xe1c0 << 15,
168 AVDIVH: 0xe1c1 << 15,
169 AVDIVW: 0xe1c2 << 15,
170 AVDIVV: 0xe1c3 << 15,
171 AVMODB: 0xe1c4 << 15,
172 AVMODH: 0xe1c5 << 15,
173 AVMODW: 0xe1c6 << 15,
174 AVMODV: 0xe1c7 << 15,
175 AVDIVBU: 0xe1c8 << 15,
176 AVDIVHU: 0xe1c9 << 15,
177 AVDIVWU: 0xe1ca << 15,
178 AVDIVVU: 0xe1cb << 15,
179 AVMODBU: 0xe1cc << 15,
180 AVMODHU: 0xe1cd << 15,
181 AVMODWU: 0xe1ce << 15,
182 AVMODVU: 0xe1cf << 15,
183 AXVDIVB: 0xe9c0 << 15,
184 AXVDIVH: 0xe9c1 << 15,
185 AXVDIVW: 0xe9c2 << 15,
186 AXVDIVV: 0xe9c3 << 15,
187 AXVMODB: 0xe9c4 << 15,
188 AXVMODH: 0xe9c5 << 15,
189 AXVMODW: 0xe9c6 << 15,
190 AXVMODV: 0xe9c7 << 15,
191 AXVDIVBU: 0xe9c8 << 15,
192 AXVDIVHU: 0xe9c9 << 15,
193 AXVDIVWU: 0xe9ca << 15,
194 AXVDIVVU: 0xe9cb << 15,
195 AXVMODBU: 0xe9cc << 15,
196 AXVMODHU: 0xe9cd << 15,
197 AXVMODWU: 0xe9ce << 15,
198 AXVMODVU: 0xe9cf << 15,
199 AVMULWEVHB: 0xe120 << 15,
200 AVMULWEVWH: 0xe121 << 15,
201 AVMULWEVVW: 0xe122 << 15,
202 AVMULWEVQV: 0xe123 << 15,
203 AVMULWODHB: 0xe124 << 15,
204 AVMULWODWH: 0xe125 << 15,
205 AVMULWODVW: 0xe126 << 15,
206 AVMULWODQV: 0xe127 << 15,
207 AVMULWEVHBU: 0xe130 << 15,
208 AVMULWEVWHU: 0xe131 << 15,
209 AVMULWEVVWU: 0xe132 << 15,
210 AVMULWEVQVU: 0xe133 << 15,
211 AVMULWODHBU: 0xe134 << 15,
212 AVMULWODWHU: 0xe135 << 15,
213 AVMULWODVWU: 0xe136 << 15,
214 AVMULWODQVU: 0xe137 << 15,
215 AVMULWEVHBUB: 0xe140 << 15,
216 AVMULWEVWHUH: 0xe141 << 15,
217 AVMULWEVVWUW: 0xe142 << 15,
218 AVMULWEVQVUV: 0xe143 << 15,
219 AVMULWODHBUB: 0xe144 << 15,
220 AVMULWODWHUH: 0xe145 << 15,
221 AVMULWODVWUW: 0xe146 << 15,
222 AVMULWODQVUV: 0xe147 << 15,
223 AXVMULWEVHB: 0xe920 << 15,
224 AXVMULWEVWH: 0xe921 << 15,
225 AXVMULWEVVW: 0xe922 << 15,
226 AXVMULWEVQV: 0xe923 << 15,
227 AXVMULWODHB: 0xe924 << 15,
228 AXVMULWODWH: 0xe925 << 15,
229 AXVMULWODVW: 0xe926 << 15,
230 AXVMULWODQV: 0xe927 << 15,
231 AXVMULWEVHBU: 0xe930 << 15,
232 AXVMULWEVWHU: 0xe931 << 15,
233 AXVMULWEVVWU: 0xe932 << 15,
234 AXVMULWEVQVU: 0xe933 << 15,
235 AXVMULWODHBU: 0xe934 << 15,
236 AXVMULWODWHU: 0xe935 << 15,
237 AXVMULWODVWU: 0xe936 << 15,
238 AXVMULWODQVU: 0xe937 << 15,
239 AXVMULWEVHBUB: 0xe940 << 15,
240 AXVMULWEVWHUH: 0xe941 << 15,
241 AXVMULWEVVWUW: 0xe942 << 15,
242 AXVMULWEVQVUV: 0xe943 << 15,
243 AXVMULWODHBUB: 0xe944 << 15,
244 AXVMULWODWHUH: 0xe945 << 15,
245 AXVMULWODVWUW: 0xe946 << 15,
246 AXVMULWODQVUV: 0xe947 << 15,
247 AVADDWEVHB: 0x0e03c << 15,
248 AVADDWEVWH: 0x0e03d << 15,
249 AVADDWEVVW: 0x0e03e << 15,
250 AVADDWEVQV: 0x0e03f << 15,
251 AVSUBWEVHB: 0x0e040 << 15,
252 AVSUBWEVWH: 0x0e041 << 15,
253 AVSUBWEVVW: 0x0e042 << 15,
254 AVSUBWEVQV: 0x0e043 << 15,
255 AVADDWODHB: 0x0e044 << 15,
256 AVADDWODWH: 0x0e045 << 15,
257 AVADDWODVW: 0x0e046 << 15,
258 AVADDWODQV: 0x0e047 << 15,
259 AVSUBWODHB: 0x0e048 << 15,
260 AVSUBWODWH: 0x0e049 << 15,
261 AVSUBWODVW: 0x0e04a << 15,
262 AVSUBWODQV: 0x0e04b << 15,
263 AXVADDWEVHB: 0x0e83c << 15,
264 AXVADDWEVWH: 0x0e83d << 15,
265 AXVADDWEVVW: 0x0e83e << 15,
266 AXVADDWEVQV: 0x0e83f << 15,
267 AXVSUBWEVHB: 0x0e840 << 15,
268 AXVSUBWEVWH: 0x0e841 << 15,
269 AXVSUBWEVVW: 0x0e842 << 15,
270 AXVSUBWEVQV: 0x0e843 << 15,
271 AXVADDWODHB: 0x0e844 << 15,
272 AXVADDWODWH: 0x0e845 << 15,
273 AXVADDWODVW: 0x0e846 << 15,
274 AXVADDWODQV: 0x0e847 << 15,
275 AXVSUBWODHB: 0x0e848 << 15,
276 AXVSUBWODWH: 0x0e849 << 15,
277 AXVSUBWODVW: 0x0e84a << 15,
278 AXVSUBWODQV: 0x0e84b << 15,
279 AVADDWEVHBU: 0x0e05c << 15,
280 AVADDWEVWHU: 0x0e05d << 15,
281 AVADDWEVVWU: 0x0e05e << 15,
282 AVADDWEVQVU: 0x0e05f << 15,
283 AVSUBWEVHBU: 0x0e060 << 15,
284 AVSUBWEVWHU: 0x0e061 << 15,
285 AVSUBWEVVWU: 0x0e062 << 15,
286 AVSUBWEVQVU: 0x0e063 << 15,
287 AVADDWODHBU: 0x0e064 << 15,
288 AVADDWODWHU: 0x0e065 << 15,
289 AVADDWODVWU: 0x0e066 << 15,
290 AVADDWODQVU: 0x0e067 << 15,
291 AVSUBWODHBU: 0x0e068 << 15,
292 AVSUBWODWHU: 0x0e069 << 15,
293 AVSUBWODVWU: 0x0e06a << 15,
294 AVSUBWODQVU: 0x0e06b << 15,
295 AXVADDWEVHBU: 0x0e85c << 15,
296 AXVADDWEVWHU: 0x0e85d << 15,
297 AXVADDWEVVWU: 0x0e85e << 15,
298 AXVADDWEVQVU: 0x0e85f << 15,
299 AXVSUBWEVHBU: 0x0e860 << 15,
300 AXVSUBWEVWHU: 0x0e861 << 15,
301 AXVSUBWEVVWU: 0x0e862 << 15,
302 AXVSUBWEVQVU: 0x0e863 << 15,
303 AXVADDWODHBU: 0x0e864 << 15,
304 AXVADDWODWHU: 0x0e865 << 15,
305 AXVADDWODVWU: 0x0e866 << 15,
306 AXVADDWODQVU: 0x0e867 << 15,
307 AXVSUBWODHBU: 0x0e868 << 15,
308 AXVSUBWODWHU: 0x0e869 << 15,
309 AXVSUBWODVWU: 0x0e86a << 15,
310 AXVSUBWODQVU: 0x0e86b << 15,
311 AVMADDB: 0x0e150 << 15,
312 AVMADDH: 0x0e151 << 15,
313 AVMADDW: 0x0e152 << 15,
314 AVMADDV: 0x0e153 << 15,
315 AVMSUBB: 0x0e154 << 15,
316 AVMSUBH: 0x0e155 << 15,
317 AVMSUBW: 0x0e156 << 15,
318 AVMSUBV: 0x0e157 << 15,
319 AXVMADDB: 0x0e950 << 15,
320 AXVMADDH: 0x0e951 << 15,
321 AXVMADDW: 0x0e952 << 15,
322 AXVMADDV: 0x0e953 << 15,
323 AXVMSUBB: 0x0e954 << 15,
324 AXVMSUBH: 0x0e955 << 15,
325 AXVMSUBW: 0x0e956 << 15,
326 AXVMSUBV: 0x0e957 << 15,
327 AVMADDWEVHB: 0x0e158 << 15,
328 AVMADDWEVWH: 0x0e159 << 15,
329 AVMADDWEVVW: 0x0e15a << 15,
330 AVMADDWEVQV: 0x0e15b << 15,
331 AVMADDWODHB: 0x0e15c << 15,
332 AVMADDWODWH: 0x0e15d << 15,
333 AVMADDWODVW: 0x0e15e << 15,
334 AVMADDWODQV: 0x0e15f << 15,
335 AVMADDWEVHBU: 0x0e168 << 15,
336 AVMADDWEVWHU: 0x0e169 << 15,
337 AVMADDWEVVWU: 0x0e16a << 15,
338 AVMADDWEVQVU: 0x0e16b << 15,
339 AVMADDWODHBU: 0x0e16c << 15,
340 AVMADDWODWHU: 0x0e16d << 15,
341 AVMADDWODVWU: 0x0e16e << 15,
342 AVMADDWODQVU: 0x0e16f << 15,
343 AVMADDWEVHBUB: 0x0e178 << 15,
344 AVMADDWEVWHUH: 0x0e179 << 15,
345 AVMADDWEVVWUW: 0x0e17a << 15,
346 AVMADDWEVQVUV: 0x0e17b << 15,
347 AVMADDWODHBUB: 0x0e17c << 15,
348 AVMADDWODWHUH: 0x0e17d << 15,
349 AVMADDWODVWUW: 0x0e17e << 15,
350 AVMADDWODQVUV: 0x0e17f << 15,
351 AXVMADDWEVHB: 0x0e958 << 15,
352 AXVMADDWEVWH: 0x0e959 << 15,
353 AXVMADDWEVVW: 0x0e95a << 15,
354 AXVMADDWEVQV: 0x0e95b << 15,
355 AXVMADDWODHB: 0x0e95c << 15,
356 AXVMADDWODWH: 0x0e95d << 15,
357 AXVMADDWODVW: 0x0e95e << 15,
358 AXVMADDWODQV: 0x0e95f << 15,
359 AXVMADDWEVHBU: 0x0e968 << 15,
360 AXVMADDWEVWHU: 0x0e969 << 15,
361 AXVMADDWEVVWU: 0x0e96a << 15,
362 AXVMADDWEVQVU: 0x0e96b << 15,
363 AXVMADDWODHBU: 0x0e96c << 15,
364 AXVMADDWODWHU: 0x0e96d << 15,
365 AXVMADDWODVWU: 0x0e96e << 15,
366 AXVMADDWODQVU: 0x0e96f << 15,
367 AXVMADDWEVHBUB: 0x0e978 << 15,
368 AXVMADDWEVWHUH: 0x0e979 << 15,
369 AXVMADDWEVVWUW: 0x0e97a << 15,
370 AXVMADDWEVQVUV: 0x0e97b << 15,
371 AXVMADDWODHBUB: 0x0e97c << 15,
372 AXVMADDWODWHUH: 0x0e97d << 15,
373 AXVMADDWODVWUW: 0x0e97e << 15,
374 AXVMADDWODQVUV: 0x0e97f << 15,
375 AVSLLB: 0xe1d0 << 15,
376 AVSLLH: 0xe1d1 << 15,
377 AVSLLW: 0xe1d2 << 15,
378 AVSLLV: 0xe1d3 << 15,
379 AVSRLB: 0xe1d4 << 15,
380 AVSRLH: 0xe1d5 << 15,
381 AVSRLW: 0xe1d6 << 15,
382 AVSRLV: 0xe1d7 << 15,
383 AVSRAB: 0xe1d8 << 15,
384 AVSRAH: 0xe1d9 << 15,
385 AVSRAW: 0xe1da << 15,
386 AVSRAV: 0xe1db << 15,
387 AVROTRB: 0xe1dc << 15,
388 AVROTRH: 0xe1dd << 15,
389 AVROTRW: 0xe1de << 15,
390 AVROTRV: 0xe1df << 15,
391 AXVSLLB: 0xe9d0 << 15,
392 AXVSLLH: 0xe9d1 << 15,
393 AXVSLLW: 0xe9d2 << 15,
394 AXVSLLV: 0xe9d3 << 15,
395 AXVSRLB: 0xe9d4 << 15,
396 AXVSRLH: 0xe9d5 << 15,
397 AXVSRLW: 0xe9d6 << 15,
398 AXVSRLV: 0xe9d7 << 15,
399 AXVSRAB: 0xe9d8 << 15,
400 AXVSRAH: 0xe9d9 << 15,
401 AXVSRAW: 0xe9da << 15,
402 AXVSRAV: 0xe9db << 15,
403 AXVROTRB: 0xe9dc << 15,
404 AXVROTRH: 0xe9dd << 15,
405 AXVROTRW: 0xe9de << 15,
406 AXVROTRV: 0xe9df << 15,
407 AVADDB: 0xe014 << 15,
408 AVADDH: 0xe015 << 15,
409 AVADDW: 0xe016 << 15,
410 AVADDV: 0xe017 << 15,
411 AVADDQ: 0xe25a << 15,
412 AVSUBB: 0xe018 << 15,
413 AVSUBH: 0xe019 << 15,
414 AVSUBW: 0xe01a << 15,
415 AVSUBV: 0xe01b << 15,
416 AVSUBQ: 0xe25b << 15,
417 AXVADDB: 0xe814 << 15,
418 AXVADDH: 0xe815 << 15,
419 AXVADDW: 0xe816 << 15,
420 AXVADDV: 0xe817 << 15,
421 AXVADDQ: 0xea5a << 15,
422 AXVSUBB: 0xe818 << 15,
423 AXVSUBH: 0xe819 << 15,
424 AXVSUBW: 0xe81a << 15,
425 AXVSUBV: 0xe81b << 15,
426 AXVSUBQ: 0xea5b << 15,
427 AVSADDB: 0x0e08c << 15,
428 AVSADDH: 0x0e08d << 15,
429 AVSADDW: 0x0e08e << 15,
430 AVSADDV: 0x0e08f << 15,
431 AVSSUBB: 0x0e090 << 15,
432 AVSSUBH: 0x0e091 << 15,
433 AVSSUBW: 0x0e092 << 15,
434 AVSSUBV: 0x0e093 << 15,
435 AVSADDBU: 0x0e094 << 15,
436 AVSADDHU: 0x0e095 << 15,
437 AVSADDWU: 0x0e096 << 15,
438 AVSADDVU: 0x0e097 << 15,
439 AVSSUBBU: 0x0e098 << 15,
440 AVSSUBHU: 0x0e099 << 15,
441 AVSSUBWU: 0x0e09a << 15,
442 AVSSUBVU: 0x0e09b << 15,
443 AXVSADDB: 0x0e88c << 15,
444 AXVSADDH: 0x0e88d << 15,
445 AXVSADDW: 0x0e88e << 15,
446 AXVSADDV: 0x0e88f << 15,
447 AXVSSUBB: 0x0e890 << 15,
448 AXVSSUBH: 0x0e891 << 15,
449 AXVSSUBW: 0x0e892 << 15,
450 AXVSSUBV: 0x0e893 << 15,
451 AXVSADDBU: 0x0e894 << 15,
452 AXVSADDHU: 0x0e895 << 15,
453 AXVSADDWU: 0x0e896 << 15,
454 AXVSADDVU: 0x0e897 << 15,
455 AXVSSUBBU: 0x0e898 << 15,
456 AXVSSUBHU: 0x0e899 << 15,
457 AXVSSUBWU: 0x0e89a << 15,
458 AXVSSUBVU: 0x0e89b << 15,
459 AVILVLB: 0xe234 << 15,
460 AVILVLH: 0xe235 << 15,
461 AVILVLW: 0xe236 << 15,
462 AVILVLV: 0xe237 << 15,
463 AVILVHB: 0xe238 << 15,
464 AVILVHH: 0xe239 << 15,
465 AVILVHW: 0xe23a << 15,
466 AVILVHV: 0xe23b << 15,
467 AXVILVLB: 0xea34 << 15,
468 AXVILVLH: 0xea35 << 15,
469 AXVILVLW: 0xea36 << 15,
470 AXVILVLV: 0xea37 << 15,
471 AXVILVHB: 0xea38 << 15,
472 AXVILVHH: 0xea39 << 15,
473 AXVILVHW: 0xea3a << 15,
474 AXVILVHV: 0xea3b << 15,
475 AVMULB: 0xe108 << 15,
476 AVMULH: 0xe109 << 15,
477 AVMULW: 0xe10a << 15,
478 AVMULV: 0xe10b << 15,
479 AVMUHB: 0xe10c << 15,
480 AVMUHH: 0xe10d << 15,
481 AVMUHW: 0xe10e << 15,
482 AVMUHV: 0xe10f << 15,
483 AVMUHBU: 0xe110 << 15,
484 AVMUHHU: 0xe111 << 15,
485 AVMUHWU: 0xe112 << 15,
486 AVMUHVU: 0xe113 << 15,
487 AXVMULB: 0xe908 << 15,
488 AXVMULH: 0xe909 << 15,
489 AXVMULW: 0xe90a << 15,
490 AXVMULV: 0xe90b << 15,
491 AXVMUHB: 0xe90c << 15,
492 AXVMUHH: 0xe90d << 15,
493 AXVMUHW: 0xe90e << 15,
494 AXVMUHV: 0xe90f << 15,
495 AXVMUHBU: 0xe910 << 15,
496 AXVMUHHU: 0xe911 << 15,
497 AXVMUHWU: 0xe912 << 15,
498 AXVMUHVU: 0xe913 << 15,
499 AVADDF: 0xe261 << 15,
500 AVADDD: 0xe262 << 15,
501 AVSUBF: 0xe265 << 15,
502 AVSUBD: 0xe266 << 15,
503 AVMULF: 0xe271 << 15,
504 AVMULD: 0xe272 << 15,
505 AVDIVF: 0xe275 << 15,
506 AVDIVD: 0xe276 << 15,
507 AXVADDF: 0xea61 << 15,
508 AXVADDD: 0xea62 << 15,
509 AXVSUBF: 0xea65 << 15,
510 AXVSUBD: 0xea66 << 15,
511 AXVMULF: 0xea71 << 15,
512 AXVMULD: 0xea72 << 15,
513 AXVDIVF: 0xea75 << 15,
514 AXVDIVD: 0xea76 << 15,
515 AVBITCLRB: 0xe218 << 15,
516 AVBITCLRH: 0xe219 << 15,
517 AVBITCLRW: 0xe21a << 15,
518 AVBITCLRV: 0xe21b << 15,
519 AVBITSETB: 0xe21c << 15,
520 AVBITSETH: 0xe21d << 15,
521 AVBITSETW: 0xe21e << 15,
522 AVBITSETV: 0xe21f << 15,
523 AVBITREVB: 0xe220 << 15,
524 AVBITREVH: 0xe221 << 15,
525 AVBITREVW: 0xe222 << 15,
526 AVBITREVV: 0xe223 << 15,
527 AXVBITCLRB: 0xea18 << 15,
528 AXVBITCLRH: 0xea19 << 15,
529 AXVBITCLRW: 0xea1a << 15,
530 AXVBITCLRV: 0xea1b << 15,
531 AXVBITSETB: 0xea1c << 15,
532 AXVBITSETH: 0xea1d << 15,
533 AXVBITSETW: 0xea1e << 15,
534 AXVBITSETV: 0xea1f << 15,
535 AXVBITREVB: 0xea20 << 15,
536 AXVBITREVH: 0xea21 << 15,
537 AXVBITREVW: 0xea22 << 15,
538 AXVBITREVV: 0xea23 << 15,
539 AVSHUFH: 0x0e2f5 << 15,
540 AVSHUFW: 0x0e2f6 << 15,
541 AVSHUFV: 0x0e2f7 << 15,
542 AXVSHUFH: 0x0eaf5 << 15,
543 AXVSHUFW: 0x0eaf6 << 15,
544 AXVSHUFV: 0x0eaf7 << 15,
545 }
546
547 var oprr = map[obj.As]uint32{
548 ACLOW: 0x4 << 10,
549 ACLZW: 0x5 << 10,
550 ACTOW: 0x6 << 10,
551 ACTZW: 0x7 << 10,
552 ACLOV: 0x8 << 10,
553 ACLZV: 0x9 << 10,
554 ACTOV: 0xa << 10,
555 ACTZV: 0xb << 10,
556 AREVB2H: 0xc << 10,
557 AREVB4H: 0xd << 10,
558 AREVB2W: 0xe << 10,
559 AREVBV: 0xf << 10,
560 AREVH2W: 0x10 << 10,
561 AREVHV: 0x11 << 10,
562 ABITREV4B: 0x12 << 10,
563 ABITREV8B: 0x13 << 10,
564 ABITREVW: 0x14 << 10,
565 ABITREVV: 0x15 << 10,
566 AEXTWH: 0x16 << 10,
567 AEXTWB: 0x17 << 10,
568 ACPUCFG: 0x1b << 10,
569 ARDTIMELW: 0x18 << 10,
570 ARDTIMEHW: 0x19 << 10,
571 ARDTIMED: 0x1a << 10,
572 ALLACQW: 0x0E15E0 << 10,
573 ASCRELW: 0x0E15E1 << 10,
574 ALLACQV: 0x0E15E2 << 10,
575 ASCRELV: 0x0E15E3 << 10,
576 ATRUNCFV: 0x46a9 << 10,
577 ATRUNCDV: 0x46aa << 10,
578 ATRUNCFW: 0x46a1 << 10,
579 ATRUNCDW: 0x46a2 << 10,
580 AMOVWF: 0x4744 << 10,
581 AFFINTFW: 0x4744 << 10,
582 AMOVVF: 0x4746 << 10,
583 AFFINTFV: 0x4746 << 10,
584 AMOVWD: 0x4748 << 10,
585 AFFINTDW: 0x4748 << 10,
586 AMOVVD: 0x474a << 10,
587 AFFINTDV: 0x474a << 10,
588 AMOVFW: 0x46c1 << 10,
589 AFTINTWF: 0x46c1 << 10,
590 AMOVDW: 0x46c2 << 10,
591 AFTINTWD: 0x46c2 << 10,
592 AMOVFV: 0x46c9 << 10,
593 AFTINTVF: 0x46c9 << 10,
594 AMOVDV: 0x46ca << 10,
595 AFTINTVD: 0x46ca << 10,
596 AFRINTF: 0x4791 << 10,
597 AFRINTD: 0x4792 << 10,
598 AMOVDF: 0x4646 << 10,
599 AMOVFD: 0x4649 << 10,
600 AABSF: 0x4501 << 10,
601 AABSD: 0x4502 << 10,
602 AMOVF: 0x4525 << 10,
603 AMOVD: 0x4526 << 10,
604 ANEGF: 0x4505 << 10,
605 ANEGD: 0x4506 << 10,
606 ASQRTF: 0x4511 << 10,
607 ASQRTD: 0x4512 << 10,
608 AFLOGBF: 0x4509 << 10,
609 AFLOGBD: 0x450a << 10,
610 AFCLASSF: 0x450d << 10,
611 AFCLASSD: 0x450e << 10,
612 AFTINTRMWF: 0x4681 << 10,
613 AFTINTRMWD: 0x4682 << 10,
614 AFTINTRMVF: 0x4689 << 10,
615 AFTINTRMVD: 0x468a << 10,
616 AFTINTRPWF: 0x4691 << 10,
617 AFTINTRPWD: 0x4692 << 10,
618 AFTINTRPVF: 0x4699 << 10,
619 AFTINTRPVD: 0x469a << 10,
620 AFTINTRZWF: 0x46a1 << 10,
621 AFTINTRZWD: 0x46a2 << 10,
622 AFTINTRZVF: 0x46a9 << 10,
623 AFTINTRZVD: 0x46aa << 10,
624 AFTINTRNEWF: 0x46b1 << 10,
625 AFTINTRNEWD: 0x46b2 << 10,
626 AFTINTRNEVF: 0x46b9 << 10,
627 AFTINTRNEVD: 0x46ba << 10,
628 AVPCNTB: 0x1ca708 << 10,
629 AVPCNTH: 0x1ca709 << 10,
630 AVPCNTW: 0x1ca70a << 10,
631 AVPCNTV: 0x1ca70b << 10,
632 AXVPCNTB: 0x1da708 << 10,
633 AXVPCNTH: 0x1da709 << 10,
634 AXVPCNTW: 0x1da70a << 10,
635 AXVPCNTV: 0x1da70b << 10,
636 AVFSQRTF: 0x1ca739 << 10,
637 AVFSQRTD: 0x1ca73a << 10,
638 AVFRECIPF: 0x1ca73d << 10,
639 AVFRECIPD: 0x1ca73e << 10,
640 AVFRSQRTF: 0x1ca741 << 10,
641 AVFRSQRTD: 0x1ca742 << 10,
642 AXVFSQRTF: 0x1da739 << 10,
643 AXVFSQRTD: 0x1da73a << 10,
644 AXVFRECIPF: 0x1da73d << 10,
645 AXVFRECIPD: 0x1da73e << 10,
646 AXVFRSQRTF: 0x1da741 << 10,
647 AXVFRSQRTD: 0x1da742 << 10,
648 AVNEGB: 0x1ca70c << 10,
649 AVNEGH: 0x1ca70d << 10,
650 AVNEGW: 0x1ca70e << 10,
651 AVNEGV: 0x1ca70f << 10,
652 AXVNEGB: 0x1da70c << 10,
653 AXVNEGH: 0x1da70d << 10,
654 AXVNEGW: 0x1da70e << 10,
655 AXVNEGV: 0x1da70f << 10,
656 AVFRINTRNEF: 0x1ca75d << 10,
657 AVFRINTRNED: 0x1ca75e << 10,
658 AVFRINTRZF: 0x1ca759 << 10,
659 AVFRINTRZD: 0x1ca75a << 10,
660 AVFRINTRPF: 0x1ca755 << 10,
661 AVFRINTRPD: 0x1ca756 << 10,
662 AVFRINTRMF: 0x1ca751 << 10,
663 AVFRINTRMD: 0x1ca752 << 10,
664 AVFRINTF: 0x1ca74d << 10,
665 AVFRINTD: 0x1ca74e << 10,
666 AXVFRINTRNEF: 0x1da75d << 10,
667 AXVFRINTRNED: 0x1da75e << 10,
668 AXVFRINTRZF: 0x1da759 << 10,
669 AXVFRINTRZD: 0x1da75a << 10,
670 AXVFRINTRPF: 0x1da755 << 10,
671 AXVFRINTRPD: 0x1da756 << 10,
672 AXVFRINTRMF: 0x1da751 << 10,
673 AXVFRINTRMD: 0x1da752 << 10,
674 AXVFRINTF: 0x1da74d << 10,
675 AXVFRINTD: 0x1da74e << 10,
676 AVFCLASSF: 0x1ca735 << 10,
677 AVFCLASSD: 0x1ca736 << 10,
678 AXVFCLASSF: 0x1da735 << 10,
679 AXVFCLASSD: 0x1da736 << 10,
680 AVSETEQV: 0x1ca726<<10 | 0x0<<3,
681 AVSETNEV: 0x1ca727<<10 | 0x0<<3,
682 AVSETANYEQB: 0x1ca728<<10 | 0x0<<3,
683 AVSETANYEQH: 0x1ca729<<10 | 0x0<<3,
684 AVSETANYEQW: 0x1ca72a<<10 | 0x0<<3,
685 AVSETANYEQV: 0x1ca72b<<10 | 0x0<<3,
686 AVSETALLNEB: 0x1ca72c<<10 | 0x0<<3,
687 AVSETALLNEH: 0x1ca72d<<10 | 0x0<<3,
688 AVSETALLNEW: 0x1ca72e<<10 | 0x0<<3,
689 AVSETALLNEV: 0x1ca72f<<10 | 0x0<<3,
690 AXVSETEQV: 0x1da726<<10 | 0x0<<3,
691 AXVSETNEV: 0x1da727<<10 | 0x0<<3,
692 AXVSETANYEQB: 0x1da728<<10 | 0x0<<3,
693 AXVSETANYEQH: 0x1da729<<10 | 0x0<<3,
694 AXVSETANYEQW: 0x1da72a<<10 | 0x0<<3,
695 AXVSETANYEQV: 0x1da72b<<10 | 0x0<<3,
696 AXVSETALLNEB: 0x1da72c<<10 | 0x0<<3,
697 AXVSETALLNEH: 0x1da72d<<10 | 0x0<<3,
698 AXVSETALLNEW: 0x1da72e<<10 | 0x0<<3,
699 AXVSETALLNEV: 0x1da72f<<10 | 0x0<<3,
700 }
701
702 var opi = map[obj.As]uint32{
703 ASYSCALL: 0x56 << 15,
704 ABREAK: 0x54 << 15,
705 ADBAR: 0x70e4 << 15,
706 }
707
708 var opir = map[obj.As]uint32{
709 ALU12IW: 0x0a << 25,
710 ALU32ID: 0x0b << 25,
711 APCALAU12I: 0x0d << 25,
712 APCADDU12I: 0x0e << 25,
713 }
714
715 var opirr = map[obj.As]uint32{
716 ASGT: 0x008 << 22,
717 ASGTU: 0x009 << 22,
718 AADD: 0x00a << 22,
719 AADDW: 0x00a << 22,
720 AADDV: 0x00b << 22,
721 AADDVU: 0x00b << 22,
722 ALU52ID: 0x00c << 22,
723 AAND: 0x00d << 22,
724 AOR: 0x00e << 22,
725 AXOR: 0x00f << 22,
726 ASLL: 0x00081 << 15,
727 ASRL: 0x00089 << 15,
728 ASRA: 0x00091 << 15,
729 AROTR: 0x00099 << 15,
730 AADDV16: 0x4 << 26,
731 -ABEQ: 0x10 << 26,
732 -ABNE: 0x11 << 26,
733 AJIRL: 0x13 << 26,
734 AJMP: 0x14 << 26,
735 AJAL: 0x15 << 26,
736 ABEQ: 0x16 << 26,
737 ABNE: 0x17 << 26,
738 ABLT: 0x18 << 26,
739 ABLTZ: 0x18 << 26,
740 ABGTZ: 0x18 << 26,
741 ABGE: 0x19 << 26,
742 ABGEZ: 0x19 << 26,
743 ABLEZ: 0x19 << 26,
744 ABLTU: 0x1a << 26,
745 ABGEU: 0x1b << 26,
746 ABFPT: 0x12<<26 | 0x1<<8,
747 ABFPF: 0x12<<26 | 0x0<<8,
748 APRELDX: 0x07058 << 15,
749 -AMOVB: 0x0a0 << 22,
750 -AMOVH: 0x0a1 << 22,
751 -AMOVW: 0x0a2 << 22,
752 -AMOVV: 0x0a3 << 22,
753 AMOVB: 0x0a4 << 22,
754 AMOVBU: 0x0a4 << 22,
755 AMOVH: 0x0a5 << 22,
756 AMOVHU: 0x0a5 << 22,
757 AMOVW: 0x0a6 << 22,
758 AMOVWU: 0x0a6 << 22,
759 AMOVV: 0x0a7 << 22,
760 -AMOVBU: 0x0a8 << 22,
761 -AMOVHU: 0x0a9 << 22,
762 -AMOVWU: 0x0aa << 22,
763 -AMOVF: 0x0ac << 22,
764 AMOVF: 0x0ad << 22,
765 -AMOVD: 0x0ae << 22,
766 AMOVD: 0x0af << 22,
767 -ALL: 0x020 << 24,
768 -ALLW: 0x020 << 24,
769 ASC: 0x021 << 24,
770 ASCW: 0x021 << 24,
771 -ALLV: 0x022 << 24,
772 ASCV: 0x023 << 24,
773 -AMOVWP: 0x24 << 24,
774 AMOVWP: 0x25 << 24,
775 -AMOVVP: 0x26 << 24,
776 AMOVVP: 0x27 << 24,
777 -AVMOVQ: 0x0b0 << 22,
778 AVMOVQ: 0x0b1 << 22,
779 -AXVMOVQ: 0x0b2 << 22,
780 AXVMOVQ: 0x0b3 << 22,
781 ASLLV: 0x0041 << 16,
782 ASRLV: 0x0045 << 16,
783 ASRAV: 0x0049 << 16,
784 AROTRV: 0x004d << 16,
785 AVANDB: 0x1cf4 << 18,
786 AVORB: 0x1cf5 << 18,
787 AVXORB: 0x1cf6 << 18,
788 AVNORB: 0x1cf7 << 18,
789 AXVANDB: 0x1df4 << 18,
790 AXVORB: 0x1df5 << 18,
791 AXVXORB: 0x1df6 << 18,
792 AXVNORB: 0x1df7 << 18,
793 AVSEQB: 0x0e500 << 15,
794 AVSEQH: 0x0e501 << 15,
795 AVSEQW: 0x0e502 << 15,
796 AVSEQV: 0x0e503 << 15,
797 AXVSEQB: 0x0ed00 << 15,
798 AXVSEQH: 0x0ed01 << 15,
799 AXVSEQW: 0x0ed02 << 15,
800 AXVSEQV: 0x0ed03 << 15,
801 AVSLTB: 0x0e50c << 15,
802 AVSLTH: 0x0e50d << 15,
803 AVSLTW: 0x0e50e << 15,
804 AVSLTV: 0x0e50f << 15,
805 AVSLTBU: 0x0e510 << 15,
806 AVSLTHU: 0x0e511 << 15,
807 AVSLTWU: 0x0e512 << 15,
808 AVSLTVU: 0x0e513 << 15,
809 AXVSLTB: 0x0ed0c << 15,
810 AXVSLTH: 0x0ed0d << 15,
811 AXVSLTW: 0x0ed0e << 15,
812 AXVSLTV: 0x0ed0f << 15,
813 AXVSLTBU: 0x0ed10 << 15,
814 AXVSLTHU: 0x0ed11 << 15,
815 AXVSLTWU: 0x0ed12 << 15,
816 AXVSLTVU: 0x0ed13 << 15,
817 AVROTRB: 0x1ca8<<18 | 0x1<<13,
818 AVROTRH: 0x1ca8<<18 | 0x1<<14,
819 AVROTRW: 0x1ca8<<18 | 0x1<<15,
820 AVROTRV: 0x1ca8<<18 | 0x1<<16,
821 AXVROTRB: 0x1da8<<18 | 0x1<<13,
822 AXVROTRH: 0x1da8<<18 | 0x1<<14,
823 AXVROTRW: 0x1da8<<18 | 0x1<<15,
824 AXVROTRV: 0x1da8<<18 | 0x1<<16,
825 AVSLLB: 0x1ccb<<18 | 0x1<<13,
826 AVSLLH: 0x1ccb<<18 | 0x1<<14,
827 AVSLLW: 0x1ccb<<18 | 0x1<<15,
828 AVSLLV: 0x1ccb<<18 | 0x1<<16,
829 AVSRLB: 0x1ccc<<18 | 0x1<<13,
830 AVSRLH: 0x1ccc<<18 | 0x1<<14,
831 AVSRLW: 0x1ccc<<18 | 0x1<<15,
832 AVSRLV: 0x1ccc<<18 | 0x1<<16,
833 AVSRAB: 0x1ccd<<18 | 0x1<<13,
834 AVSRAH: 0x1ccd<<18 | 0x1<<14,
835 AVSRAW: 0x1ccd<<18 | 0x1<<15,
836 AVSRAV: 0x1ccd<<18 | 0x1<<16,
837 AXVSLLB: 0x1dcb<<18 | 0x1<<13,
838 AXVSLLH: 0x1dcb<<18 | 0x1<<14,
839 AXVSLLW: 0x1dcb<<18 | 0x1<<15,
840 AXVSLLV: 0x1dcb<<18 | 0x1<<16,
841 AXVSRLB: 0x1dcc<<18 | 0x1<<13,
842 AXVSRLH: 0x1dcc<<18 | 0x1<<14,
843 AXVSRLW: 0x1dcc<<18 | 0x1<<15,
844 AXVSRLV: 0x1dcc<<18 | 0x1<<16,
845 AXVSRAB: 0x1dcd<<18 | 0x1<<13,
846 AXVSRAH: 0x1dcd<<18 | 0x1<<14,
847 AXVSRAW: 0x1dcd<<18 | 0x1<<15,
848 AXVSRAV: 0x1dcd<<18 | 0x1<<16,
849 AVADDBU: 0xe514 << 15,
850 AVADDHU: 0xe515 << 15,
851 AVADDWU: 0xe516 << 15,
852 AVADDVU: 0xe517 << 15,
853 AVSUBBU: 0xe518 << 15,
854 AVSUBHU: 0xe519 << 15,
855 AVSUBWU: 0xe51a << 15,
856 AVSUBVU: 0xe51b << 15,
857 AXVADDBU: 0xed14 << 15,
858 AXVADDHU: 0xed15 << 15,
859 AXVADDWU: 0xed16 << 15,
860 AXVADDVU: 0xed17 << 15,
861 AXVSUBBU: 0xed18 << 15,
862 AXVSUBHU: 0xed19 << 15,
863 AXVSUBWU: 0xed1a << 15,
864 AXVSUBVU: 0xed1b << 15,
865 AVSHUF4IB: 0x1ce4 << 18,
866 AVSHUF4IH: 0x1ce5 << 18,
867 AVSHUF4IW: 0x1ce6 << 18,
868 AVSHUF4IV: 0x1ce7 << 18,
869 AXVSHUF4IB: 0x1de4 << 18,
870 AXVSHUF4IH: 0x1de5 << 18,
871 AXVSHUF4IW: 0x1de6 << 18,
872 AXVSHUF4IV: 0x1de7 << 18,
873 AVPERMIW: 0x1cf9 << 18,
874 AXVPERMIW: 0x1df9 << 18,
875 AXVPERMIV: 0x1dfa << 18,
876 AXVPERMIQ: 0x1dfb << 18,
877 AVEXTRINSB: 0x1ce3 << 18,
878 AVEXTRINSH: 0x1ce2 << 18,
879 AVEXTRINSW: 0x1ce1 << 18,
880 AVEXTRINSV: 0x1ce0 << 18,
881 AXVEXTRINSB: 0x1de3 << 18,
882 AXVEXTRINSH: 0x1de2 << 18,
883 AXVEXTRINSW: 0x1de1 << 18,
884 AXVEXTRINSV: 0x1de0 << 18,
885 AVBITCLRB: 0x1cc4<<18 | 0x1<<13,
886 AVBITCLRH: 0x1cc4<<18 | 0x1<<14,
887 AVBITCLRW: 0x1cc4<<18 | 0x1<<15,
888 AVBITCLRV: 0x1cc4<<18 | 0x1<<16,
889 AVBITSETB: 0x1cc5<<18 | 0x1<<13,
890 AVBITSETH: 0x1cc5<<18 | 0x1<<14,
891 AVBITSETW: 0x1cc5<<18 | 0x1<<15,
892 AVBITSETV: 0x1cc5<<18 | 0x1<<16,
893 AVBITREVB: 0x1cc6<<18 | 0x1<<13,
894 AVBITREVH: 0x1cc6<<18 | 0x1<<14,
895 AVBITREVW: 0x1cc6<<18 | 0x1<<15,
896 AVBITREVV: 0x1cc6<<18 | 0x1<<16,
897 AXVBITCLRB: 0x1dc4<<18 | 0x1<<13,
898 AXVBITCLRH: 0x1dc4<<18 | 0x1<<14,
899 AXVBITCLRW: 0x1dc4<<18 | 0x1<<15,
900 AXVBITCLRV: 0x1dc4<<18 | 0x1<<16,
901 AXVBITSETB: 0x1dc5<<18 | 0x1<<13,
902 AXVBITSETH: 0x1dc5<<18 | 0x1<<14,
903 AXVBITSETW: 0x1dc5<<18 | 0x1<<15,
904 AXVBITSETV: 0x1dc5<<18 | 0x1<<16,
905 AXVBITREVB: 0x1dc6<<18 | 0x1<<13,
906 AXVBITREVH: 0x1dc6<<18 | 0x1<<14,
907 AXVBITREVW: 0x1dc6<<18 | 0x1<<15,
908 AXVBITREVV: 0x1dc6<<18 | 0x1<<16,
909 }
910
911 var opirrr = map[obj.As]uint32{
912 AALSLW: 0x2 << 17,
913 AALSLWU: 0x3 << 17,
914 AALSLV: 0x16 << 17,
915 }
916
917 var opirir = map[obj.As]uint32{
918 ABSTRINSW: 0x3<<21 | 0x0<<15,
919 ABSTRINSV: 0x2 << 22,
920 ABSTRPICKW: 0x3<<21 | 0x1<<15,
921 ABSTRPICKV: 0x3 << 22,
922 }
923
924 var opiir = map[obj.As]uint32{
925 APRELD: 0x0ab << 22,
926 }
927
928 var atomicInst = map[obj.As]uint32{
929 AAMSWAPB: 0x070B8 << 15,
930 AAMSWAPH: 0x070B9 << 15,
931 AAMSWAPW: 0x070C0 << 15,
932 AAMSWAPV: 0x070C1 << 15,
933 AAMCASB: 0x070B0 << 15,
934 AAMCASH: 0x070B1 << 15,
935 AAMCASW: 0x070B2 << 15,
936 AAMCASV: 0x070B3 << 15,
937 AAMADDW: 0x070C2 << 15,
938 AAMADDV: 0x070C3 << 15,
939 AAMANDW: 0x070C4 << 15,
940 AAMANDV: 0x070C5 << 15,
941 AAMORW: 0x070C6 << 15,
942 AAMORV: 0x070C7 << 15,
943 AAMXORW: 0x070C8 << 15,
944 AAMXORV: 0x070C9 << 15,
945 AAMMAXW: 0x070CA << 15,
946 AAMMAXV: 0x070CB << 15,
947 AAMMINW: 0x070CC << 15,
948 AAMMINV: 0x070CD << 15,
949 AAMMAXWU: 0x070CE << 15,
950 AAMMAXVU: 0x070CF << 15,
951 AAMMINWU: 0x070D0 << 15,
952 AAMMINVU: 0x070D1 << 15,
953 AAMSWAPDBB: 0x070BC << 15,
954 AAMSWAPDBH: 0x070BD << 15,
955 AAMSWAPDBW: 0x070D2 << 15,
956 AAMSWAPDBV: 0x070D3 << 15,
957 AAMCASDBB: 0x070B4 << 15,
958 AAMCASDBH: 0x070B5 << 15,
959 AAMCASDBW: 0x070B6 << 15,
960 AAMCASDBV: 0x070B7 << 15,
961 AAMADDDBW: 0x070D4 << 15,
962 AAMADDDBV: 0x070D5 << 15,
963 AAMANDDBW: 0x070D6 << 15,
964 AAMANDDBV: 0x070D7 << 15,
965 AAMORDBW: 0x070D8 << 15,
966 AAMORDBV: 0x070D9 << 15,
967 AAMXORDBW: 0x070DA << 15,
968 AAMXORDBV: 0x070DB << 15,
969 AAMMAXDBW: 0x070DC << 15,
970 AAMMAXDBV: 0x070DD << 15,
971 AAMMINDBW: 0x070DE << 15,
972 AAMMINDBV: 0x070DF << 15,
973 AAMMAXDBWU: 0x070E0 << 15,
974 AAMMAXDBVU: 0x070E1 << 15,
975 AAMMINDBWU: 0x070E2 << 15,
976 AAMMINDBVU: 0x070E3 << 15,
977 }
978
979 func (c *ctxt0) specialFpMovInst(a obj.As, fclass int, tclass int) uint32 {
980 switch a {
981 case AMOVV:
982 switch fclass {
983 case C_REG:
984 switch tclass {
985 case C_FREG:
986 return 0x452a << 10
987 case C_FCCREG:
988 return 0x4536 << 10
989 case C_FCSRREG:
990 return 0x4530 << 10
991 }
992 case C_FREG:
993 switch tclass {
994 case C_REG:
995 return 0x452e << 10
996 case C_FCCREG:
997 return 0x4534 << 10
998 }
999 case C_FCCREG:
1000 switch tclass {
1001 case C_REG:
1002 return 0x4537 << 10
1003 case C_FREG:
1004 return 0x4535 << 10
1005 }
1006 case C_FCSRREG:
1007 switch tclass {
1008 case C_REG:
1009 return 0x4532 << 10
1010 }
1011 }
1012
1013 case AMOVW:
1014 switch fclass {
1015 case C_REG:
1016 switch tclass {
1017 case C_FREG:
1018 return 0x4529 << 10
1019 }
1020 case C_FREG:
1021 switch tclass {
1022 case C_REG:
1023 return 0x452d << 10
1024 }
1025 }
1026 }
1027
1028 c.ctxt.Diag("bad class combination: %s %d,%d\n", a, fclass, tclass)
1029
1030 return 0
1031 }
1032
1033 func (c *ctxt0) specialLsxMovInst(a obj.As, fReg, tReg int16, offset_flag bool) (op_code, index_mask uint32) {
1034 farng := (fReg >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK
1035 tarng := (tReg >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK
1036 fclass := c.rclass(fReg)
1037 tclass := c.rclass(tReg)
1038
1039 switch fclass | (tclass << 16) {
1040 case C_REG | (C_ELEM << 16):
1041
1042 switch a {
1043 case AVMOVQ:
1044 switch tarng {
1045 case ARNG_B:
1046 return (0x01CBAE << 14), 0xf
1047 case ARNG_H:
1048 return (0x03975E << 13), 0x7
1049 case ARNG_W:
1050 return (0x072EBE << 12), 0x3
1051 case ARNG_V:
1052 return (0x0E5D7E << 11), 0x1
1053 }
1054 case AXVMOVQ:
1055 switch tarng {
1056 case ARNG_W:
1057 return (0x03B75E << 13), 0x7
1058 case ARNG_V:
1059 return (0x076EBE << 12), 0x3
1060 }
1061 }
1062
1063 case C_ELEM | (C_REG << 16):
1064
1065 switch a {
1066 case AVMOVQ:
1067 switch farng {
1068 case ARNG_B:
1069 return (0x01CBBE << 14), 0xf
1070 case ARNG_H:
1071 return (0x03977E << 13), 0x7
1072 case ARNG_W:
1073 return (0x072EFE << 12), 0x3
1074 case ARNG_V:
1075 return (0x0E5DFE << 11), 0x1
1076 case ARNG_BU:
1077 return (0x01CBCE << 14), 0xf
1078 case ARNG_HU:
1079 return (0x03979E << 13), 0x7
1080 case ARNG_WU:
1081 return (0x072F3E << 12), 0x3
1082 case ARNG_VU:
1083 return (0x0E5E7E << 11), 0x1
1084 }
1085 case AXVMOVQ:
1086 switch farng {
1087 case ARNG_W:
1088 return (0x03B77E << 13), 0x7
1089 case ARNG_V:
1090 return (0x076EFE << 12), 0x3
1091 case ARNG_WU:
1092 return (0x03B79E << 13), 0x7
1093 case ARNG_VU:
1094 return (0x076F3E << 12), 0x3
1095 }
1096 }
1097
1098 case C_REG | (C_ARNG << 16):
1099 switch {
1100 case offset_flag:
1101
1102 switch a {
1103 case AVMOVQ:
1104 switch tarng {
1105 case ARNG_16B:
1106 return (0xC2 << 22), 0x0
1107 case ARNG_8H:
1108 return (0x182 << 21), 0x0
1109 case ARNG_4W:
1110 return (0x302 << 20), 0x0
1111 case ARNG_2V:
1112 return (0x602 << 19), 0x0
1113 }
1114 case AXVMOVQ:
1115 switch tarng {
1116 case ARNG_32B:
1117 return (0xCA << 22), 0x0
1118 case ARNG_16H:
1119 return (0x192 << 21), 0x0
1120 case ARNG_8W:
1121 return (0x322 << 20), 0x0
1122 case ARNG_4V:
1123 return (0x642 << 19), 0x0
1124 }
1125 }
1126 default:
1127
1128 switch a {
1129 case AVMOVQ:
1130 switch tarng {
1131 case ARNG_16B:
1132 return (0x1CA7C0 << 10), 0x0
1133 case ARNG_8H:
1134 return (0x1CA7C1 << 10), 0x0
1135 case ARNG_4W:
1136 return (0x1CA7C2 << 10), 0x0
1137 case ARNG_2V:
1138 return (0x1CA7C3 << 10), 0x0
1139 }
1140 case AXVMOVQ:
1141 switch tarng {
1142 case ARNG_32B:
1143 return (0x1DA7C0 << 10), 0x0
1144 case ARNG_16H:
1145 return (0x1DA7C1 << 10), 0x0
1146 case ARNG_8W:
1147 return (0x1DA7C2 << 10), 0x0
1148 case ARNG_4V:
1149 return (0x1DA7C3 << 10), 0x0
1150 }
1151 }
1152 }
1153
1154 case C_XREG | (C_ARNG << 16):
1155
1156 switch a {
1157 case AVMOVQ:
1158 return 0, 0
1159 case AXVMOVQ:
1160 switch tarng {
1161 case ARNG_32B:
1162 return (0x1DC1C0 << 10), 0x0
1163 case ARNG_16H:
1164 return (0x1DC1E0 << 10), 0x0
1165 case ARNG_8W:
1166 return (0x1DC1F0 << 10), 0x0
1167 case ARNG_4V:
1168 return (0x1DC1F8 << 10), 0x0
1169 case ARNG_2Q:
1170 return (0x1DC1FC << 10), 0x0
1171 }
1172 }
1173
1174 case C_XREG | (C_ELEM << 16):
1175
1176 switch a {
1177 case AVMOVQ:
1178 return 0, 0
1179 case AXVMOVQ:
1180 switch tarng {
1181 case ARNG_W:
1182 return (0x03B7FE << 13), 0x7
1183 case ARNG_V:
1184 return (0x076FFE << 12), 0x3
1185 }
1186 }
1187
1188 case C_ELEM | (C_XREG << 16):
1189
1190 switch a {
1191 case AVMOVQ:
1192 return 0, 0
1193 case AXVMOVQ:
1194 switch farng {
1195 case ARNG_W:
1196 return (0x03B81E << 13), 0x7
1197 case ARNG_V:
1198 return (0x07703E << 12), 0x3
1199 }
1200 }
1201
1202 case C_ELEM | (C_ARNG << 16):
1203
1204 switch a {
1205 case AVMOVQ:
1206 switch int32(farng) | (int32(tarng) << 16) {
1207 case int32(ARNG_B) | (int32(ARNG_16B) << 16):
1208 return (0x01CBDE << 14), 0xf
1209 case int32(ARNG_H) | (int32(ARNG_8H) << 16):
1210 return (0x0397BE << 13), 0x7
1211 case int32(ARNG_W) | (int32(ARNG_4W) << 16):
1212 return (0x072F7E << 12), 0x3
1213 case int32(ARNG_V) | (int32(ARNG_2V) << 16):
1214 return (0x0E5EFE << 11), 0x1
1215 }
1216 case AXVMOVQ:
1217 return 0, 0
1218 }
1219 }
1220
1221 return 0, 0
1222 }
1223
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